Xilinx Design Summary

system Project Status
Project File: | system.xmp | Implementation State: | New
Module Name: | system | Errors: |
Product Version: | EDK 14.4 | Warnings: |

XPS Reports | [-]
Report Name | Generated | Errors | Warnings | Infos
Platgen Log File |  |  |  |
Simgen Log File |  |  |  |
BitInit Log File |  |  |  |
System Log File | Fri Sep 27 16:55:41 2013 |  |  |

Detailed Reports | [-]
Report Name | Status | Generated | Errors | Warnings | Infos
Translation Report |  |  |  |  |
Map Report |  |  |  |  |
Place and Route Report |  |  |  |  |
Post-PAR Static Timing Report |  |  |  |  |
Bitgen Report |  |  |  |  |

Secondary Reports | [-]
Report Name | Status | Generated

Date Generated: 09/27/2013 - 16:55:41