PIC10F202
Author: Molnár Károly

All Enhanced Extended Regular 12 bits 14 bits 16 bits RAM
size ROM
size EEPROM
size Common
SFRs
Features Configuration Bits RAM map SFR map

PIC10F202
CONFIG (address:0x0FFF, mask:0x001D, default:0x001D)
OSC -- Oscillator (bitmask:0x0001)
OSC = IntRC | 0x0FFF | This is the only option. It is here for backward compatibility.
WDTE -- Watchdog Timer (bitmask:0x0004)
WDTE = OFF | 0x0FFB | WDT disabled.
WDTE = ON | 0x0FFF | WDT enabled.
CP -- Code Protect (bitmask:0x0008)
CP = ON | 0x0FF7 | Code protection on.
CP = OFF | 0x0FFF | Code protection off.
MCLRE -- Master Clear Enable (bitmask:0x0010)
MCLRE = OFF | 0x0FEF | GP3/MCLR pin fuction is digital I/O, MCLR internally tied to VDD.
MCLRE = ON | 0x0FFF | GP3/MCLR pin function is MCLR.

This page generated automatically by the device-help.pl program (2014-09-27 07:53:45 UTC) from the 8bit_device.info file (rev: 1.21) of mpasmx and from the gputils source package (rev: svn 1103). The mpasmx is included in the MPLAB X.