PIC17C42A
Author: Molnár Károly

All Enhanced Extended Regular 12 bits 14 bits 16 bits RAM
size ROM
size EEPROM
size Common
SFRs
Features Configuration Bits RAM map SFR map

PIC17C42A
Bank 0 | Bank 1 | Bank 2 | Bank 3
--- | --- | --- | ---
SFR 0x000 - 0x019 26 bytes Common 0x01A - 0x01F 6 bytes GPR 0x020 - 0x0FF 224 bytes | SFR 0x100 - 0x119 26 bytes Mirrored 0x11A - 0x11F 6 bytes GPR 0x120 - 0x1FF 224 bytes | SFR 0x200 - 0x219 26 bytes Mirrored 0x21A - 0x21F 6 bytes Unimplemented 0x220 - 0x2FF 224 bytes | SFR 0x300 - 0x319 26 bytes Mirrored 0x31A - 0x31F 6 bytes Unimplemented 0x320 - 0x3FF 224 bytes
It is possible that this colums is inaccurate due to the mirrored-SFRs.

SFR 26 bytes GPR 224 bytes Common 6 bytes Mirrored 0 bytes Unimplemented 0 bytes | SFR 26 bytes GPR 224 bytes Common 0 bytes Mirrored 6 bytes Unimplemented 0 bytes | SFR 26 bytes GPR 0 bytes Common 0 bytes Mirrored 6 bytes Unimplemented 224 bytes | SFR 26 bytes GPR 0 bytes Common 0 bytes Mirrored 6 bytes Unimplemented 224 bytes
It is possible that this colums is inaccurate due to the mirrored-SFRs.

Special Function Register.

General-purpose RAM.

Common RAM.

Mirrored RAM.

In this place no RAM.

This page generated automatically by the device-help.pl program (2014-09-27 07:53:47 UTC) from the 8bit_device.info file (rev: 1.21) of mpasmx and from the gputils source package (rev: svn 1103). The mpasmx is included in the MPLAB X.