\# Author Boris Skegin
\# Issued under the terms of the GPL v2 License or any later version
.TH hm2_pktuart_setup "3hm2" "2016-02-29" "LinuxCNC Documentation" "Hostmot2"
.SH NAME

hm2_pktuart_setup \- setup a Hostmot2 PktUART instance
.SH SYNTAX
.nf
.B #include <hostmot2-serial.h>
.HP
int hm2_pktuart_setup(char *name, int bitrate, rtapi_s32 tx_mode, rtapi_s32 rx_mode, int txclear, int rxclear)

.SH DESCRIPTION
\fBhm2_pktuart_setup\fR Setup the bitrate for the PktUART named "name".
"name" is a unique string given to each PktUART during hostmot2 
setup. The names of the available UARTs are printed to standard output during 
the driver loading process and take the form:
hm2_<board name>.<board index>.pktuart.<index> For example hm2_5i25.0.pktuart.0 .

Hostmot2 UARTs are good to about 10 Mb/sec, but higher data rates (with any UART)
trade speed for susceptibility to impulse noise.

  
The PktUART function allows different RX and TX bitrates, but that is not currently
supported by this driver.


tx_mode is bit mask defined in the Hostmot2 regmap:
.TP
.B Bit  21	       FrameBuffer Has Data
.TP
.B Bits 20..16     Frames to send
.TP
.B Bits 15..8      InterFrame delay in bit times
.TP
.B Bit  7	       Send busy, Transmit Logic active
.TP
.B Bit  6	       Drive Enable bit (enables external RS-422/485 Driver when set)
.TP
.B Bit  5	       Drive enable Auto (Automatic external drive enable)
.TP
.B Bit  4	       SCFIFO Error
.TP
.B Bits 3..0       Drive enable delay (delay from asserting drive enable 
     	           to start of data transmit. In CLock Low periods 
				   
				   

				   
.TP       
rx_mode is bit mask defined in the Hostmot2 regmap:
.TP
.B Bit  21	       FrameBuffer has data                                                        	
.TP
.B Bits 20..16     Frames received                                                               
.TP
.B Bits 15..8      InterFrame delay in bit times                                    
.TP
.B Bit  7	       Rx Logic active
.TP
.B Bit  6	       RXMask
.TP
.B Bit  5          Unused
.TP
.B Bit  4	       RCFIFO Error
.TP
.B Bit  3	       RXEnable (must be set to receive packets) 
.TP
.B Bit  2	       RXMask Enable (enables input data masking when transmitting)
.TP
.B Bit  1	       Overrun error (no stop bit when expected) (sticky)
.TP
.B Bit  0	       False Start bit error (sticky)

.PP
rx_mode and tx_mode registers are currently write-only.
One can get the instance number of a PktUART instance
with the help of hm2_get_pktuart function in order
to read and write to Rx and Tx registers.

.PP
To write only to the tx_mode DriveEnable bit call this function with the bitrate
unchanged and -1 as the rx_mode
To change bitrate without altering mode settings send -1 to both modes. 
.PP
txclear==1 aborts any sends in process, clears the data FIFO and 
clears the send count FIFO.
.PP
rxclear==1  aborts any receives in process, clears the data FIFO and 
clears the receive count FIFO.
.PP
txclear!=1 or rxclear!=1 lets the corresponding registers unchanged.
        
.SH RETURN VALUE
Returns 0 on success and -1 or -EINVAL on failure. 

.SH SEE ALSO
\fBhm2_pktuart_send\fR(3hm2), \fBhm2_pktuart_read\fR(3hm2)
.TP
See src/hal/drivers/mesa_pktgyro_test.comp for an example usage. 

.SH FUTURE DEVELOPMENT
This function is subject to change as digital filters will be added on the Rx UART,
and bit rate register will gain a 12 bit field for the input filter constant.
