#
# Copyright 2018 Ettus Research, a National Instruments Company
#
# SPDX-License-Identifier: LGPL-3.0-or-later
#

##################################################
# DB IFC Sources
##################################################
EISCAT_DB_SRCS = $(abspath $(addprefix $(BASE_DIR)/n3xx/dboards/eiscat/db_ifc/, \
DbCore.vhd \
DaughterboardRegs.vhd \
ClockingRegs.vhd \
PkgEiscatPersonality.vhd \
PkgDaughterboardRegMap.vhd \
PkgClockingRegMap.vhd \
PkgJesdConfig.vhd \
RadioClocking.vhd \
Jesd204bXcvrCore.edf \
))

EISCAT_SYSREF_SRCS = $(abspath $(addprefix $(BASE_DIR)/n3xx/dboards/eiscat/sysref/, \
SysRefCore.vhd \
SysRefGen.vhd \
SysRefDistribution.vhd \
ConditionSysRefRequest.vhd \
))

EISCAT_TOP_SRCS = $(abspath $(addprefix $(BASE_DIR)/n3xx/dboards/eiscat/, \
n3xx.v \
n3xx_core_eiscat.v \
radio/beamform_delay_and_sum.v \
radio/multi_stream_add.v \
radio/multi_stream_aurora_handler.v \
radio/noc_block_ddc_eiscat.v \
radio/noc_block_radio_core_eiscat.v \
radio/rx_control_eiscat.v \
radio/settings_reg_fir_tap_bram_config.v \
radio/time_align_control_eiscat.v \
))

EISCAT_DB_TIMING_XDC = $(abspath $(addprefix $(BASE_DIR)/n3xx/dboards/eiscat/, \
db_timing.xdc \
))

EISCAT_DB_XDC = $(abspath $(addprefix $(BASE_DIR)/n3xx/dboards/eiscat/, \
db_pins.xdc \
))
