/**
* Copyright (C) 2019-2022 Xilinx, Inc
* Copyright (C) 2022-2023 Advanced Micro Devices, Inc. All rights reserved.
*
* Licensed under the Apache License, Version 2.0 (the "License"). You may
* not use this file except in compliance with the License. A copy of the
* License is located at
*
*     http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*/

#ifndef FUNCTION_INCLUDES_H
#define FUNCTION_INCLUDES_H

#define NUM_SAMPLES1 32
#define NUM_SAMPLES2 16
#define NUM_ITERATIONS1 4
#define NUM_ITERATIONS2 8
#define AIE_CORE_COL 25
#define AIE_CORE_ROW 0
#define SLEEP_COUNT_CYCLES 128

#endif
