[^:]*: Assembler messages:
[^:]*:10: Error: instruction cannot be conditional -- `vmoveq q0,q1'
[^:]*:11: Error: instruction cannot be conditional -- `vmoveq d0,d1'
[^:]*:12: Error: instruction cannot be conditional -- `vmoveq\.i32 q0,#0'
[^:]*:13: Error: instruction cannot be conditional -- `vmoveq\.i32 d0,#0'
[^:]*:27: Error: instruction cannot be conditional -- `vmuleq\.f32 d0,d1,d2'
[^:]*:27: Error: instruction cannot be conditional -- `vmuleq\.f32 q0,q1,q2'
[^:]*:28: Error: instruction cannot be conditional -- `vmlaeq\.f32 d0,d1,d2'
[^:]*:28: Error: instruction cannot be conditional -- `vmlaeq\.f32 q0,q1,q2'
[^:]*:29: Error: instruction cannot be conditional -- `vmlseq\.f32 d0,d1,d2'
[^:]*:29: Error: instruction cannot be conditional -- `vmlseq\.f32 q0,q1,q2'
[^:]*:30: Error: instruction cannot be conditional -- `vaddeq\.f32 d0,d1,d2'
[^:]*:30: Error: instruction cannot be conditional -- `vaddeq\.f32 q0,q1,q2'
[^:]*:31: Error: instruction cannot be conditional -- `vsubeq\.f32 d0,d1,d2'
[^:]*:31: Error: instruction cannot be conditional -- `vsubeq\.f32 q0,q1,q2'
[^:]*:34: Error: instruction cannot be conditional -- `vcvteq\.f16\.f32 d1,q1'
[^:]*:35: Error: instruction cannot be conditional -- `vcvteq\.f32\.f16 q1,d1'
[^:]*:43: Error: instruction cannot be conditional -- `vabseq\.f32 d0,d1'
[^:]*:43: Error: instruction cannot be conditional -- `vabseq\.f32 q0,q1'
[^:]*:44: Error: instruction cannot be conditional -- `vnegeq\.f32 d0,d1'
[^:]*:44: Error: instruction cannot be conditional -- `vnegeq\.f32 q0,q1'
[^:]*:52: Error: instruction cannot be conditional -- `vcvteq\.s32\.f32 d0,d1'
[^:]*:52: Error: instruction cannot be conditional -- `vcvteq\.s32\.f32 q0,q1'
[^:]*:53: Error: instruction cannot be conditional -- `vcvteq\.u32\.f32 d0,d1'
[^:]*:53: Error: instruction cannot be conditional -- `vcvteq\.u32\.f32 q0,q1'
[^:]*:54: Error: instruction cannot be conditional -- `vcvteq\.f32\.s32 d0,d1'
[^:]*:54: Error: instruction cannot be conditional -- `vcvteq\.f32\.s32 q0,q1'
[^:]*:55: Error: instruction cannot be conditional -- `vcvteq\.f32\.u32 d0,d1'
[^:]*:55: Error: instruction cannot be conditional -- `vcvteq\.f32\.u32 q0,q1'
[^:]*:60: Error: instruction cannot be conditional -- `vdupeq\.32 d0,d1\[0\]'
[^:]*:61: Error: instruction cannot be conditional -- `vdupeq\.32 q0,d1\[1\]'
