#### Design Rule Checking

At any time, you can check your layout against the design rules by using the Check Hierarchically command (in menu Tools / DRC), or just type the F5 key. When DRC is done, use the ">" key to step through and highlight errors; see the Messages window for comments.

You can also use this command to check a schematic. Schematic design rules are simply "rules of etiquette" which report unusual situations in the circuit. See Section 9-2-1 for more on DRC.

#### Network Consistency Checking

One of the most useful analysis tools is Network Consistency Checking (NCC). This compares the networks in two different cells to make sure they are equivalent (this step is sometimes called LVS: layout-versus-schematic).

To run NCC, edit either the layout or the schematic cell, and use the Schematic and Layout Views of Cell in Current Window command (in menu Tools / NCC). This check will not consider transistor sizes, only circuit connectivity.

When the circuit has passed NCC at the connectivity level, turn on transistor size checking. To do this, check "Check transistor sizes" in the NCC Preferences (use the Preferences command in menu File, section "Tools", tab "NCC").

Electric ideally likes layout, schematic and icons of the same items to be named identically (i.e. "nand2{sch}" and "nand2{lay}" have identical names). Having the same name places cells in the same cell group. (Much of this naming happens automatically in Electric when new views of a current cell are made.) If the two cells to be compared are not in the same group, additional work is needed to tell NCC what to compare. See Section 9-7-1 for more on NCC.

#### Simulation

Electric has two built-in simulators, and can interface to many more. The built-in simulators are ALS and IRSIM. ALS is a logic-level simulator, and is not useful for transistor-level design. IRSIM is a gate-level simulator, and can handle the transistors in this example. Unfortunately, IRSIM is not packaged with the basic Electric system (it is a free, but separate, "plugin"). See Section 1-5 for details on adding the IRSIM simulator to Electric.

To simulate a circuit with IRSIM, use the IRSIM: Simulate Current Cell command (in menu Tools / Simulation (Built-in)). A waveform window appears to show the simulation status. To get the waveform window and your schematic/layout to appear side-by-side, use the Tile Vertically command (in menu Window / Adjust Position).

The exported signals of your design will automatically appear in the waveform window. To add an internal signal to the waveform display, select it and use the Add to Waveform in New Panel (in menu Edit / Selection), or just type "a". To set a "1" value on a signal, select it (in either the waveform or the schematic/layout) and use Set Signal High at Main Time (in menu Tools / Simulation (Built-in)), or just type "V". You can drag the "main" time cursor (the dashed line) to any point in the waveform window. Notice that as you drag it, level information is displayed in the schematic/layout. See Section 9-5-1 for more on the IRSIM simulator.

Besides built-in simulation, Electric can generate input decks for many popular external simulators (see Section 9-4-1). For example, to simulate with Spice, follow these steps:

- Use the Spice/CDL Preferences to select your Spice engine (Ngspice, HSpice, PSpice, etc.)
- Use the Write Spice Deck... command (in menu Tools / Simulation (Spice)) to generate an input deck for Spice.
- Run the simulation externally
- Use the Plot Spice Listing... command (in menu Tools / Simulation (Spice)) to read the output of Spice and display it in a waveform window.

See Section 9-4-3 for more on Spice.