# DP: updates from the 14 branch upto 20260316 (7b5a43e03fe).

LANG=C git diff --no-renames --src-prefix=a/src/ --dst-prefix=b/src/ \
	c9cd41fba9ebd288c4f101e4b99da934bcb96a11 7b5a43e03fe56e43a0e323add225dd70b3fe72a9 \
	| awk '/^diff .*\.texi/ {skip=1; next} /^diff / { skip=0 } skip==0' \
	| grep -v -E '^(diff|index)'

--- a/src/gcc/ChangeLog
+++ b/src/gcc/ChangeLog
@@ -1,3 +1,1737 @@
+2026-03-16  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>
+
+	PR target/124126
+	* config/aarch64/aarch64-builtins.cc (aarch64_init_ls64_builtins_types): Copy
+	the array type before setting the mode.
+
+2026-03-16  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>
+
+	PR target/123285
+	* config/aarch64/aarch64-early-ra.cc (early_ra::form_chains): Process clobbers
+	and ABI clobbers before starting to form the chain.
+
+2026-03-16  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>
+
+	PR target/123457
+	* config/aarch64/aarch64-sve-builtins.cc (struct registered_function_hasher):
+	Change base class to ggc_ptr_hash.
+	(initial_indexes): Mark with GTY.
+	(function_table): Likewise.
+	(handle_arm_sve_h): Allocate function_table from ggc instead of heap.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-03-06  Jakub Jelinek  <jakub@redhat.com>
+
+	PR tree-optimization/124135
+	* tree-inline.cc (expand_call_inline): If both gimple_call_lhs (stmt)
+	and use_retvar aren't gimple regs but have gimple reg type, use
+	separate load of use_retva into SSA_NAME and then store of it
+	into gimple_call_lhs (stmt).
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-03-06  Jakub Jelinek  <jakub@redhat.com>
+
+	PR tree-optimization/124358
+	* match.pd ((ptr) (x p+ y) p+ z -> (ptr) (x p+ (y + z))): Simplify
+	into (ptr) x p+ (y + z) instead.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-03-05  Jakub Jelinek  <jakub@redhat.com>
+
+	PR target/124366
+	* config/i386/i386.md (@wrss<mode>, @wruss<mode>): Swap operand
+	order for -masm=intel.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-03-03  Jakub Jelinek  <jakub@redhat.com>
+
+	PR target/124315
+	* config/i386/sse.md (avx512f_vmfmadd_<mode>_mask3<round_name>,
+	avx512f_vmfmsub_<mode>_mask3<round_name>,
+	avx512f_vmfnmadd_<mode>_mask3<round_name>,
+	avx512f_vmfnmsub_<mode>_mask3<round_name>): Use %<iptr>1 instead of
+	%<iptr>3 in -masm=intel syntax.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-03-03  Jakub Jelinek  <jakub@redhat.com>
+
+	PR target/124335
+	* config/i386/sse.md (*avx512f_load<mode>_mask): Use %{%3%} instead of
+	%{3%} for -masm=intel syntax.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-02-18  Jakub Jelinek  <jakub@redhat.com>
+
+	PR target/124138
+	* config/i386/i386.cc (avx_vpermilp_parallel): Verify
+	ipar[2] and ipar[3] aren't larger than 3.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-02-11  Jakub Jelinek  <jakub@redhat.com>
+
+	PR middle-end/124056
+	* cfgexpand.cc (expand_asm_stmt): If after_md_seq is non-NULL, emit
+	it at the start of after_rtl_seq instead of after fallthru_label.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-02-11  Jakub Jelinek  <jakub@redhat.com>
+
+	PR rtl-optimization/116600
+	PR middle-end/123386
+	* cfgrtl.cc (force_nonfallthru_and_redirect): Don't do any
+	asm goto adjustments early, only note in asm_goto_edge if
+	any labels point originally to e->dest head.  After jumpblock
+	creation don't add an extra edge for asm_goto_edge, instead
+	adjust those labels pointing to former e->dest head to point
+	to jumpblock instead.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-02-06  Jakub Jelinek  <jakub@redhat.com>
+
+	PR c/101312
+	* alias.cc (get_alias_set): Allow TYPE_CANONICAL (mv) to be
+	not its own TYPE_MAIN_VARIANT, as long as its TYPE_MAIN_VARIANT
+	has TYPE_CANONICAL equal to itself.
+	* tree.cc (verify_type): Likewise.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-02-05  Jakub Jelinek  <jakub@redhat.com>
+
+	PR middle-end/123978
+	* range-op.h (OP_WIDEN_MULT_SIGNED_UNSIGNED): Define.
+	(OP_WIDEN_PLUS_SIGNED, OP_WIDEN_PLUS_UNSIGNED,
+	RANGE_OP_TABLE_SIZE): Renumber.
+	* gimple-range-op.cc (imple_range_op_handler::maybe_non_standard):
+	Use 3 different classes instead of 2 for WIDEN_MULT_EXPR, one
+	for both operands signed, one for both operands unsigned and
+	one for operands with different signedness.  In the last case
+	canonicalize to first operand signed second unsigned.
+	* range-op.cc (operator_widen_mult_signed::wi_fold): Use
+	TYPE_PRECISION (type) rather than wi::get_precision (whatever) * 2,
+	use SIGNED for all wide_int::from calls.
+	(operator_widen_mult_unsigned::wi_fold): Similarly but use UNSIGNED
+	for all wide_int::from calls.
+	(class operator_widen_mult_signed_unsigned): New type.
+	(operator_widen_mult_signed_unsigned::wi_fold): Define.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-02-04  Jakub Jelinek  <jakub@redhat.com>
+
+	PR c++/123818
+	* tree.cc (simple_cst_equal) <case CONSTRUCTOR>: Return -1 if some
+	recursive call returns -1.  Also compare indexes.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-02-04  Jakub Jelinek  <jakub@redhat.com>
+
+	PR middle-end/122689
+	* gimple-lower-bitint.cc (gimple_lower_bitint): For the PHI handling
+	if min_prec == prec, break after emitting assignment from c.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-02-02  Jakub Jelinek  <jakub@redhat.com>
+
+	PR tree-optimization/121104
+	* tree-ssa-math-opts.cc (match_uaddc_usubc): Punt if
+	lhs of ovf1 or ovf2 doesn't have element type compatible with type.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-01-30  Jakub Jelinek  <jakub@redhat.com>
+
+	PR tree-optimization/123864
+	* match.pd (__builtin_mul_overflow_p (x, cst, (stype) 0) ->
+	x > stype_max / cst || x < stype_min / cst): Only check
+	integer_minus_onep for signed types.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-01-30  Jakub Jelinek  <jakub@redhat.com>
+
+	PR middle-end/123876
+	* omp-low.cc (diagnose_sb_2): Handle GIMPLE_ASM.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-01-23  Jakub Jelinek  <jakub@redhat.com>
+
+	PR middle-end/123703
+	* builtins.cc (fold_builtin_abs): Return NULL_TREE if type is not
+	integral.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-01-22  Jakub Jelinek  <jakub@redhat.com>
+
+	PR tree-optimization/123736
+	* tree-ssa-loop-unswitch.cc (hoist_guard): Guard dump message
+	on dump_file && (dump_flags & TDF_DETAILS) condition.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-01-17  Jakub Jelinek  <jakub@redhat.com>
+
+	PR tree-optimization/123513
+	* tree.cc (valid_new_delete_pair_p): If new_name[3] or delete_name[3]
+	is 'I', return false with *pcertain set to false rather than true.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-01-16  Jakub Jelinek  <jakub@redhat.com>
+
+	PR target/123607
+	* config/i386/i386.md (movhf_mask): Change constraint on
+	match_operand 2's second alternative from 0C to 0.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-01-14  Jakub Jelinek  <jakub@redhat.com>
+
+	PR target/120250
+	* combine.cc (recog_for_combine): Don't try to put SET_SRC
+	into a constant pool if SET_DEST is pc_rtx.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-01-10  Jakub Jelinek  <jakub@redhat.com>
+
+	PR tree-optimization/123431
+	* gimple-range-op.cc (gimple_range_op_handler::maybe_builtin_call):
+	Punt if type-generic builtins with a single argument don't have
+	exactly one argument.  For returns_arg punt if call doesn't have
+	at least one argument.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-01-09  Jakub Jelinek  <jakub@redhat.com>
+
+	* doc/invoke.texi (-x): Add objc-cpp-output,
+	objc++-cpp-output, adascil, adawhy, modula-2, modula-2-cpp-output,
+	rust and lto as further possible option arguments.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-01-08  Jakub Jelinek  <jakub@redhat.com>
+
+	PR middle-end/111817
+	* stmt.cc (parse_input_constraint): For matching construct, goto
+	before the loop without changing j instead of break.  Remove comment
+	about that problem.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-01-07  Jakub Jelinek  <jakub@redhat.com>
+
+	PR rtl-optimization/119291
+	PR rtl-optimization/121773
+	* combine.cc (try_combine): Check that SET_DEST (setN) is neither
+	modified_between_p nor reg_used_between_p instead of just not
+	reg_used_between_p or pc_rtx.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-01-06  Jakub Jelinek  <jakub@redhat.com>
+		    Marco Falke  <falke.marco@gmail.com>
+
+	PR tree-optimization/123351
+	* tree-object-size.cc (object_sizes_set_temp): Separate calls to
+	make_ssa_name to ensure deterministic execution order.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-12-20  Jakub Jelinek  <jakub@redhat.com>
+
+	PR target/123217
+	* config/i386/i386-expand.cc (ix86_expand_builtin)
+	<case IX86_BUILTIN_ENCODEKEY128U32, case IX86_BUILTIN_ENCODEKEY256U32,
+	case IX86_BUILTIN_URDMSR>: Set target to a new pseudo even if it is
+	non-NULL but doesn't satisfy register_operand predicate.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-12-19  Jakub Jelinek  <jakub@redhat.com>
+
+	* doc/install.texi (--with-tls=): Fix a typo, were -> where.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-12-17  Jakub Jelinek  <jakub@redhat.com>
+
+	PR target/123155
+	* config/i386/xmmintrin.h (_mm_maskmove_si64): Rename offset automatic
+	variable to __offset.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-12-03  Jakub Jelinek  <jakub@redhat.com>
+
+	PR tree-optimization/122943
+	* tree-switch-conversion.cc (switch_conversion::build_arrays):
+	Always gimplify subtraction in utype without cast to tidxtype
+	and set m_arr_ref_first to the last stmt of that.  Remove unneeded
+	update_stmt call.  If tidxtype is not utype, append after that stmt
+	cast to tidxtype and set tidx to the lhs of that cast.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-11-25  Jakub Jelinek  <jakub@redhat.com>
+
+	PR middle-end/120052
+	* gimplify.cc (gimplify_call_expr): For IFN_UBSAN_BOUNDS
+	call with integer_onep first argument, change that argument
+	to 0 and add TYPE_MAX_VALUE (TYPE_DOMAIN (arr_type)) to
+	3rd argument before gimplification.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-11-25  Jakub Jelinek  <jakub@redhat.com>
+
+	PR middle-end/120564
+	* omp-expand.cc (extract_omp_for_update_vars): Use build2 instead of
+	fold_build2 to build argument for gimple_build_cond_empty.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-11-11  Jakub Jelinek  <jakub@redhat.com>
+
+	PR lto/122620
+	* gimplify-me.cc (gimple_regimplify_operands): Don't try to regimplify
+	TREE_CLOBBER on rhs of gimple_clobber_p if it has gimple_reg_type.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	PR tree-optimization/122394
+	* tree-ssa-phiopt.cc (spaceship_replacement): Use
+	build_debug_expr_decl instead of manually building DEBUG_EXPR_DECL
+	and getting SET_DECL_MODE wrong.
+
+2026-03-14  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>
+
+	Backported from master:
+	2026-03-04  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>
+
+	PR tree-optimization/119568
+	* tree-ssa-math-opts.cc (convert_plusminus_to_widen): Reject different
+	mode classes.
+
+2026-03-14  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>
+
+	Backported from master:
+	2026-02-02  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>
+
+	PR rtl-optimization/123294
+	* ifcvt.cc (noce_emit_store_flag): Reject modes
+	greater than MAX_FIXED_MODE_SIZE.
+
+2026-03-14  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>
+
+	Backported from master:
+	2026-01-18  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>
+
+	PR tree-optimization/123645
+	* tree-ssa-phiopt.cc (cond_removal_in_builtin_zero_pattern): Rewrite
+	the canonicalization of the args code based on e1/e2 being edges into
+	the join block.
+
+2026-03-14  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>
+
+	Backported from master:
+	2025-09-02  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>
+
+	PR tree-optimization/121776
+	* tree-ssa-strlen.cc (strlen_pass::handle_builtin_memcmp): Create
+	unaligned types if the alignment of the pointers is less
+	than the alignment of the new type.
+
+2026-03-12  Martin Jambor  <mjambor@suse.cz>
+
+	Backported from master:
+	2026-02-20  Martin Jambor  <mjambor@suse.cz>
+
+	PR ipa/122856
+	* ipa-cp.cc (self_recursive_pass_through_p): Test jump function type first.
+	(self_recursive_ancestor_p): New function.
+	(find_scalar_values_for_callers_subset): Test also for self-recursive
+	ancestor jump functions.
+	(push_agg_values_for_index_from_edge): Likewise.
+
+2026-03-09  Kalvis Duckmanton  <kalvisd@gmail.com>
+
+	Backported from master:
+	2026-02-14  Kalvis Duckmanton  <kalvisd@gmail.com>
+
+	PR target/112400
+	* config/vax/vax.md (casesi1): Wrap naked operand 1 with a USE
+	where used with the insn split to.
+	(*casesi1): Likewise naked incoming operand 1.
+
+2026-03-05  Xi Ruoyao  <xry111@xry111.site>
+
+	Backported from master:
+	2026-03-05  Xi Ruoyao  <xry111@xry111.site>
+
+	PR target/123807
+	PR middle-end/124250
+	* config/loongarch/loongarch.cc
+	(loongarch_expand_vector_init_same): Revert r16-7163 change.
+
+2026-03-04  Xi Ruoyao  <xry111@xry111.site>
+
+	Backported from master:
+	2026-02-26  Xi Ruoyao  <xry111@xry111.site>
+
+	PR middle-end/124250
+	PR target/123807
+	* optabs.cc (expand_binop): Extend the shift amount if it's
+	narrower than the element of the shifted vector.
+
+2026-02-26  Xi Ruoyao  <xry111@xry111.site>
+
+	Revert:
+	2025-11-08  Lulu Cheng  <chenglulu@loongson.cn>
+
+	PR target/122097
+	* config/loongarch/loongarch.cc
+	(loongarch_const_vector_same_bytes_p): Add processing for
+	floating-point vector data.
+
+2026-02-26  Xi Ruoyao  <xry111@xry111.site>
+
+	Backported from master:
+	2026-02-03  Xi Ruoyao  <xry111@xry111.site>
+
+	* config/loongarch/predicates.md (const_vector_neg_fp_operand):
+	New define_predicate.
+	(reg_or_vector_neg_fp_operand): New define_predicate.
+	* config/loongarch/lasx.md (copysign<mode>3): Remove.
+	(xorsign<mode>3): Remove.
+	* config/loongarch/lsx.md (copysign<mode>3): Remove.
+	(@xorsign<mode>3): Remove.
+	* config/loongarch/simd.md (copysign<mode>3): New define_expand.
+	(@xorsign<mode>3): New define_expand.
+	(and<mode>3): Only allow IVEC instead of ALLVEC.
+	(ior<mode>3): Likewise.
+	(xor<mode>3): Likewise.
+	* config/loongarch/loongarch.cc (loongarch_print_operand): No
+	longer allow floating-point vector constants for %V.
+	(loongarch_const_vector_bitimm_set_p): Always return false for
+	floating-point vector constants.
+	(loongarch_build_signbit_mask): Factor out force_reg.
+	(loongarch_emit_swrsqrtsf): Use integer vector mode instead of
+	floating-point vector mode when masking zero inputs.
+
+2026-02-18  Martin Jambor  <mjambor@suse.cz>
+
+	PR ipa/106260
+	* ipa-cp.cc (initialize_node_lattices): Replace assert that there are
+	callers with handling that situation when -fno-toplevel_reorder.
+
+2026-02-17  Martin Jambor  <mjambor@suse.cz>
+
+	Backported from master:
+	2026-02-09  Martin Jambor  <mjambor@suse.cz>
+
+	PR tree-optimization/117217
+	* tree-sra.cc (propagate_subaccesses_from_rhs): Do not propagate
+	bit-field children.
+	(propagate_subaccesses_from_lhs): Likewise.
+
+2026-02-11  Alice Carlotti  <alice.carlotti@arm.com>
+
+	PR target/123624
+	* config/aarch64/aarch64-protos.h
+	(aarch64_use_simple_return_insn_p): New.
+	* config/aarch64/aarch64.cc
+	(aarch64_use_simple_return_insn_p): New, used...
+	* config/aarch64/aarch64.md (simple_return): ...here.
+
+2026-02-06  xiezhiheng  <xiezhiheng@huawei.com>
+
+	Backported from master:
+	2026-02-05  xiezhiheng  <xiezhiheng@huawei.com>
+		    liyunfei  <liyunfei33@huawei.com>
+
+	* config/aarch64/aarch64-cores.def (AARCH64_CORE): Add hip12 core
+	* config/aarch64/aarch64-cost-tables.h: Add hip12_extra_costs
+	* config/aarch64/aarch64-tune.md: Regenerate
+	* config/aarch64/aarch64.cc: Include hip12 tuning model
+	* doc/invoke.texi: Document -mcpu=hip12
+	* config/aarch64/tuning_models/hip12.h: New file.
+
+2026-02-05  Hongyu Wang  <hongyu.wang@intel.com>
+
+	Backported from master:
+	2026-01-28  Hongyu Wang  <hongyu.wang@intel.com>
+
+	PR target/123779
+	* config/i386/sse.md (*sse4_1_<code>v8qiv8hi2<mask_name>_2):
+	Rename to ...
+	(*sse4_1_<code>v8qiv8hi2_2): ... this, and drop mask conditions.
+	(*avx2_<code>v8qiv8si2<mask_name>_2): Rename to ...
+	(*avx2_<code>v8qiv8si2_2): ... this, and likewise.
+	(*sse4_1_<code>v4qiv4si2<mask_name>_2): Rename to ...
+	(*sse4_1_<code>v4qiv4si2_2): ... this, and likewise.
+	(*sse4_1_<code>v4hiv4si2<mask_name>_2): Rename to ...
+	(*sse4_1_<code>v4hiv4si2_2): ... this, and likewise.
+	(*avx2_<code>v4qiv4di2<mask_name>_2): Rename to ...
+	(*avx2_<code>v4qiv4di2_2): ... this, and likewise.
+	(*avx2_<code>v4hiv4di2<mask_name>_2): Rename to ...
+	(*avx2_<code>v4hiv4di2_2): ... this, and likewise.
+	(*sse4_1_<code>v2hiv2di2<mask_name>_2): Rename to ...
+	(*sse4_1_<code>v2hiv2di2_2): ... this, and likewise.
+	(*sse4_1_<code>v2siv2di2<mask_name>_2): Rename to ...
+	(*sse4_1_<code>v2siv2di2_2): ... this, and likewise.
+	(*avx512f_<code>v8qiv8di2<mask_name>_2): Rename to ...
+	(*avx512f_<code>v8qiv8di2_2): ... this.
+	(*avx512vl_<code>v8qiv8hi2_mask_2): New define_insn_and_split.
+	(*avx512vl_<code>v8qiv8si2_mask_2): Likewise.
+	(*avx512vl_<code>v4qiv4si2_mask_2): Likewise.
+	(*avx512vl_<code>v4hiv4si2_mask_2): Likewise.
+	(*avx512f_<code>v8qiv8di2_mask_2): Likewise.
+	(*avx512vl_<code>v4qiv4di2_mask_2): Likewise.
+	(*avx512vl_<code>v4hiv4di2_mask_2): Likewise.
+	(*avx512vl_<code>v2hiv2di2_mask_2): Likewise.
+	(*avx512vl_<code>v2siv2di2_mask_2): Likewise.
+
+2026-02-03  Alfie Richards  <alfie.richards@arm.com>
+
+	PR target/123548
+	* config/aarch64/arm_acle.h (__plix): Change arguments to be
+	const.
+	(__pldx): Change arguments to be const.
+
+2026-02-02  Richard Biener  <rguenther@suse.de>
+
+	Backported from master:
+	2026-01-30  Richard Biener  <rguenther@suse.de>
+
+	PR middle-end/123887
+	* match.pd ((zero_one ==/!= 0) ? .. z <op> y .. -> zero_one * z ..):
+	Check evaluating z unconditionally has no side-effects, like
+	trapping.
+
+2026-02-02  Andrew Pinski  <quic_apinski@quicinc.com>
+
+	Backported from master:
+	2024-09-25  Andrew Pinski  <quic_apinski@quicinc.com>
+
+	PR middle-end/116772
+	* generic-match-head.cc (expr_no_side_effects_p): New function
+	* gimple-match-head.cc (expr_no_side_effects_p): New function
+
+2026-01-30  Lulu Cheng  <chenglulu@loongson.cn>
+
+	Backported from master:
+	2026-01-30  Lulu Cheng  <chenglulu@loongson.cn>
+
+	* config/loongarch/loongarch-ftypes.def: Remove unused type.
+
+2026-01-30  Lulu Cheng  <chenglulu@loongson.cn>
+
+	Backported from master:
+	2026-01-30  Lulu Cheng  <chenglulu@loongson.cn>
+
+	PR target/123766
+	* config/loongarch/loongarch-builtins.cc
+	(loongarch_build_vpointer_type): New function.  Return a type
+	for 'volatile void *'.
+	(LARCH_ATYPE_VPOINTER): New macro.
+	* config/loongarch/loongarch-ftypes.def: Change the pointer
+	type of the store class function from CVPOINTER to VPOINTER.
+
+2026-01-30  Lulu Cheng  <chenglulu@loongson.cn>
+
+	Backported from master:
+	2026-01-30  Lulu Cheng  <chenglulu@loongson.cn>
+
+	PR target/123807
+	* config/loongarch/loongarch.cc
+	(loongarch_expand_vector_init_same): When same is MEM and
+	GET_MODE(same) != imode, first load the data from memory
+	and then process it further.
+
+2026-01-23  Avinash Jayakar  <avinashd@linux.ibm.com>
+
+	PR target/119130
+	* config/rs6000/altivec.md (convert_4f32_8f16): Use same operand
+	order for both endian format.
+
+2026-01-23  Hongyu Wang  <hongyu.wang@intel.com>
+
+	Backported from master:
+	2026-01-23  Hongyu Wang  <hongyu.wang@intel.com>
+
+	* config/i386/sse.md (avx2_vbroadcasti128_<mode>): Constraint
+	alternative 0 with jm and add gpr16 attr to avoid egpr usage.
+
+2026-01-22  Richard Earnshaw  <rearnsha@arm.com>
+
+	Backported from master:
+	2026-01-22  Richard Earnshaw  <rearnsha@arm.com>
+
+	PR target/123742
+	* config/arm/neon.md (*smin<mode>3_neon): Renamed to ...
+	(*smin<VDQWH:mode>3_neon): ... this.  Add HFmode support.
+	(*smax<mode>3_neon): Renamed to ...
+	(*smax<VDQWH:mode>3_neon): ... this.  Add HFmode support.
+
+2026-01-19  Lulu Cheng  <chenglulu@loongson.cn>
+
+	Backported from master:
+	2026-01-19  Lulu Cheng  <chenglulu@loongson.cn>
+
+	PR target/117575
+	* config/loongarch/lasx.md: Modify the range of operand1.
+
+2026-01-16  Alice Carlotti  <alice.carlotti@arm.com>
+
+	PR target/123460
+	* config.gcc: Accept hyphens in aarch64 --with-arch extensions.
+
+2026-01-16  LIU Hao  <lh_mouse@126.com>
+
+	Backported from master:
+	2025-05-06  LIU Hao  <lh_mouse@126.com>
+
+	PR pch/14940
+	* config/i386/host-mingw32.cc (mingw32_gt_pch_use_address):
+	Replace the loop that attempted to map the PCH only to its
+	original address with more adaptive operations
+
+2026-01-16  Vladimir N. Makarov  <vmakarov@redhat.com>
+
+	PR rtl-optimization/123121
+	* lra-remat.cc (bad_for_rematerialization_p): Consider div/mod ops.
+	(operand_to_remat): Exclude rematerialization of insns with
+	multiple sets.
+
+2026-01-16  Lulu Cheng  <chenglulu@loongson.cn>
+
+	Backported from master:
+	2026-01-16  Lulu Cheng  <chenglulu@loongson.cn>
+
+	PR target/123521
+	* config/loongarch/loongarch.cc
+	(loongarch_expand_vector_init_same): Fixed a bug in the
+	vector initialization section..
+
+2026-01-15  DengJianbo  <dengjianbo@loongson.cn>
+
+	Backported from master:
+	2026-01-15  DengJianbo  <dengjianbo@loongson.cn>
+
+	* config/loongarch/loongarch.md: Remove condition in template
+	movdi_symbolic_off64.
+
+2026-01-14  Andrew MacLeod  <amacleod@redhat.com>
+
+	PR tree-optimization/123300
+	* gimple-range-gori.cc (gori_map::exports_and_deps): New.
+	* gimple-range-gori.h (exports_and_deps): New prototype.
+	(FOR_EACH_GORI_EXPORT_AND_DEP_NAME): New macro.
+	* tree-vrp.cc (remove_unreachable:remove_unreachable): Initialize
+	m_tmp bitmap.
+	(remove_unreachable:~remove_unreachable): Dispose of m_tmp bitmap.
+	(remove_unreachable:fully_replaceable): Move from static function
+	and check reachability of exports and dependencies.
+
+2026-01-13  liuhongt  <hongtao.liu@intel.com>
+
+	Backported from master:
+	2026-01-13  liuhongt  <hongtao.liu@intel.com>
+
+	PR target/123484
+	* config/i386/mmx.md (divv4hf3): Add TARGET_MMX_WITH_SSE to
+	the condition.
+	(cmlav4hf4): Ditto.
+	(cmla_conjv4hf4): Ditto.
+	(cmulv4hf3): Ditto.
+	(cmul_conjv4hf3): Ditto.
+
+2025-12-19  Yury Khrustalev  <yury.khrustalev@arm.com>
+
+	Backported from master:
+	2025-12-19  Yury Khrustalev  <yury.khrustalev@arm.com>
+
+	PR debug/121964
+	* dwarf2out.cc (gen_array_type_die): Add DW_AT_bit_stride attribute
+	for array types based on element type bit precision for integer and
+	boolean element types.
+
+2025-12-19  Yury Khrustalev  <yury.khrustalev@arm.com>
+
+	Backported from master:
+	2025-12-19  Yury Khrustalev  <yury.khrustalev@arm.com>
+
+	* machmode.def (VECTOR_BOOL_MODE): Fix comment.
+
+2025-12-11  Vladimir N. Makarov  <vmakarov@redhat.com>
+
+	PR rtl-optimization/122215
+	* ira-color.cc (improve_allocation): Use register filter for all
+	loop on hard regs.
+
+2025-11-28  Avinash Jayakar  <avinashd@linux.ibm.com>
+
+	PR tree-optimization/122126
+	* gimple-isel.cc (gimple_expand_vec_set_extract_expr): Add bound check.
+
+2025-11-27  Georg-Johann Lay  <avr@gjlay.de>
+
+	Backported from master:
+	2025-11-27  Georg-Johann Lay  <avr@gjlay.de>
+
+	* config/avr/avr-mcus.def (AVR_MCUS): Add avr16la14, avr16la20,
+	avr16la28, avr16la32, avr32la14, avr32la20, avr32la28, avr32la32.
+	* doc/avr-mmcu.texi: Rebuild.
+
+2025-11-27  Richard Earnshaw  <rearnsha@arm.com>
+
+	Backported from master:
+	2025-11-26  Richard Earnshaw  <rearnsha@arm.com>
+
+	PR target/122867
+	* config/arm/arm.cc (arm_print_operand): Use %- to
+	emit LOCAL_LABEL_PREFIX.
+	(arm_print_operand_punct_valid_p): Allow %- for punct
+	and make %_ valid for all compilation variants.
+	* config/arm/thumb2.md (*thumb2_cbz): Handle very
+	large branch ranges that exceed the limit of b<cond>.
+	(*thumb2_cbnz): Likewise.
+
+2025-11-20  Xi Ruoyao  <xry111@xry111.site>
+
+	Backported from master:
+	2025-11-20  Xi Ruoyao  <xry111@xry111.site>
+
+	PR target/122695
+	* config/loongarch/loongarch.cc (loongarch_expand_vec_perm_1):
+	Simplify and fix the logic preventing the xvshuf.* unpredictable
+	behavior.
+
+2025-11-18  Siddhesh Poyarekar  <siddhesh@gotplt.org>
+
+	Backported from master:
+	2025-11-04  Siddhesh Poyarekar  <siddhesh@gotplt.org>
+
+	PR lto/122515
+	* lto-wrapper.cc (debug_objcopy): Set type of INOFF to int64_t.
+	(run_gcc): Set type of FILE_OFFSET to int64_t.
+
+2025-11-18  Tamar Christina  <tamar.christina@arm.com>
+
+	PR tree-optimization/122408
+	* tree-vect-slp-patterns.cc (vect_validate_multiplication): Cleanup and
+	document interface.
+	(complex_mul_pattern::matches, complex_fms_pattern::matches): Update to
+	new interface.
+
+2025-11-17  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>
+
+	Backported from master:
+	2025-08-18  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>
+
+	PR middle-end/121581
+	* doc/extend.texi (__builtin_object_size): Fix example.
+
+2025-11-12  Hu, Lin1  <lin1.hu@intel.com>
+
+	Backported from master:
+	2025-11-12  Hu, Lin1  <lin1.hu@intel.com>
+
+	PR target/122446
+	* config/i386/amxbf16intrin.h (_tile_dpbf16ps_internal):
+	Input register name by inline asm %c[...], and remove %% before tmm
+	from intel side.
+	* config/i386/amxcomplexintrin.h (_tile_cmmimfp16ps_internal): Ditto
+	(_tile_cmmrlfp16ps_internal): Ditto
+	(_tile_cmmimfp16ps): Ditto
+	(_tile_cmmrlfp16ps): Ditto
+	* config/i386/amxfp16intrin.h (_tile_dpfp16ps_internal): Ditto
+	(_tile_dpfp16ps): Ditto
+	* config/i386/amxint8intrin.h (_tile_int8_dp_internal): Ditto
+	* config/i386/amxtileintrin.h (_tile_loadd): Ditto
+	(_tile_loadd_internal): Ditto
+	(_tile_stream_loadd): Ditto
+	(_tile_stream_loadd_internal): Ditto
+	(_tile_stored): Ditto
+	(_tile_stored_internal): Ditto
+	(_tile_zero): Ditto
+	(_tile_zero_internal): Ditto
+
+2025-11-11  Lulu Cheng  <chenglulu@loongson.cn>
+
+	Backported from master:
+	2025-11-08  Lulu Cheng  <chenglulu@loongson.cn>
+
+	PR target/122097
+	* config/loongarch/loongarch.cc
+	(loongarch_const_vector_same_bytes_p): Add processing for
+	floating-point vector data.
+
+2025-11-11  Lulu Cheng  <chenglulu@loongson.cn>
+
+	Backported from master:
+	2025-10-29  Lulu Cheng  <chenglulu@loongson.cn>
+
+	PR target/122097
+	* config/loongarch/loongarch.cc
+	(loongarch_const_vector_bitimm_set_p): Add support for vector float.
+	(loongarch_const_vector_bitimm_clr_p): Likewise.
+	(loongarch_print_operand): Likewise.
+	* config/loongarch/simd.md (and<mode>3): Likewise.
+
+2025-11-11  Lulu Cheng  <chenglulu@loongson.cn>
+
+	Backported from master:
+	2025-10-29  Lulu Cheng  <chenglulu@loongson.cn>
+
+	* config/loongarch/lasx.md (xor<mode>3): Delete.
+	(ior<mode>3): Delete.
+	(and<mode>3): Delete.
+	* config/loongarch/lsx.md (xor<mode>3): Delete.
+	(ior<mode>3): Delete.
+	(and<mode>3): Delete.
+	* config/loongarch/simd.md (xor<mode>3): Define.
+	(ior<mode>3): Likewise.
+	(and<mode>3): Likewise.
+
+2025-11-07  Christophe Lyon  <christophe.lyon@linaro.org>
+
+	PR target/122223
+	* config/arm/mve.md (@mve_vbicq_f<mode>): Fix operands order.
+
+2025-11-06  Georg-Johann Lay  <avr@gjlay.de>
+
+	Backported from master:
+	2025-11-06  Georg-Johann Lay  <avr@gjlay.de>
+
+	PR target/122516
+	* config/avr/elf.h (SUPPORTS_SHF_GNU_RETAIN): Define if
+	HAVE_GAS_SHF_GNU_RETAIN.
+
+2025-11-06  Georg-Johann Lay  <avr@gjlay.de>
+
+	Backported from master:
+	2025-11-06  Georg-Johann Lay  <avr@gjlay.de>
+
+	* config/avr/avr.cc (avr_output_addr_vec): Output
+	a valid opcode prior to the first gs() label provided:
+	- The code is compiled for an arch that has AVR-SD mcus, and
+	- the function has a "section" attribute, and
+	- the function has a gs() label addresses switch/case table.
+
+2025-11-03  Georg-Johann Lay  <avr@gjlay.de>
+
+	Backported from master:
+	2025-11-02  Georg-Johann Lay  <avr@gjlay.de>
+
+	PR target/122527
+	* config/avr/avr.cc (avr_load_libgcc_p): Return false if
+	the address-space is not ADDR_SPACE_FLASH.
+	(avr_out_lpm_no_lpmx [addr=REG]): Handle sizes of 3 and 4 bytes.
+
+2025-10-30  Guo Jie  <guojie@loongson.cn>
+
+	Backported from master:
+	2025-10-30  Guo Jie  <guojie@loongson.cn>
+
+	* config/loongarch/lasx.md (fnma<mode>4): Remove.
+	* config/loongarch/lsx.md (fnma<mode>4): Remove.
+	* config/loongarch/simd.md (fnma<mode>4): Simplify and correct.
+
+2025-10-26  LIU Hao  <lh_mouse@126.com>
+
+	Backported from master:
+	2025-10-26  LIU Hao  <lh_mouse@126.com>
+
+	PR target/119079
+	* config/i386/i386.md: Use `movsxd` to perform SI-to-DI extension in Intel
+	syntax.
+
+2025-10-24  H.J. Lu  <hjl.tools@gmail.com>
+
+	Backported from master:
+	2025-10-20  H.J. Lu  <hjl.tools@gmail.com>
+
+	PR target/99930
+	PR target/122323
+	* config/i386/i386-expand.cc (ix86_expand_copysign): Swap
+	operands[1] with operands[2].  Optimize copysign (x, const_double)
+	instead of copysign (const_double, x).
+	* config/i386/i386.md (copysign<mode>3): Swap constraints for
+	operands[1] and operands[2].
+
+2025-10-22  Haochen Jiang  <haochen.jiang@intel.com>
+
+	* config/i386/driver-i386.cc (host_detect_local_cpu): Correct
+	the logic for unknown model number cpu guess value.
+
+2025-10-21  Jennifer Schmitz  <jschmitz@nvidia.com>
+
+	PR target/121599
+	* config/aarch64/aarch64-sve-builtins.cc
+	(function_expander::use_cond_insn): Use add_fixed_operand if
+	fallback_arg == CONST0_RTX (mode).
+
+2025-10-21  David Malcolm  <dmalcolm@redhat.com>
+
+	Backported from master:
+	2025-02-19  David Malcolm  <dmalcolm@redhat.com>
+
+	PR other/118919
+	* input.cc (file_cache_slot::m_file_path): Make non-const.
+	(file_cache_slot::evict): Free m_file_path.
+	(file_cache_slot::create): Store a copy of file_path if non-null.
+	(file_cache_slot::~file_cache_slot): Free m_file_path.
+
+2025-10-20  Svante Signell  <svante.signell@gmail.com>
+
+	Backported from master:
+	2025-10-20  Svante Signell  <svante.signell@gmail.com>
+
+	PR go/104290
+	* config/gnu.h (OPTION_GLIBC_P, OPTION_GLIBC): Define.
+
+2025-10-16  Ayappan Perumal  <ayappap2@in.ibm.com>
+
+	Backported from master:
+	2025-10-16  Ayappan Perumal  <ayappap2@in.ibm.com>
+
+	* config/rs6000/aix.h (SUBTARGET_DRIVER_SELF_SPECS):
+	Error out when stack-protector option is used in AIX
+	as it is not supported on AIX
+	Approved By: Segher Boessenkool <segher@kernel.crashing.org>
+
+2025-10-15  Alice Carlotti  <alice.carlotti@arm.com>
+
+	* config/aarch64/aarch64-sys-regs.def: Fix pmsdsfr_el1 encoding.
+
+2025-10-15  Haochen Jiang  <haochen.jiang@intel.com>
+
+	* config/i386/i386.h
+	(PTA_PANTHERLAKE): Remove PREFETCHI.
+	* doc/invoke.texi: Correct documentation.
+
+2025-10-14  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-10-04  Jakub Jelinek  <jakub@redhat.com>
+
+	PR tree-optimization/122104
+	* tree-ssa-math-opts.cc (maybe_optimize_guarding_check): Call
+	reset_flow_sensitive_info_in_bb on bb when optimizing out the
+	guarding condition.
+
+2025-10-14  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-09-18  Jakub Jelinek  <jakub@redhat.com>
+
+	PR c++/121977
+	* omp-low.cc (lower_omp_regimplify_operands_p): If maybe_lookup_decl
+	returns NULL, use maybe_lookup_decl_in_outer_ctx as fallback.
+
+2025-10-14  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-09-10  Jakub Jelinek  <jakub@redhat.com>
+
+	PR middle-end/121828
+	* gimple-lower-bitint.cc (gimple_lower_bitint): For REALPART_EXPR
+	consumed by store in the same bb and with REALPART_EXPR from
+	optimizable_arith_overflow, don't add REALPART_EXPR lhs to
+	the m_names bitmap only if the cast from IMAGPART_EXPR doesn't
+	appear in between the REALPART_EXPR and the store.
+
+2025-10-14  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-08-25  Jakub Jelinek  <jakub@redhat.com>
+
+	PR middle-end/121453
+	* omp-expand.cc (expand_omp_for_init_counts): Clear fd->loop.n2
+	before first zero count check if zero_iter1_bb is non-NULL upon
+	entry and fd->loop.n2 has not been written yet.
+
+2025-10-14  Richard Biener  <rguenther@suse.de>
+
+	Backported from master:
+	2025-09-11  Richard Biener  <rguenther@suse.de>
+
+	PR tree-optimization/121870
+	* tree-ssa-propagate.cc
+	(substitute_and_fold_engine::substitute_and_fold): Skip
+	removed stmts from noreturn fixup.
+
+2025-10-14  Richard Biener  <rguenther@suse.de>
+
+	Backported from master:
+	2025-08-05  Richard Biener  <rguenther@suse.de>
+
+	PR tree-optimization/121370
+	* tree-scalar-evolution.cc (scev_dfs::add_to_evolution_1):
+	Avoid UB integer overflow in accumulating CHREC_RIGHT.
+
+2025-10-14  Richard Biener  <rguenther@suse.de>
+
+	Backported from master:
+	2025-07-28  Richard Biener  <rguenther@suse.de>
+
+	PR tree-optimization/121256
+	* tree-vect-loop.cc (vectorizable_recurr): Build a correct
+	initialization vector for SLP_TREE_LANES > 1.
+
+2025-10-14  Richard Biener  <rguenther@suse.de>
+
+	Backported from master:
+	2025-07-15  Richard Biener  <rguenther@suse.de>
+		    Richard Sandiford   <richard.sandiford@arm.com>
+
+	PR tree-optimization/121059
+	* tree-vect-stmts.cc (vectorizable_operation): Query
+	scalar_cond_masked_set with the correct number of masks.
+
+2025-10-14  Richard Biener  <rguenther@suse.de>
+
+	Backported from master:
+	2025-07-04  Richard Biener  <rguenther@suse.de>
+
+	PR tree-optimization/120944
+	* tree-ssa-sccvn.cc (vn_reference_lookup_3): Gate optimizations
+	invalid when volatile is involved.
+
+2025-10-14  Richard Biener  <rguenther@suse.de>
+
+	Backported from master:
+	2025-07-07  Richard Biener  <rguenther@suse.de>
+
+	PR tree-optimization/120817
+	* tree-ssa-dse.cc (initialize_ao_ref_for_dse): Use
+	ao_ref_init_from_ptr_and_range with unknown size for
+	.MASK_STORE and .MASK_LEN_STORE.
+
+2025-10-14  Richard Biener  <rguenther@suse.de>
+
+	Backported from master:
+	2025-06-20  Richard Biener  <rguenther@suse.de>
+
+	PR tree-optimization/120654
+	* vr-values.cc (range_fits_type_p): Check for undefined_p ()
+	before accessing type ().
+
+2025-10-14  Richard Biener  <rguenther@suse.de>
+
+	Backported from master:
+	2025-07-08  Richard Biener  <rguenther@suse.de>
+
+	PR tree-optimization/120358
+	* tree-ssa-structalias.cc (get_constraint_for_1): Adjust
+	pruning of sub-variables according to the imprecise
+	known start offset.
+
+2025-10-14  Richard Biener  <rguenther@suse.de>
+
+	Backported from master:
+	2025-05-31  Richard Biener  <rguenther@suse.de>
+
+	PR tree-optimization/120357
+	* tree-vect-loop.cc (vect_create_epilog_for_reduction): Create
+	the conditional reduction induction IV increment before the
+	main IV exit.
+
+2025-10-07  Georg-Johann Lay  <avr@gjlay.de>
+
+	Backported from master:
+	2025-10-07  Georg-Johann Lay  <avr@gjlay.de>
+
+	PR target/122187
+	* config/avr/avr.cc (avr_out_extr, avr_out_extr_not):
+	Make a local copy of the passed rtx[] operands.
+
+2025-10-03  Alex Coplan  <alex.coplan@arm.com>
+
+	Backported from master:
+	2025-09-15  Alex Coplan  <alex.coplan@arm.com>
+
+	PR tree-optimization/121772
+	* match.pd: Add type check to reduc(ctor) pattern.
+
+2025-09-20  Michael Eager  <eager@eagercon.com>
+
+	PR target/118280
+	* config/microblaze/iterators.md: New.
+	* config/microblaze/microblaze-protos.h: Add
+	microblaze_subword_address.
+	* config/microblaze/microblaze.cc: Ditto.
+	* config/microblaze/microblaze.md: constants: Add UNSPECV_CAS_BOOL,
+	UNSPECV_CAS_MEM, UNSPECV_CAS_VAL, UNSPECV_ATOMIC_FETCH_OP
+	type: add atomic
+	* config/microblaze/sync.md: Add atomic_fetch_<atomic_optab>si
+	atomic_test_and_set
+
+2025-09-18  hongtao.liu  <hongtao.liu@intel.com>
+
+	Backported from master:
+	2025-09-18  hongtao.liu  <hongtao.liu@intel.com>
+
+	* config/i386/x86-tune.def (X86_TUNE_AVX512_MOVE_BY_PIECES):
+	Remove SPR/GNR/DMR.
+	(X86_TUNE_AVX512_STORE_BY_PIECES): Ditto.
+
+2025-09-16  Jeff Law  <jlaw@ventanamicro.com>
+
+	Backported from master:
+	2025-09-12  Jeff Law  <jlaw@ventanamicro.com>
+
+	* lra-constraints.cc (get_equiv): Bounds check before accessing
+	data in ira_reg_equiv.
+
+2025-09-15  Kyrylo Tkachov  <ktkachov@nvidia.com>
+
+	Backported from master:
+	2025-09-03  Kyrylo Tkachov  <ktkachov@nvidia.com>
+
+	PR target/121749
+	* config/aarch64/aarch64-simd.md (aarch64_<shrn_op>shrn_n<mode>):
+	Use aarch64_simd_shift_imm_offset_<vn_mode> instead of
+	aarch64_simd_shift_imm_offset_<ve_mode> predicate.
+	(aarch64_<shrn_op>shrn_n<mode> VQN define_expand): Likewise.
+	(*aarch64_<shrn_op>rshrn_n<mode>_insn): Likewise.
+	(aarch64_<shrn_op>rshrn_n<mode>): Likewise.
+	(aarch64_<shrn_op>rshrn_n<mode> VQN define_expand): Likewise.
+	(aarch64_sqshrun_n<mode>_insn): Likewise.
+	(aarch64_sqshrun_n<mode>): Likewise.
+	(aarch64_sqshrun_n<mode> VQN define_expand): Likewise.
+	(aarch64_sqrshrun_n<mode>_insn): Likewise.
+	(aarch64_sqrshrun_n<mode>): Likewise.
+	(aarch64_sqrshrun_n<mode>): Likewise.
+	* config/aarch64/iterators.md (vn_mode): Handle DI, SI, HI modes.
+
+2025-09-15  Georg-Johann Lay  <avr@gjlay.de>
+
+	Backported from master:
+	2025-09-15  Georg-Johann Lay  <avr@gjlay.de>
+
+	* config/avr/avr-mcus.def: Add avr32eb14, avr32eb20,
+	avr32eb28, avr32eb32.
+	* doc/avr-mmcu.texi: Rebuild.
+
+2025-09-15  Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>
+
+	Backported from master:
+	2024-07-16  Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>
+
+	* config/s390/vector.md (V_HW): Enable V1TI unconditionally and
+	add TI.
+	(vec_cmpu<VIT_HW:mode><VIT_HW:mode>): Add 128-bit integer
+	variants.
+	(*vec_cmpeq<mode><mode>_nocc_emu): Emulate operation.
+	(*vec_cmpgt<mode><mode>_nocc_emu): Emulate operation.
+	(*vec_cmpgtu<mode><mode>_nocc_emu): Emulate operation.
+
+2025-09-10  Georg-Johann Lay  <avr@gjlay.de>
+
+	Backported from master:
+	2025-09-10  Georg-Johann Lay  <avr@gjlay.de>
+
+	PR target/81540
+	PR target/49857
+	* common/config/avr/avr-common.cc: Disable -ftree-switch-conversion.
+
+2025-09-03  Benjamin Wu  <bwu25@cs.washington.edu>
+
+	Backported from master:
+	2025-07-13  Benjamin Wu  <bwu25@cs.washington.edu>
+
+	* gimple.h (GTMA_DOES_GO_IRREVOCABLE): Fix typo.
+
+2025-08-20  Martin Jambor  <mjambor@suse.cz>
+
+	Backported from master:
+	2025-07-23  Martin Jambor  <mjambor@suse.cz>
+
+	PR tree-optimization/119085
+	* tree-sra.cc (sort_and_splice_var_accesses): Prevent total
+	scalarization if two incompatible aggregates access the same place.
+
+2025-08-20  Martin Jambor  <mjambor@suse.cz>
+
+	Backported from master:
+	2025-07-18  Martin Jambor  <mjambor@suse.cz>
+
+	PR tree-optimization/117423
+	* tree-sra.cc (analyze_access_subtree): Fix computation of grp_covered
+	flag.
+
+2025-08-20  Georg-Johann Lay  <avr@gjlay.de>
+
+	Backported from master:
+	2025-08-20  Georg-Johann Lay  <avr@gjlay.de>
+
+	PR target/121608
+	* config/avr/specs.h (LINK_RELAX_SPEC): Wrap in %{!r...}.
+
+2025-08-18  Richard Sandiford  <richard.sandiford@arm.com>
+
+	Backported from master:
+	2025-08-18  Richard Sandiford  <richard.sandiford@arm.com>
+
+	PR target/121118
+	* config/aarch64/aarch64.cc (aarch64_sve_move_pred_via_while):
+	Return a VNx16BI predicate.
+
+2025-08-18  Richard Sandiford  <richard.sandiford@arm.com>
+
+	Backported from master:
+	2025-08-12  Richard Sandiford  <richard.sandiford@arm.com>
+
+	PR rtl-optimization/121253
+	* fwprop.cc (forward_propagate_into): Don't propagate asm defs.
+
+2025-08-15  Pengfei Li  <Pengfei.Li2@arm.com>
+
+	PR target/121449
+	* config/aarch64/aarch64-sve.md
+	(mask_gather_load<mode><v_int_container>): Use vg<Vesize>
+	constraints for alternatives with immediate offset.
+	(mask_scatter_store<mode><v_int_container>): Likewise.
+
+2025-08-15  Richard Sandiford  <richard.sandiford@arm.com>
+
+	Backported from master:
+	2025-07-17  Richard Sandiford  <richard.sandiford@arm.com>
+		    Yury Khrustalev  <yury.khrustalev@arm.com>
+
+	* doc/sourcebuild.texi (aarch64_sme_hw): Document.
+
+2025-08-15  Lulu Cheng  <chenglulu@loongson.cn>
+
+	Backported from master:
+	2025-08-15  Lulu Cheng  <chenglulu@loongson.cn>
+
+	PR target/121542
+	* config/loongarch/loongarch.cc
+	(loongarch_vector_costs::add_stmt_cost): When using vectype,
+	first determine whether it is NULL.
+
+2025-08-14  Richard Sandiford  <richard.sandiford@arm.com>
+
+	Backported from master:
+	2025-08-14  Richard Sandiford  <richard.sandiford@arm.com>
+
+	PR target/121414
+	* config/aarch64/aarch64.cc (aarch64_is_variant_pcs): New function,
+	split out from...
+	(aarch64_asm_output_variant_pcs): ...here.  Handle various types
+	of SME function type.
+
+2025-08-14  Richard Sandiford  <richard.sandiford@arm.com>
+
+	Backported from master:
+	2025-08-14  Richard Sandiford  <richard.sandiford@arm.com>
+
+	PR target/121294
+	* config/aarch64/aarch64.md (UNSPEC_REV_PRED): New unspec.
+	* config/aarch64/aarch64-sve.md (@aarch64_sve_rev<mode>_acle)
+	(*aarch64_sve_rev<mode>_acle): New patterns.
+	* config/aarch64/aarch64-sve-builtins-base.cc
+	(svrev_impl::expand): Use the new patterns for boolean svrev.
+
+2025-08-14  Richard Sandiford  <richard.sandiford@arm.com>
+
+	Backported from master:
+	2025-08-14  Richard Sandiford  <richard.sandiford@arm.com>
+
+	PR target/121294
+	* config/aarch64/iterators.md (UNSPEC_TRN1_CONV): Delete.
+	(UNSPEC_PERMUTE_PRED): New unspec.
+	* config/aarch64/aarch64-sve.md (@aarch64_sve_trn1_conv<mode>):
+	Replace with...
+	(@aarch64_sve_<perm_insn><mode>_acle)
+	(*aarch64_sve_<perm_insn><mode>_acle): ...these new patterns.
+	* config/aarch64/aarch64.cc (aarch64_expand_sve_const_pred_trn):
+	Update accordingly.
+	* config/aarch64/aarch64-sve-builtins-functions.h
+	(binary_permute::expand): Use the new _acle patterns for
+	predicate operations.
+
+2025-08-14  H.J. Lu  <hjl.tools@gmail.com>
+
+	Backported from master:
+	2025-07-28  H.J. Lu  <hjl.tools@gmail.com>
+
+	PR target/121208
+	* config/i386/i386.cc (ix86_tls_get_addr): Issue an error for
+	-mtls-dialect=gnu with no_caller_saved_registers attribute and
+	suggest -mtls-dialect=gnu2.
+
+2025-08-13  Lulu Cheng  <chenglulu@loongson.cn>
+
+	Backported from master:
+	2025-08-13  Lulu Cheng  <chenglulu@loongson.cn>
+
+	PR target/120476
+	* config/loongarch/loongarch.cc
+	(loongarch_compute_pressure_classes): New function.
+	(TARGET_COMPUTE_PRESSURE_CLASSES): Define.
+
+2025-08-12  mengqinggang  <mengqinggang@loongson.cn>
+
+	Backported from master:
+	2025-08-12  mengqinggang  <mengqinggang@loongson.cn>
+
+	* config/loongarch/loongarch-def.h (ABI_BASE_LP64D): New macro.
+	(ABI_BASE_LP64F): New macro.
+	(ABI_BASE_LP64S): New macro.
+	(N_ABI_BASE_TYPES): New macro.
+
+2025-08-08  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-08-06  Jakub Jelinek  <jakub@redhat.com>
+
+	PR tree-optimization/121413
+	* gimple-lower-bitint.cc (abi_limb_prec): New variable
+	(bitint_precision_kind): Initialize it.
+	(gimple_lower_bitint): Clear it at the start.  For
+	min_prec > limb_prec descreased precision vars for
+	INTEGER_CST PHI arguments ensure min_prec is either
+	prec or multiple of abi_limb_prec.
+
+2025-08-08  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-08-06  Jakub Jelinek  <jakub@redhat.com>
+
+	PR tree-optimization/121127
+	* gimple-lower-bitint.cc (bitint_large_huge::handle_operand_addr): For
+	uninitialized SSA_NAME, set *prec_stored to 0 rather than *prec.
+	Handle that case in narrowing casts.  If prec_stored is non-NULL,
+	set *prec_stored to prec_stored_val.
+
+2025-08-08  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-08-01  Jakub Jelinek  <jakub@redhat.com>
+
+	PR middle-end/121322
+	* gimple-ssa-store-merging.cc (find_bswap_or_nop): Return NULL if
+	count is 0.
+
+2025-07-31  Spencer Abson  <spencer.abson@arm.com>
+
+	Backported from master:
+	2025-07-31  Spencer Abson  <spencer.abson@arm.com>
+
+	PR target/121028
+	* config/aarch64/aarch64-sme.md (aarch64_smstart_sm): Use the .inst
+	directive if !TARGET_SME.
+	(aarch64_smstop_sm): Likewise.
+
+2025-07-31  H.J. Lu  <hjl.tools@gmail.com>
+
+	Backported from master:
+	2025-07-30  H.J. Lu  <hjl.tools@gmail.com>
+
+	PR target/120427
+	* config/i386/i386.md (peephole2): Transform "movq $-1,reg" to
+	"pushq $-1; popq reg" for -Oz if reg is a legacy integer register.
+
+2025-07-31  liuhongt  <hongtao.liu@intel.com>
+
+	Backported from master:
+	2025-07-30  liuhongt  <hongtao.liu@intel.com>
+
+	PR target/121274
+	* config/i386/sse.md (*vec_concatv2di_0): Add a splitter
+	before it.
+
+2025-07-29  H.J. Lu  <hjl.tools@gmail.com>
+
+	Backported from master:
+	2025-06-19  H.J. Lu  <hjl.tools@gmail.com>
+
+	PR target/120427
+	* config/i386/i386.md (*mov<mode>_and): Changed to
+	define_insn_and_split.  Split it to "mov $0,mem" if not -Oz.
+	(*mov<mode>_or): Changed to define_insn_and_split.  Split it
+	to "mov $-1,mem" if not -Oz.
+	(peephole2): Don't transform "mov $-1,reg" to "push $-1; pop reg"
+	for -Oz since it will be transformed to "or $-1,reg".
+
+2025-07-28  Xi Ruoyao  <xry111@xry111.site>
+
+	Backported from master:
+	2025-07-17  Xi Ruoyao  <xry111@xry111.site>
+
+	PR target/121064
+	* config/loongarch/lsx.md (lsx_vshuf_<lsxfmt_f>): Add '@' to
+	generate a mode-aware helper.  Use <VIMODE> as the mode of the
+	operand 1 (selector).
+	* config/loongarch/lasx.md (lasx_xvshuf_<lasxfmt_f>): Likewise.
+	* config/loongarch/loongarch.cc
+	(loongarch_try_expand_lsx_vshuf_const): Create a new pseudo for
+	the selector.  Use the mode-aware helper to simplify the code.
+	(loongarch_expand_vec_perm_const): Likewise.
+
+2025-07-26  Richard Sandiford  <richard.sandiford@arm.com>
+
+	Backported from master:
+	2025-07-11  Richard Sandiford  <richard.sandiford@arm.com>
+
+	PR target/121027
+	* config/aarch64/aarch64.cc (aarch64_evpc_sve_tbl): Punt on 2-input
+	operations that can be handled by vec_perm.
+
+2025-07-26  Richard Sandiford  <richard.sandiford@arm.com>
+
+	Backported from master:
+	2024-10-07  Richard Sandiford  <richard.sandiford@arm.com>
+
+	PR target/121027
+	* config/aarch64/iterators.md (SVE_I): Move further up file.
+	(SVE_F): New mode iterator.
+	(SVE_ALL): Redefine in terms of SVE_I and SVE_F.
+	* config/aarch64/aarch64-sve.md (*<LOGICALF:optab><mode>3): Extend
+	to all SVE_F.
+
+2025-07-26  Richard Sandiford  <richard.sandiford@arm.com>
+
+	Backported from master:
+	2025-07-07  Richard Sandiford  <richard.sandiford@arm.com>
+
+	PR target/118891
+	* config/aarch64/aarch64.cc (aarch64_expand_vector_init): Fix the
+	ZIP1 operand order for big-endian targets.
+
+2025-07-26  Richard Sandiford  <richard.sandiford@arm.com>
+
+	Backported from master:
+	2025-07-07  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* config/aarch64/aarch64-sve.md (@aarch64_sve_set_neonq_<mode>):
+	Use %Z instead of lowpart_subreg.  Tweak formatting.
+
+2025-07-26  Richard Sandiford  <richard.sandiford@arm.com>
+
+	Backported from master:
+	2025-07-07  Richard Sandiford  <richard.sandiford@arm.com>
+
+	PR tree-optimization/118891
+	* tree-vect-stmts.cc (supportable_widening_operation): Swap the
+	hi and lo internal functions on big-endian targets.
+
+2025-07-22  Haochen Gui  <guihaoc@gcc.gnu.org>
+
+	Backported from master:
+	2024-08-15  Haochen Gui  <guihaoc@gcc.gnu.org>
+
+	* config/rs6000/rs6000.md (floatti<mode>2, floatunsti<mode>2,
+	fix_trunc<mode>ti2): Add guard TARGET_FLOAT128_HW.
+	* config/rs6000/vsx.md (xsxexpqp_<IEEE128:mode>_<V2DI_DI:mode>,
+	xsxsigqp_<IEEE128:mode>_<VEC_TI:mode>, xsiexpqpf_<mode>,
+	xsiexpqp_<IEEE128:mode>_<V2DI_DI:mode>, xscmpexpqp_<code>_<mode>,
+	*xscmpexpqp, xststdcnegqp_<mode>): Replace guard TARGET_P9_VECTOR
+	with TARGET_FLOAT128_HW.
+
+2025-07-18  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-07-18  Jakub Jelinek  <jakub@redhat.com>
+
+	PR tree-optimization/121131
+	* gimple-fold.cc (fold_nonarray_ctor_reference): Use
+	TREE_INT_CST_LOW (TYPE_SIZE ()) instead of
+	GET_MODE_BITSIZE (SCALAR_INT_TYPE_MODE ()) for BLKmode BITINT_TYPEs.
+	Don't compute encoding_size at all for little endian targets.
+
+2025-07-17  H.J. Lu  <hjl.tools@gmail.com>
+
+	Backported from master:
+	2025-07-03  H.J. Lu  <hjl.tools@gmail.com>
+
+	PR target/120908
+	* config/i386/i386.cc (legitimize_tls_address): Pass RDI to
+	gen_tls_local_dynamic_64.
+	* config/i386/i386.md (*tls_global_dynamic_64_largepic): Add
+	RDI clobber and use it to generate LEA.
+	(*tls_local_dynamic_64_<mode>): Likewise.
+	(*tls_local_dynamic_base_64_largepic): Likewise.
+	(@tls_local_dynamic_64_<mode>): Add a clobber.
+
+2025-07-17  H.J. Lu  <hjl.tools@gmail.com>
+
+	Backported from master:
+	2025-07-02  H.J. Lu  <hjl.tools@gmail.com>
+
+	PR target/120908
+	* config/i386/i386.cc (legitimize_tls_address): Pass RDI to
+	gen_tls_global_dynamic_64.
+	* config/i386/i386.md (*tls_global_dynamic_64_<mode>): Add RDI
+	clobber and use it to generate LEA.
+	(@tls_global_dynamic_64_<mode>): Add a clobber.
+
+2025-07-14  Haochen Jiang  <haochen.jiang@intel.com>
+
+	* config/i386/i386.h (PTA_PANTHERLAKE): Revmoe KL and WIDEKL.
+	(PTA_CLEARWATERFOREST): Ditto.
+	* doc/invoke.texi: Revise documentation.
+
+2025-07-06  Georg-Johann Lay  <avr@gjlay.de>
+
+	* config/avr/avr-mcus.def (avr32da28s, avr32da32s, avr32da48s)
+	(avr64da28s, avr64da32s, avr64da48s avr64da64s)
+	(avr128da28s, avr128da32s, avr128da48s, avr128da64s): Add devices.
+	* doc/avr-mmcu.texi: Rebuild.
+
+2025-07-03  Richard Sandiford  <richard.sandiford@arm.com>
+
+	Backported from master:
+	2025-06-12  Richard Sandiford  <richard.sandiford@arm.com>
+
+	PR target/120624
+	* config/aarch64/aarch64.md (SME_STATE_REGNUM): Expand on comments.
+	* config/aarch64/aarch64-sme.md (aarch64_restore_za): Also set
+	SME_STATE_REGNUM
+
+2025-06-27  Eric Botcazou  <ebotcazou@adacore.com>
+
+	* gimple-fold.cc (fold_const_aggregate_ref_1) <COMPONENT_REF>:
+	Bail out immediately if the reference has reverse storage order.
+	* tree-ssa-sccvn.cc (fully_constant_vn_reference_p): Likewise.
+
+2025-06-25  Haochen Jiang  <haochen.jiang@intel.com>
+
+	* config/i386/i386.h (PTA_ALDERLAKE): Use PTA_GOLDMONT_PLUS
+	as base to remove PTA_CLDEMOTE.
+	(PTA_SIERRAFOREST): Add PTA_CLDEMOTE since PTA_ALDERLAKE
+	does not include that anymore.
+	* doc/invoke.texi: Update texi file.
+
+2025-06-20  Richard Biener  <rguenther@suse.de>
+
+	Backported from master:
+	2024-09-11  Richard Biener  <rguenther@suse.de>
+
+	PR tree-optimization/116674
+	* tree-vect-stmts.cc (vectorizable_simd_clone_call): Support
+	re-analysis.
+
+2025-06-19  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-06-19  Jakub Jelinek  <jakub@redhat.com>
+
+	PR middle-end/120631
+	* dfp.cc (decimal_real_to_integer): Use result multiplication not just
+	when precision > 128 and dn.exponent > 19, but when precision > 64
+	and dn.exponent > 0.
+
+2025-06-19  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-06-18  Jakub Jelinek  <jakub@redhat.com>
+
+	PR middle-end/120631
+	* real.cc (decimal_from_integer): Add digits argument, if larger than
+	256, use XALLOCAVEC allocated buffer.
+	(real_from_integer): Pass val_in's precision divided by 3 to
+	decimal_from_integer.
+	* dfp.cc (decimal_real_to_integer): For precision > 128 if finite
+	and exponent is large, decrease exponent and multiply resulting
+	wide_int by powers of 10^19.
+
+2025-06-13  Richard Earnshaw  <rearnsha@arm.com>
+
+	Backported from master:
+	2025-03-25  Richard Earnshaw  <rearnsha@arm.com>
+
+	PR middle-end/117811
+	* optabs.cc (expand_binop_directly): Remove LAST as an argument,
+	instead record the last insn on entry.  Only delete insns if
+	we need to restart and restart by calling ourself, not expand_binop.
+	(expand_binop): Update callers to expand_binop_directly.  If it
+	fails to expand the operation, delete back to LAST.
+
+2025-06-13  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-06-12  Jakub Jelinek  <jakub@redhat.com>
+
+	PR tree-optimization/120638
+	* tree-ssa-math-opts.cc (pass_cse_reciprocals::execute): Call
+	reset_flow_sensitive_info on arg1.
+
+2025-06-13  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-06-05  Jakub Jelinek  <jakub@redhat.com>
+
+	PR middle-end/120547
+	* real.cc (real_from_integer): Remove maxbitlen variable, use
+	len instead of that.  When shifting right, or in 1 if any of the
+	shifted away bits are non-zero.  Formatting fix.
+
+2025-06-13  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-05-20  Jakub Jelinek  <jakub@redhat.com>
+
+	* tree-chrec.cc (convert_affine_scev): Use signed_type_for instead of
+	build_nonstandard_integer_type.
+
+2025-06-05  Eric Botcazou  <ebotcazou@adacore.com>
+
+	* tree-vect-data-refs.cc (vect_can_force_dr_alignment_p): Return
+	false if the variable has no symtab node.
+
+2025-05-30  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-04-17  Jakub Jelinek  <jakub@redhat.com>
+
+	PR target/119834
+	* config/s390/s390.md (define_split after *cpymem_short): Use
+	(clobber (match_scratch N)) instead of (clobber (scratch)).  Use
+	(match_dup 4) and operands[4] instead of (match_dup 3) and operands[3]
+	in the last of those.
+	(define_split after *clrmem_short): Use (clobber (match_scratch N))
+	instead of (clobber (scratch)).
+	(define_split after *cmpmem_short): Likewise.
+
+2025-05-26  Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>
+
+	Backported from master:
+	2025-05-14  Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>
+
+	* config/s390/vector.md: Fix tf_to_fprx2 by using vlr instead of
+	ldr.
+
+2025-05-26  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-02-27  Jakub Jelinek  <jakub@redhat.com>
+
+	PR middle-end/118819
+	* alias.cc (memrefs_conflict_p): Perform arithmetics on c, xsize and
+	ysize in poly_offset_int and return -1 if it is not representable in
+	poly_int64.
+
+2025-05-26  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-02-05  Jakub Jelinek  <jakub@redhat.com>
+
+	PR rtl-optimization/117239
+	* cselib.cc (cselib_init): Remove spurious closing paren in
+	the #ifdef STACK_ADDRESS_OFFSET specific code.
+
+2025-05-26  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-02-05  Jakub Jelinek  <jakub@redhat.com>
+
+	PR rtl-optimization/117239
+	* cselib.cc: Include predict.h.
+	(callmem): Change type from rtx to rtx[2].
+	(cselib_preserve_only_values): Use callmem[0] rather than callmem.
+	(cselib_invalidate_mem): Optimize and don't try to invalidate
+	for the mem_rtx == callmem[1] case MEMs which clearly can't be
+	below the stack pointer.
+	(cselib_process_insn): Use callmem[0] rather than callmem.
+	For const/pure calls also call cselib_invalidate_mem (callmem[1])
+	in !ACCUMULATE_OUTGOING_ARGS or cfun->calls_alloca functions.
+	(cselib_init): Initialize callmem[0] rather than callmem and also
+	initialize callmem[1].
+
+2025-05-26  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2024-11-28  Jakub Jelinek  <jakub@redhat.com>
+
+	PR tree-optimization/117358
+	* gimple-fold.cc (gimple_fold_builtin_memory_op): Punt if stmt has no
+	vdef in ssa form.
+	(gimple_fold_builtin_bcmp): Punt if stmt has no vuse in ssa form.
+	(gimple_fold_builtin_bcopy): Punt if stmt has no vdef in ssa form.
+	(gimple_fold_builtin_bzero): Likewise.
+	(gimple_fold_builtin_memset): Likewise.  Use return false instead of
+	return NULL_TREE.
+	(gimple_fold_builtin_strcpy): Punt if stmt has no vdef in ssa form.
+	(gimple_fold_builtin_strncpy): Likewise.
+	(gimple_fold_builtin_strchr): Punt if stmt has no vuse in ssa form.
+	(gimple_fold_builtin_strstr): Likewise.
+	(gimple_fold_builtin_strcat): Punt if stmt has no vdef in ssa form.
+	(gimple_fold_builtin_strcat_chk): Likewise.
+	(gimple_fold_builtin_strncat): Likewise.
+	(gimple_fold_builtin_strncat_chk): Likewise.
+	(gimple_fold_builtin_string_compare): Likewise.
+	(gimple_fold_builtin_fputs): Likewise.
+	(gimple_fold_builtin_memory_chk): Likewise.
+	(gimple_fold_builtin_stxcpy_chk): Likewise.
+	(gimple_fold_builtin_stxncpy_chk): Likewise.
+	(gimple_fold_builtin_stpcpy): Likewise.
+	(gimple_fold_builtin_snprintf_chk): Likewise.
+	(gimple_fold_builtin_sprintf_chk): Likewise.
+	(gimple_fold_builtin_sprintf): Likewise.
+	(gimple_fold_builtin_snprintf): Likewise.
+	(gimple_fold_builtin_fprintf): Likewise.
+	(gimple_fold_builtin_printf): Likewise.
+	(gimple_fold_builtin_realloc): Likewise.
+
+2025-05-25  Michael J. Eager  <eager@eagercon.com>
+
+	PR target/86772
+	Tracking CVE-2017-5753
+	* config/microblaze/microblaze.cc (TARGET_HAVE_SPECULATION_SAFE_VALUE):
+	Define to speculation_save_value_not_needed
+
 2025-05-23  Release Manager
 
 	* GCC 14.3.0 released.
--- a/src/gcc/DATESTAMP
+++ b/src/gcc/DATESTAMP
@@ -1 +1 @@
-20250523
+20260316
--- a/src/gcc/ada/ChangeLog
+++ b/src/gcc/ada/ChangeLog
@@ -1,3 +1,100 @@
+2026-03-14  Matthias Klose  <doko@gcc.gnu.org>
+
+	PR ada/107475
+	* Makefile.rtl (s390% linux%): Define MISCLIB.
+	(arm% linux-gnueabi%): Likewise.
+	(%x32 linux%): Likewise.
+
+2026-02-28  Eric Botcazou  <ebotcazou@adacore.com>
+
+	PR ada/124285
+	* gcc-interface/decl.cc (components_to_record): Force a packed
+	layout for the innermost variant of an unchecked union type with
+	fixed part and full representation clause.
+
+2026-02-25  Eric Botcazou  <ebotcazou@adacore.com>
+
+	PR ada/124226
+	* sem_res.adb (Resolve_Implicit_Dereference): Move declaration to...
+	* sem_res.ads (Resolve_Implicit_Dereference): ...here.
+	* sem_attr.adb (Resolve_Attribute) <Attribute_Access>: Also call
+	Resolve_Implicit_Dereference when resolving a protected operation.
+
+2026-02-20  Eric Botcazou  <ebotcazou@adacore.com>
+
+	* libgnat/s-stposu.adb (Finalize_Pool): Pass a local copy of the
+	handle in the call to Finalize_And_Deallocate.
+
+2026-01-30  Eric Botcazou  <ebotcazou@adacore.com>
+
+	PR ada/123867
+	* sem_ch10.adb (Analyze_Compilation_Unit): Output info message
+	when -gnatdi is specified.
+	(Install_Parents): Likewise.  Set the Is_Visible_Lib_Unit flag
+	on the unit.
+	(Install_Private_With_Clauses): Do not output info message here.
+	(Remove_Parents): Output info message when -gnatdi is specified
+	and clear the Is_Visible_Lib_Unit flag on the unit.
+
+2025-12-26  Eric Botcazou  <ebotcazou@gcc.gnu.org>
+
+	PR ada/123289
+	* sem_ch13.adb (Resolve_Aspect_Aggregate.Resolve_Operation): Give
+	an error if the operation's name denotes more than one subprogram.
+
+2025-12-22  Eric Botcazou  <ebotcazou@adacore.com>
+
+	PR ada/123060
+	* gcc-interface/utils.cc (update_pointer_to): Streamline.
+
+2025-12-22  Eric Botcazou  <ebotcazou@adacore.com>
+
+	PR ada/123060
+	* gcc-interface/utils.cc (update_pointer_to): Preserve the alias
+	sets present on the old pointer and old reference, if any.
+
+2025-12-15  Eric Botcazou  <ebotcazou@adacore.com>
+
+	PR ada/123138
+	* exp_attr.adb (Expand_N_Attribute_Reference) <Attribute_Reduce>:
+	Override a universal numeric type only if the prefix is not an
+	aggregate.
+
+2025-12-15  Eric Botcazou  <ebotcazou@adacore.com>
+
+	PR ada/123060
+	* gcc-interface/utils.cc (update_pointer_to): Synthesize a new
+	TYPE_CANONICAL for the old pointer type in the case where there
+	is no new pointer type.  Likewise for references.
+
+2025-10-20  Eric Botcazou  <ebotcazou@adacore.com>
+
+	PR ada/107536
+	* exp_ch2.adb (Expand_Renaming): Mark the entity as referenced.
+
+2025-10-05  Steve Baird  <baird@adacore.com>
+
+	PR ada/113536
+	* exp_attr.adb:	Move computation of Accum_Typ entirely into the
+	function Build_Stat.
+
+2025-07-03  Eric Botcazou  <ebotcazou@adacore.com>
+
+	* gcc-interface/Makefile.in (gnatlib-sjlj): Delete.
+	(gnatlib-zcx): Do not modify Frontend_Exceptions constant.
+	* libgnat/system-linux-loongarch.ads (Frontend_Exceptions): Delete.
+
+2025-07-03  Eric Botcazou  <ebotcazou@adacore.com>
+
+	* gcc-interface/decl.cc (gnat_to_gnu_component_type): Validate the
+	Component_Size like the size of a type only if the component type
+	is actually packed.
+
+2025-07-03  Eric Botcazou  <ebotcazou@adacore.com>
+
+	* exp_ch4.adb (Handle_Changed_Representation): Alphabetize local
+	variables.  Set the No_Finalize_Actions flag on the assignment.
+
 2025-05-23  Release Manager
 
 	* GCC 14.3.0 released.
--- a/src/gcc/ada/Makefile.rtl
+++ b/src/gcc/ada/Makefile.rtl
@@ -1842,6 +1842,7 @@ ifeq ($(strip $(filter-out s390% linux%,$(target_cpu) $(target_os))),)
   EXTRA_GNATRTL_TASKING_OBJS=s-linux.o
   EH_MECHANISM=-gcc
   THREADSLIB = -lpthread
+  MISCLIB = -ldl
   GNATLIB_SHARED = gnatlib-shared-dual
   LIBRARY_VERSION := $(LIB_VERSION)
 endif
@@ -2293,6 +2294,7 @@ ifeq ($(strip $(filter-out arm% linux-gnueabi%,$(target_cpu) $(target_os))),)
   EXTRA_GNATRTL_TASKING_OBJS=s-linux.o
   EH_MECHANISM=-arm
   THREADSLIB = -lpthread
+  MISCLIB = -ldl
   GNATLIB_SHARED = gnatlib-shared-dual
   GMEM_LIB = gmemlib
   LIBRARY_VERSION := $(LIB_VERSION)
@@ -2653,6 +2655,7 @@ ifeq ($(strip $(filter-out %x32 linux%,$(target_cpu) $(target_os))),)
   EXTRA_GNATRTL_TASKING_OBJS=s-linux.o a-exetim.o
   EH_MECHANISM=-gcc
   THREADSLIB=-lpthread -lrt
+  MISCLIB = -ldl
   GNATLIB_SHARED=gnatlib-shared-dual
   GMEM_LIB = gmemlib
   LIBRARY_VERSION := $(LIB_VERSION)
--- a/src/gcc/ada/exp_attr.adb
+++ b/src/gcc/ada/exp_attr.adb
@@ -24,7 +24,6 @@
 ------------------------------------------------------------------------------
 
 with Accessibility;  use Accessibility;
-with Aspects;        use Aspects;
 with Atree;          use Atree;
 with Checks;         use Checks;
 with Debug;          use Debug;
@@ -6058,6 +6057,7 @@ package body Exp_Attr is
 
             begin
                if Nkind (E1) = N_Attribute_Reference then
+                  Accum_Typ := Base_Type (Entity (Prefix (E1)));
                   Stat := Make_Assignment_Statement (Loc,
                             Name => New_Occurrence_Of (Bnn, Loc),
                             Expression => Make_Attribute_Reference (Loc,
@@ -6068,12 +6068,15 @@ package body Exp_Attr is
                                 Comp)));
 
                elsif Ekind (Entity (E1)) = E_Procedure then
+                  Accum_Typ := Etype (First_Formal (Entity (E1)));
                   Stat := Make_Procedure_Call_Statement (Loc,
                             Name => New_Occurrence_Of (Entity (E1), Loc),
                                Parameter_Associations => New_List (
                                  New_Occurrence_Of (Bnn, Loc),
                                  Comp));
+
                else
+                  Accum_Typ := Etype (Entity (E1));
                   Stat := Make_Assignment_Statement (Loc,
                             Name => New_Occurrence_Of (Bnn, Loc),
                             Expression => Make_Function_Call (Loc,
@@ -6083,6 +6086,27 @@ package body Exp_Attr is
                                 Comp)));
                end if;
 
+               --  Try to cope if E1 is wrong because it is an overloaded
+               --  subprogram that happens to be the first candidate
+               --  on a homonym chain, but that resolution candidate turns
+               --  out to be the wrong one.
+               --  This workaround usually gets the right type, but it can
+               --  yield the wrong subtype of that type.
+
+               if Base_Type (Accum_Typ) /= Base_Type (Etype (N)) then
+                  Accum_Typ := Etype (N);
+               end if;
+
+               --  If Accum_Typ is a universal numeric type and the prefix
+               --  is not an aggregate, use its component type in order to
+               --  avoid resolution problems later on.
+
+               if Is_Universal_Numeric_Type (Accum_Typ) then
+                  if Nkind (Prefix (N)) /= N_Aggregate then
+                     Accum_Typ := Component_Type (Etype (Prefix (N)));
+                  end if;
+               end if;
+
                return Stat;
             end Build_Stat;
 
@@ -6133,10 +6157,6 @@ package body Exp_Attr is
                       End_Label => Empty,
                       Statements =>
                         New_List (Build_Stat (Relocate_Node (Expr))));
-
-                  --  Look at the context to find the type.
-
-                  Accum_Typ := Etype (N);
                end;
 
             else
@@ -6166,40 +6186,6 @@ package body Exp_Attr is
                       Statements => New_List (
                         Build_Stat (New_Occurrence_Of (Elem, Loc))));
 
-                  --  Look at the prefix to find the type. This is
-                  --  modeled on Analyze_Iterator_Specification in Sem_Ch5.
-
-                  declare
-                     Ptyp : constant Entity_Id :=
-                              Base_Type (Etype (Prefix (N)));
-
-                  begin
-                     if Is_Array_Type (Ptyp) then
-                        Accum_Typ := Component_Type (Ptyp);
-
-                     elsif Has_Aspect (Ptyp, Aspect_Iterable) then
-                        declare
-                           Element : constant Entity_Id :=
-                                       Get_Iterable_Type_Primitive
-                                         (Ptyp, Name_Element);
-                        begin
-                           if Present (Element) then
-                              Accum_Typ := Etype (Element);
-                           end if;
-                        end;
-
-                     else
-                        declare
-                           Element : constant Node_Id :=
-                                       Find_Value_Of_Aspect
-                                         (Ptyp, Aspect_Iterator_Element);
-                        begin
-                           if Present (Element) then
-                              Accum_Typ := Entity (Element);
-                           end if;
-                        end;
-                     end if;
-                  end;
                end;
             end if;
 
--- a/src/gcc/ada/exp_ch2.adb
+++ b/src/gcc/ada/exp_ch2.adb
@@ -704,9 +704,15 @@ package body Exp_Ch2 is
       T : constant Entity_Id := Etype (N);
 
    begin
+      --  Mark the entity as referenced since this reference is going away
+
+      Set_Referenced (E);
+
+      --  Now rewrite the reference as a copy of the renamed object
+
       Rewrite (N, New_Copy_Tree (Renamed_Object (E)));
 
-      --  We mark the copy as unanalyzed, so that it is sure to be reanalyzed
+      --  Mark the copy as unanalyzed to make sure that it is reanalyzed
       --  at the top level. This is needed in the packed case since we
       --  specifically avoided expanding packed array references when the
       --  renaming declaration was analyzed.
--- a/src/gcc/ada/exp_ch4.adb
+++ b/src/gcc/ada/exp_ch4.adb
@@ -11438,11 +11438,12 @@ package body Exp_Ch4 is
       -----------------------------------
 
       procedure Handle_Changed_Representation is
-         Temp : Entity_Id;
+         Cons : List_Id;
          Decl : Node_Id;
-         Odef : Node_Id;
          N_Ix : Node_Id;
-         Cons : List_Id;
+         Odef : Node_Id;
+         Stmt : Node_Id;
+         Temp : Entity_Id;
 
       begin
          --  Nothing else to do if no change of representation
@@ -11585,19 +11586,24 @@ package body Exp_Ch4 is
                 Defining_Identifier => Temp,
                 Object_Definition   => Odef);
 
-            Set_No_Initialization (Decl, True);
+            --  The temporary need not be initialized
+
+            Set_No_Initialization (Decl);
+
+            Stmt :=
+              Make_Assignment_Statement (Loc,
+                Name       => New_Occurrence_Of (Temp, Loc),
+                Expression => Relocate_Node (N));
+
+            --  And, therefore, cannot be finalized
+
+            Set_No_Finalize_Actions (Stmt);
 
             --  Insert required actions. It is essential to suppress checks
             --  since we have suppressed default initialization, which means
             --  that the variable we create may have no discriminants.
 
-            Insert_Actions (N,
-              New_List (
-                Decl,
-                Make_Assignment_Statement (Loc,
-                  Name       => New_Occurrence_Of (Temp, Loc),
-                  Expression => Relocate_Node (N))),
-                Suppress => All_Checks);
+            Insert_Actions (N, New_List (Decl, Stmt), Suppress => All_Checks);
 
             Rewrite (N, New_Occurrence_Of (Temp, Loc));
             return;
--- a/src/gcc/ada/gcc-interface/Makefile.in
+++ b/src/gcc/ada/gcc-interface/Makefile.in
@@ -822,35 +822,6 @@ gnatlib-shared:
 	     PICFLAG_FOR_TARGET="$(PICFLAG_FOR_TARGET)" \
 	     $(GNATLIB_SHARED)
 
-# When building a SJLJ runtime for VxWorks, we need to ensure that the extra
-# linker options needed for ZCX are not passed to prevent the inclusion of
-# useless objects and potential troubles from the presence of extra symbols
-# and references in some configurations.  The inhibition is performed by
-# commenting the pragma instead of deleting the line, as the latter might
-# result in getting multiple blank lines, hence possible style check errors.
-gnatlib-sjlj:
-	$(MAKE) $(FLAGS_TO_PASS) \
-	     EH_MECHANISM="" \
-	     MULTISUBDIR="$(MULTISUBDIR)" \
-	     THREAD_KIND="$(THREAD_KIND)" \
-	     LN_S="$(LN_S)" \
-	     ../stamp-gnatlib1-$(RTSDIR)
-	sed \
-	  -e 's/Frontend_Exceptions.*/Frontend_Exceptions       : constant Boolean := True;/' \
-	  -e 's/ZCX_By_Default.*/ZCX_By_Default            : constant Boolean := False;/' \
-	  $(RTSDIR)/system.ads > $(RTSDIR)/s.ads
-	$(MV) $(RTSDIR)/s.ads $(RTSDIR)/system.ads
-	$(MAKE) $(FLAGS_TO_PASS) \
-	     EH_MECHANISM="" \
-	     GNATLIBFLAGS="$(GNATLIBFLAGS)" \
-	     GNATLIBCFLAGS="$(GNATLIBCFLAGS)" \
-	     GNATLIBCFLAGS_FOR_C="$(GNATLIBCFLAGS_FOR_C)" \
-	     FORCE_DEBUG_ADAFLAGS="$(FORCE_DEBUG_ADAFLAGS)" \
-	     MULTISUBDIR="$(MULTISUBDIR)" \
-	     THREAD_KIND="$(THREAD_KIND)" \
-	     LN_S="$(LN_S)" \
-	     gnatlib
-
 gnatlib-zcx:
 	$(MAKE) $(FLAGS_TO_PASS) \
 	     EH_MECHANISM="-gcc" \
@@ -859,7 +830,6 @@ gnatlib-zcx:
 	     LN_S="$(LN_S)" \
 	     ../stamp-gnatlib1-$(RTSDIR)
 	sed \
-	  -e 's/Frontend_Exceptions.*/Frontend_Exceptions       : constant Boolean := False;/' \
 	  -e 's/ZCX_By_Default.*/ZCX_By_Default            : constant Boolean := True;/' \
 	  $(RTSDIR)/system.ads > $(RTSDIR)/s.ads
 	$(MV) $(RTSDIR)/s.ads $(RTSDIR)/system.ads
--- a/src/gcc/ada/gcc-interface/decl.cc
+++ b/src/gcc/ada/gcc-interface/decl.cc
@@ -5328,7 +5328,7 @@ gnat_to_gnu_component_type (Entity_Id gnat_array, bool definition,
   const bool is_bit_packed = Is_Bit_Packed_Array (gnat_array);
   tree gnu_type = gnat_to_gnu_type (gnat_type);
   tree gnu_comp_size;
-  bool has_packed_components;
+  bool has_packed_component;
   unsigned int max_align;
 
   /* If an alignment is specified, use it as a cap on the component type
@@ -5349,16 +5349,22 @@ gnat_to_gnu_component_type (Entity_Id gnat_array, bool definition,
       && !TYPE_FAT_POINTER_P (gnu_type)
       && tree_fits_uhwi_p (TYPE_SIZE (gnu_type)))
     {
-      gnu_type = make_packable_type (gnu_type, false, max_align);
-      has_packed_components = true;
+      tree gnu_packable_type = make_packable_type (gnu_type, false, max_align);
+      if (gnu_packable_type != gnu_type)
+	{
+	  gnu_type = gnu_packable_type;
+	  has_packed_component = true;
+	}
+      else
+	has_packed_component = false;
     }
   else
-    has_packed_components = is_bit_packed;
+    has_packed_component = is_bit_packed;
 
   /* Get and validate any specified Component_Size.  */
   gnu_comp_size
     = validate_size (Component_Size (gnat_array), gnu_type, gnat_array,
-		     has_packed_components ? TYPE_DECL : VAR_DECL, true,
+		     has_packed_component ? TYPE_DECL : VAR_DECL, true,
 		     Has_Component_Size_Clause (gnat_array), NULL, NULL);
 
   /* If the component type is a RECORD_TYPE that has a self-referential size,
@@ -8054,7 +8060,7 @@ typedef struct vinfo
 
    DEBUG_INFO is true if we need to write debug information about the type.
 
-   IN_VARIANT is true if the componennt list is that of a variant.
+   IN_VARIANT is true if the component list is that of a variant.
 
    FIRST_FREE_POS, if nonzero, is the first (lowest) free field position in
    the outer record type down to this variant level.  It is nonzero only if
@@ -8171,7 +8177,7 @@ components_to_record (Node_Id gnat_component_list, Entity_Id gnat_record_type,
       tree gnu_union_type;
       tree this_first_free_pos, gnu_variant_list = NULL_TREE;
       bool union_field_needs_strict_alignment = false;
-      bool innermost_variant_level = true;
+      bool innermost_of_unchecked_union = false;
       auto_vec <vinfo_t, 16> variant_types;
       vinfo_t *gnu_variant;
       unsigned int variants_align = 0;
@@ -8220,15 +8226,19 @@ components_to_record (Node_Id gnat_component_list, Entity_Id gnat_record_type,
       /* For an unchecked union with a fixed part, we need to compute whether
 	 we are at the innermost level of the variant part.  */
       if (unchecked_union && gnu_field_list)
-	for (variant = First_Non_Pragma (Variants (gnat_variant_part));
-	     Present (variant);
-	     variant = Next_Non_Pragma (variant))
-	  if (Present (Component_List (variant))
-	      && Present (Variant_Part (Component_List (variant))))
-	    {
-	      innermost_variant_level = false;
-	      break;
-	    }
+	{
+	  innermost_of_unchecked_union = true;
+
+	  for (variant = First_Non_Pragma (Variants (gnat_variant_part));
+	       Present (variant);
+	       variant = Next_Non_Pragma (variant))
+	    if (Present (Component_List (variant))
+		&& Present (Variant_Part (Component_List (variant))))
+	      {
+		innermost_of_unchecked_union = false;
+		break;
+	      }
+	}
 
       /* We build the variants in two passes.  The bulk of the work is done in
 	 the first pass, that is to say translating the GNAT nodes, building
@@ -8275,17 +8285,17 @@ components_to_record (Node_Id gnat_component_list, Entity_Id gnat_record_type,
 	     the outer variant, so as to flatten the rep-ed layout as much as
 	     possible, the reason being that we cannot do any flattening when
 	     a subtype statically selects a variant later on, for example for
-	     an aggregate.  */
+	     an aggregate; in that case, we force a packed layout because the
+	     moved fields may overlap with packed bit-fields.  */
 	  has_rep
 	    = components_to_record (Component_List (variant), gnat_record_type,
-				    NULL_TREE, gnu_variant_type, packed,
+				    NULL_TREE, gnu_variant_type, packed ||
+				    (all_rep && innermost_of_unchecked_union),
 				    definition, !all_rep_and_size, all_rep,
 				    unchecked_union, true, needs_xv_encodings,
 				    true, this_first_free_pos,
 				    (all_rep || this_first_free_pos)
-				    && !(unchecked_union
-				         && gnu_field_list
-					 && innermost_variant_level)
+				    && !innermost_of_unchecked_union
 				    ? NULL : &gnu_rep_list);
 
 	  /* Translate the qualifier and annotate the GNAT node.  */
--- a/src/gcc/ada/gcc-interface/utils.cc
+++ b/src/gcc/ada/gcc-interface/utils.cc
@@ -4453,8 +4453,31 @@ update_pointer_to (tree old_type, tree new_type)
 	    new_ptr = TYPE_NEXT_PTR_TO (new_ptr);
 	  TYPE_NEXT_PTR_TO (new_ptr) = ptr;
 	}
-      else
-	TYPE_POINTER_TO (new_type) = ptr;
+      else if (ptr)
+	{
+	  TYPE_POINTER_TO (new_type) = ptr;
+
+	  /* If there is no pointer pointing to NEW_TYPE yet, re-compute the
+	     TYPE_CANONICAL of the old pointer but pointing to NEW_TYPE, like
+	     build_pointer_type would have done for such a pointer, because we
+	     will propagate it in the adjustment loop below.  But make sure to
+	     preserve an alias set already present on the old pointer.  */
+	  if (TYPE_STRUCTURAL_EQUALITY_P (new_type))
+	    SET_TYPE_STRUCTURAL_EQUALITY (ptr);
+	  else if (TYPE_CANONICAL (new_type) != new_type
+		   || (TYPE_REF_CAN_ALIAS_ALL (ptr)
+		       && !lookup_attribute ("may_alias",
+					     TYPE_ATTRIBUTES (new_type))))
+	    {
+	      const alias_set_type set
+		= TYPE_STRUCTURAL_EQUALITY_P (ptr)
+		  ? TYPE_ALIAS_SET (ptr)
+		  : TYPE_ALIAS_SET (TYPE_CANONICAL (ptr));
+	      TYPE_CANONICAL (ptr)
+		= build_pointer_type (TYPE_CANONICAL (new_type));
+	      TYPE_ALIAS_SET (TYPE_CANONICAL (ptr)) = set;
+	    }
+	}
 
       /* Now adjust them.  */
       for (; ptr; ptr = TYPE_NEXT_PTR_TO (ptr))
@@ -4474,8 +4497,31 @@ update_pointer_to (tree old_type, tree new_type)
 	    new_ref = TYPE_NEXT_REF_TO (new_ref);
 	  TYPE_NEXT_REF_TO (new_ref) = ref;
 	}
-      else
-	TYPE_REFERENCE_TO (new_type) = ref;
+      else if (ref)
+	{
+	  TYPE_REFERENCE_TO (new_type) = ref;
+
+	  /* If there is no reference pointing to NEW_TYPE yet, re-compute the
+	     TYPE_CANONICAL of the old reference but pointing to NEW_TYPE, like
+	     build_reference_type would have done for such a reference, because
+	     we will propagate it in the adjustment loop below.  But make sure
+	     to preserve an alias set already present on the old reference.  */
+	  if (TYPE_STRUCTURAL_EQUALITY_P (new_type))
+	    SET_TYPE_STRUCTURAL_EQUALITY (ref);
+	  else if (TYPE_CANONICAL (new_type) != new_type
+		   || (TYPE_REF_CAN_ALIAS_ALL (ref)
+		       && !lookup_attribute ("may_alias",
+					     TYPE_ATTRIBUTES (new_type))))
+	    {
+	      const alias_set_type set
+		= TYPE_STRUCTURAL_EQUALITY_P (ref)
+		  ? TYPE_ALIAS_SET (ref)
+		  : TYPE_ALIAS_SET (TYPE_CANONICAL (ref));
+	      TYPE_CANONICAL (ref)
+		= build_reference_type (TYPE_CANONICAL (new_type));
+	      TYPE_ALIAS_SET (TYPE_CANONICAL (ref)) = set;
+	    }
+	}
 
       /* Now adjust them.  */
       for (; ref; ref = TYPE_NEXT_REF_TO (ref))
--- a/src/gcc/ada/libgnat/s-stposu.adb
+++ b/src/gcc/ada/libgnat/s-stposu.adb
@@ -523,6 +523,7 @@ package body System.Storage_Pools.Subpools is
    procedure Finalize_Pool (Pool : in out Root_Storage_Pool_With_Subpools) is
       Curr_Ptr : SP_Node_Ptr;
       Ex_Occur : Exception_Occurrence;
+      Handle   : Subpool_Handle;
       Raised   : Boolean := False;
 
       function Is_Empty_List (L : not null SP_Node_Ptr) return Boolean;
@@ -557,16 +558,13 @@ package body System.Storage_Pools.Subpools is
       while not Is_Empty_List (Pool.Subpools'Unchecked_Access) loop
          Curr_Ptr := Pool.Subpools.Next;
 
-         --  Perform the following actions:
-
-         --    1) Finalize all objects chained on the subpool's master
-         --    2) Remove the subpool from the owner's list of subpools
-         --    3) Deallocate the doubly linked list node associated with the
-         --       subpool.
-         --    4) Call Deallocate_Subpool
+         --  Finalize and deallocate the subpool. Beware that the node pointed
+         --  to by Curr_Ptr will be deallocated so may not be passed as actual
+         --  in the call, since the formal parameter is In Out.
 
          begin
-            Finalize_And_Deallocate (Curr_Ptr.Subpool);
+            Handle := Curr_Ptr.Subpool;
+            Finalize_And_Deallocate (Handle);
 
          exception
             when Fin_Occur : others =>
--- a/src/gcc/ada/libgnat/system-linux-loongarch.ads
+++ b/src/gcc/ada/libgnat/system-linux-loongarch.ads
@@ -139,7 +139,6 @@ private
    Always_Compatible_Rep     : constant Boolean := False;
    Suppress_Standard_Library : constant Boolean := False;
    Use_Ada_Main_Program_Name : constant Boolean := False;
-   Frontend_Exceptions       : constant Boolean := False;
    ZCX_By_Default            : constant Boolean := True;
 
 end System;
--- a/src/gcc/ada/sem_attr.adb
+++ b/src/gcc/ada/sem_attr.adb
@@ -11458,6 +11458,7 @@ package body Sem_Attr is
                end if;
 
                Resolve (Prefix (P));
+               Resolve_Implicit_Dereference (Prefix (P));
 
                if not Is_Overloaded (P) then
                   Generate_Reference (Entity (Selector_Name (P)), P);
--- a/src/gcc/ada/sem_ch10.adb
+++ b/src/gcc/ada/sem_ch10.adb
@@ -936,6 +936,20 @@ package body Sem_Ch10 is
 
       --  Now analyze the unit (package, subprogram spec, body) itself
 
+      if Debug_Flag_I then
+         if Nkind (Unit_Node) in N_Package_Declaration
+                               | N_Package_Renaming_Declaration
+                               | N_Subprogram_Declaration
+                               | N_Generic_Declaration
+           or else (Nkind (Unit_Node) = N_Subprogram_Body
+                     and then Acts_As_Spec (Unit_Node))
+         then
+            Write_Str ("install unit ");
+            Write_Name (Chars (Defining_Entity (Unit_Node)));
+            Write_Eol;
+         end if;
+      end if;
+
       Analyze (Unit_Node);
 
       if Warn_On_Redundant_Constructs then
@@ -4443,6 +4457,18 @@ package body Sem_Ch10 is
          end if;
       end if;
 
+      if Debug_Flag_I then
+         Write_Str ("install parent unit ");
+         Write_Name (Chars (P_Name));
+         Write_Eol;
+      end if;
+
+      --  Skip this for predefined units because of the rtsfind mechanism
+
+      if not In_Predefined_Unit (P_Name) then
+         Set_Is_Visible_Lib_Unit (P_Name);
+      end if;
+
       --  This is the recursive call that ensures all parents are loaded
 
       if Is_Child_Spec (P) then
@@ -4515,12 +4541,6 @@ package body Sem_Ch10 is
       Item   : Node_Id;
 
    begin
-      if Debug_Flag_I then
-         Write_Str ("install private with clauses of ");
-         Write_Name (Chars (P));
-         Write_Eol;
-      end if;
-
       if Nkind (Parent (Decl)) = N_Compilation_Unit then
          Item := First (Context_Items (Parent (Decl)));
          while Present (Item) loop
@@ -7076,6 +7096,18 @@ package body Sem_Ch10 is
          --  in the reverse order of their installation.
 
          Remove_Parents (P);
+
+         if Debug_Flag_I then
+            Write_Str ("remove parent unit ");
+            Write_Name (Chars (P_Name));
+            Write_Eol;
+         end if;
+
+         --  Skip this for predefined units because of the rtsfind mechanism
+
+         if not In_Predefined_Unit (P_Name) then
+            Set_Is_Visible_Lib_Unit (P_Name, False);
+         end if;
       end if;
    end Remove_Parents;
 
--- a/src/gcc/ada/sem_ch13.adb
+++ b/src/gcc/ada/sem_ch13.adb
@@ -16793,15 +16793,12 @@ package body Sem_Ch13 is
       -----------------------
 
       procedure Resolve_Operation (Subp_Id : Node_Id) is
-         Subp : Entity_Id;
-
          I  : Interp_Index;
          It : Interp;
 
       begin
          if not Is_Overloaded (Subp_Id) then
-            Subp := Entity (Subp_Id);
-            if not Pred (Subp) then
+            if not Pred (Entity (Subp_Id)) then
                Error_Msg_NE
                  ("improper aggregate operation for&", Subp_Id, Typ);
             end if;
@@ -16811,9 +16808,21 @@ package body Sem_Ch13 is
             Get_First_Interp (Subp_Id, I, It);
             while Present (It.Nam) loop
                if Pred (It.Nam) then
+                  if Present (Entity (Subp_Id)) then
+                     --  ??? Cope with the obsolete renaming of Append_Vector
+                     --  in Ada.Containers.Vectors retained for compatibility.
+
+                     if No (Alias (Entity (Subp_Id)))
+                       and then No (Alias (It.Nam))
+                     then
+                        Error_Msg_N
+                          ("& must denote exactly one subprogram", Subp_Id);
+                     end if;
+
+                     exit;
+                  end if;
                   Set_Is_Overloaded (Subp_Id, False);
                   Set_Entity (Subp_Id, It.Nam);
-                  exit;
                end if;
 
                Get_Next_Interp (I, It);
--- a/src/gcc/ada/sem_res.adb
+++ b/src/gcc/ada/sem_res.adb
@@ -256,12 +256,6 @@ package body Sem_Res is
    --  is the context type, which is used when the operation is a protected
    --  function with no arguments, and the return value is indexed.
 
-   procedure Resolve_Implicit_Dereference (P : Node_Id);
-   --  Called when P is the prefix of an indexed component, or of a selected
-   --  component, or of a slice. If P is of an access type, we unconditionally
-   --  rewrite it as an explicit dereference. This ensures that the expander
-   --  and the code generator have a fully explicit tree to work with.
-
    procedure Resolve_Intrinsic_Operator (N : Node_Id; Typ : Entity_Id);
    --  A call to a user-defined intrinsic operator is rewritten as a call to
    --  the corresponding predefined operator, with suitable conversions. Note
--- a/src/gcc/ada/sem_res.ads
+++ b/src/gcc/ada/sem_res.ads
@@ -125,6 +125,12 @@ package Sem_Res is
    --  own type. For now we assume that the prefix cannot be overloaded and
    --  the name of the entry plays no role in the resolution.
 
+   procedure Resolve_Implicit_Dereference (P : Node_Id);
+   --  Called when P is the prefix of an indexed component, or of a selected
+   --  component, or of a slice. If P is of an access type, we unconditionally
+   --  rewrite it as an explicit dereference. This ensures that the expander
+   --  and the code generator have a fully explicit tree to work with.
+
    procedure Resolve_Membership_Equality (N : Node_Id; Typ : Entity_Id);
    --  Resolve the equality operator in an individual membership test
 
--- a/src/gcc/alias.cc
+++ b/src/gcc/alias.cc
@@ -951,7 +951,12 @@ get_alias_set (tree t)
   else
     {
       t = TYPE_CANONICAL (t);
-      gcc_checking_assert (!TYPE_STRUCTURAL_EQUALITY_P (t));
+      gcc_checking_assert (TYPE_CANONICAL (t) == t);
+      if (t != TYPE_MAIN_VARIANT (t))
+	{
+	  t = TYPE_MAIN_VARIANT (t);
+	  gcc_checking_assert (TYPE_CANONICAL (t) == t);
+	}
     }
 
   /* If this is a type with a known alias set, return it.  */
@@ -2533,19 +2538,39 @@ memrefs_conflict_p (poly_int64 xsize, rtx x, poly_int64 ysize, rtx y,
 	    return memrefs_conflict_p (xsize, x1, ysize, y1, c);
 	  if (poly_int_rtx_p (x1, &cx1))
 	    {
+	      poly_offset_int co = c;
+	      co -= cx1;
 	      if (poly_int_rtx_p (y1, &cy1))
-		return memrefs_conflict_p (xsize, x0, ysize, y0,
-					   c - cx1 + cy1);
+		{
+		  co += cy1;
+		  if (!co.to_shwi (&c))
+		    return -1;
+		  return memrefs_conflict_p (xsize, x0, ysize, y0, c);
+		}
+	      else if (!co.to_shwi (&c))
+		return -1;
 	      else
-		return memrefs_conflict_p (xsize, x0, ysize, y, c - cx1);
+		return memrefs_conflict_p (xsize, x0, ysize, y, c);
 	    }
 	  else if (poly_int_rtx_p (y1, &cy1))
-	    return memrefs_conflict_p (xsize, x, ysize, y0, c + cy1);
+	    {
+	      poly_offset_int co = c;
+	      co += cy1;
+	      if (!co.to_shwi (&c))
+		return -1;
+	      return memrefs_conflict_p (xsize, x, ysize, y0, c);
+	    }
 
 	  return -1;
 	}
       else if (poly_int_rtx_p (x1, &cx1))
-	return memrefs_conflict_p (xsize, x0, ysize, y, c - cx1);
+	{
+	  poly_offset_int co = c;
+	  co -= cx1;
+	  if (!co.to_shwi (&c))
+	    return -1;
+	  return memrefs_conflict_p (xsize, x0, ysize, y, c);
+	}
     }
   else if (GET_CODE (y) == PLUS)
     {
@@ -2561,7 +2586,13 @@ memrefs_conflict_p (poly_int64 xsize, rtx x, poly_int64 ysize, rtx y,
 
       poly_int64 cy1;
       if (poly_int_rtx_p (y1, &cy1))
-	return memrefs_conflict_p (xsize, x, ysize, y0, c + cy1);
+	{
+	  poly_offset_int co = c;
+	  co += cy1;
+	  if (!co.to_shwi (&c))
+	    return -1;
+	  return memrefs_conflict_p (xsize, x, ysize, y0, c);
+	}
       else
 	return -1;
     }
@@ -2614,8 +2645,16 @@ memrefs_conflict_p (poly_int64 xsize, rtx x, poly_int64 ysize, rtx y,
 	  if (maybe_gt (xsize, 0))
 	    xsize = -xsize;
 	  if (maybe_ne (xsize, 0))
-	    xsize += sc + 1;
-	  c -= sc + 1;
+	    {
+	      poly_offset_int xsizeo = xsize;
+	      xsizeo += sc + 1;
+	      if (!xsizeo.to_shwi (&xsize))
+		return -1;
+	    }
+	  poly_offset_int co = c;
+	  co -= sc + 1;
+	  if (!co.to_shwi (&c))
+	    return -1;
 	  return memrefs_conflict_p (xsize, canon_rtx (XEXP (x, 0)),
 				     ysize, y, c);
 	}
@@ -2629,8 +2668,16 @@ memrefs_conflict_p (poly_int64 xsize, rtx x, poly_int64 ysize, rtx y,
 	  if (maybe_gt (ysize, 0))
 	    ysize = -ysize;
 	  if (maybe_ne (ysize, 0))
-	    ysize += sc + 1;
-	  c += sc + 1;
+	    {
+	      poly_offset_int ysizeo = ysize;
+	      ysizeo += sc + 1;
+	      if (!ysizeo.to_shwi (&ysize))
+		return -1;
+	    }
+	  poly_offset_int co = c;
+	  co += sc + 1;
+	  if (!co.to_shwi (&c))
+	    return -1;
 	  return memrefs_conflict_p (xsize, x,
 				     ysize, canon_rtx (XEXP (y, 0)), c);
 	}
@@ -2641,7 +2688,11 @@ memrefs_conflict_p (poly_int64 xsize, rtx x, poly_int64 ysize, rtx y,
       poly_int64 cx, cy;
       if (poly_int_rtx_p (x, &cx) && poly_int_rtx_p (y, &cy))
 	{
-	  c += cy - cx;
+	  poly_offset_int co = c;
+	  co += cy;
+	  co -= cx;
+	  if (!co.to_shwi (&c))
+	    return -1;
 	  return offset_overlap_p (c, xsize, ysize);
 	}
 
--- a/src/gcc/analyzer/ChangeLog
+++ b/src/gcc/analyzer/ChangeLog
@@ -1,3 +1,16 @@
+2025-10-21  David Malcolm  <dmalcolm@redhat.com>
+
+	Backported from master:
+	2025-02-19  David Malcolm  <dmalcolm@redhat.com>
+
+	PR analyzer/118300
+	* kf.cc (class kf_ubsan_bounds): Replace this with...
+	(class kf_ubsan_noop): ...this.
+	(register_sanitizer_builtins): Use it to handle IFN_UBSAN_NULL,
+	IFN_UBSAN_BOUNDS, and IFN_UBSAN_PTR as nop-ops.
+	(register_known_functions): Drop handling of IFN_UBSAN_BOUNDS
+	here, as it's now handled by register_sanitizer_builtins above.
+
 2025-05-23  Release Manager
 
 	* GCC 14.3.0 released.
--- a/src/gcc/analyzer/kf.cc
+++ b/src/gcc/analyzer/kf.cc
@@ -2057,11 +2057,6 @@ private:
   const private_region m_private_reg;
 };
 
-class kf_ubsan_bounds : public internal_known_function
-{
-  /* Empty.  */
-};
-
 /* Handle calls to functions referenced by
    __attribute__((malloc(FOO))).  */
 
@@ -2198,6 +2193,13 @@ register_atomic_builtins (known_function_manager &kfm)
 	   make_unique<kf_atomic_fetch_op> (BIT_IOR_EXPR));
 }
 
+/* Handle calls to the various IFN_UBSAN_* with no return value.
+   For now, treat these as no-ops.  */
+
+class kf_ubsan_noop : public internal_known_function
+{
+};
+
 /* Handle calls to the various __builtin___ubsan_handle_*.
    These can return, but continuing after such a return
    isn't likely to be interesting to the user of the analyzer.
@@ -2215,6 +2217,15 @@ class kf_ubsan_handler : public internal_known_function
 static void
 register_sanitizer_builtins (known_function_manager &kfm)
 {
+  /* Handle calls to the various IFN_UBSAN_* with no return value.
+     For now, treat these as no-ops.  */
+  kfm.add (IFN_UBSAN_NULL,
+	   make_unique<kf_ubsan_noop> ());
+  kfm.add (IFN_UBSAN_BOUNDS,
+	   make_unique<kf_ubsan_noop> ());
+  kfm.add (IFN_UBSAN_PTR,
+	   make_unique<kf_ubsan_noop> ());
+
   kfm.add (BUILT_IN_UBSAN_HANDLE_NONNULL_ARG,
 	   make_unique<kf_ubsan_handler> ());
 }
@@ -2232,7 +2243,6 @@ register_known_functions (known_function_manager &kfm,
   /* Internal fns the analyzer has known_functions for.  */
   {
     kfm.add (IFN_BUILTIN_EXPECT, make_unique<kf_expect> ());
-    kfm.add (IFN_UBSAN_BOUNDS, make_unique<kf_ubsan_bounds> ());
   }
 
   /* GCC built-ins that do not correspond to a function
--- a/src/gcc/builtins.cc
+++ b/src/gcc/builtins.cc
@@ -9388,7 +9388,7 @@ fold_builtin_fabs (location_t loc, tree arg, tree type)
 static tree
 fold_builtin_abs (location_t loc, tree arg, tree type)
 {
-  if (!validate_arg (arg, INTEGER_TYPE))
+  if (!validate_arg (arg, INTEGER_TYPE) || !INTEGRAL_TYPE_P (type))
     return NULL_TREE;
 
   arg = fold_convert_loc (loc, type, arg);
--- a/src/gcc/c-family/ChangeLog
+++ b/src/gcc/c-family/ChangeLog
@@ -1,3 +1,65 @@
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-11-25  Jakub Jelinek  <jakub@redhat.com>
+
+	PR middle-end/120052
+	* c-ubsan.cc (ubsan_instrument_bounds): For VLAs use
+	1 instead of 0 as first IFN_UBSAN_BOUNDS argument and only
+	use the addend without TYPE_MAX_VALUE (TYPE_DOMAIN (type))
+	in the 3rd argument.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-11-25  Jakub Jelinek  <jakub@redhat.com>
+
+	PR middle-end/122624
+	* c-common.cc (c_common_get_alias_set): Fix up handling of
+	BITINT_TYPEs.  For unsigned _BitInt(1) always return -1.  For other
+	unsigned types set TYPE_ALIAS_SET to get_alias_set of corresponding
+	signed type and return that.  For signed types check if corresponding
+	unsigned type has TYPE_ALIAS_SET_KNOWN_P and if so copy its
+	TYPE_ALIAS_SET and return that.
+
+2026-03-14  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>
+
+	Backported from master:
+	2026-02-12  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>
+
+	PR c/105555
+	* c-common.cc (fold_offsetof): Handle REALPART_EXPR
+	and IMAGPART_EXPR.
+
+2025-10-14  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-10-09  Jakub Jelinek  <jakub@redhat.com>
+
+	PR c/122188
+	* c-gimplify.cc (c_gimplify_expr): Also gimplify the second operand
+	before the COND_EXPR and use in COND_EXPR result of gimplification.
+
+2025-10-14  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-10-08  Jakub Jelinek  <jakub@redhat.com>
+
+	PR c/122188
+	* c-gimplify.cc (c_gimplify_expr): Gimplify CALL_EXPR_ARG (*expr_p, 0)
+	instead of calling save_expr on it.
+
+2025-08-08  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-07-04  Jakub Jelinek  <jakub@redhat.com>
+
+	PR c/120837
+	* c-common.cc (pointer_int_sum): Rewrite the intop PLUS_EXPR or
+	MINUS_EXPR optimization into extension of both intop operands,
+	their separate multiplication and then addition/subtraction followed
+	by rest of pointer_int_sum handling after the multiplication.
+
 2025-05-23  Release Manager
 
 	* GCC 14.3.0 released.
--- a/src/gcc/c-family/c-common.cc
+++ b/src/gcc/c-family/c-common.cc
@@ -3420,20 +3420,41 @@ pointer_int_sum (location_t loc, enum tree_code resultcode,
 	 an overflow error if the constant is negative but INTOP is not.  */
       && (TYPE_OVERFLOW_UNDEFINED (TREE_TYPE (intop))
 	  || (TYPE_PRECISION (TREE_TYPE (intop))
-	      == TYPE_PRECISION (TREE_TYPE (ptrop)))))
-    {
-      enum tree_code subcode = resultcode;
-      tree int_type = TREE_TYPE (intop);
-      if (TREE_CODE (intop) == MINUS_EXPR)
-	subcode = (subcode == PLUS_EXPR ? MINUS_EXPR : PLUS_EXPR);
-      /* Convert both subexpression types to the type of intop,
-	 because weird cases involving pointer arithmetic
-	 can result in a sum or difference with different type args.  */
-      ptrop = build_binary_op (EXPR_LOCATION (TREE_OPERAND (intop, 1)),
-			       subcode, ptrop,
-			       convert (int_type, TREE_OPERAND (intop, 1)),
-			       true);
-      intop = convert (int_type, TREE_OPERAND (intop, 0));
+	      == TYPE_PRECISION (TREE_TYPE (ptrop))))
+      && TYPE_PRECISION (TREE_TYPE (intop)) <= TYPE_PRECISION (sizetype))
+    {
+      tree intop0 = TREE_OPERAND (intop, 0);
+      tree intop1 = TREE_OPERAND (intop, 1);
+      if (TYPE_PRECISION (TREE_TYPE (intop)) != TYPE_PRECISION (sizetype)
+	  || TYPE_UNSIGNED (TREE_TYPE (intop)) != TYPE_UNSIGNED (sizetype))
+	{
+	  tree optype = c_common_type_for_size (TYPE_PRECISION (sizetype),
+						TYPE_UNSIGNED (sizetype));
+	  intop0 = convert (optype, intop0);
+	  intop1 = convert (optype, intop1);
+	}
+      tree t = fold_build2_loc (loc, MULT_EXPR, TREE_TYPE (intop0), intop0,
+				convert (TREE_TYPE (intop0), size_exp));
+      intop0 = convert (sizetype, t);
+      if (TREE_OVERFLOW_P (intop0) && !TREE_OVERFLOW (t))
+	intop0 = wide_int_to_tree (TREE_TYPE (intop0), wi::to_wide (intop0));
+      t = fold_build2_loc (loc, MULT_EXPR, TREE_TYPE (intop1), intop1,
+			   convert (TREE_TYPE (intop1), size_exp));
+      intop1 = convert (sizetype, t);
+      if (TREE_OVERFLOW_P (intop1) && !TREE_OVERFLOW (t))
+	intop1 = wide_int_to_tree (TREE_TYPE (intop1), wi::to_wide (intop1));
+      intop = build_binary_op (EXPR_LOCATION (intop), TREE_CODE (intop),
+			       intop0, intop1, true);
+
+      /* Create the sum or difference.  */
+      if (resultcode == MINUS_EXPR)
+	intop = fold_build1_loc (loc, NEGATE_EXPR, sizetype, intop);
+
+      ret = fold_build_pointer_plus_loc (loc, ptrop, intop);
+
+      fold_undefer_and_ignore_overflow_warnings ();
+
+      return ret;
     }
 
   /* Convert the integer argument to a type the same size as sizetype
@@ -3900,8 +3921,7 @@ c_common_get_alias_set (tree t)
   /* The C standard specifically allows aliasing between signed and
      unsigned variants of the same type.  We treat the signed
      variant as canonical.  */
-  if ((TREE_CODE (t) == INTEGER_TYPE || TREE_CODE (t) == BITINT_TYPE)
-      && TYPE_UNSIGNED (t))
+  if (TREE_CODE (t) == INTEGER_TYPE && TYPE_UNSIGNED (t))
     {
       tree t1 = c_common_signed_type (t);
 
@@ -3909,6 +3929,41 @@ c_common_get_alias_set (tree t)
       if (t1 != t)
 	return get_alias_set (t1);
     }
+  if (TREE_CODE (t) == BITINT_TYPE)
+    {
+      /* For normal INTEGER_TYPEs (except ones built by
+	 build_nonstandard_integer_type), both signed and unsigned variants
+	 of the type are always reachable from GTY roots, so just calling
+	 get_alias_set on the signed type is ok.  For BITINT_TYPE and
+	 non-standard INTEGER_TYPEs, only unsigned could be used and the
+	 corresponding signed type could be created on demand and garbage
+	 collected as unused, so the alias set of unsigned type could keep
+	 changing.
+	 Avoid that by remembering the signed type alias set in
+	 TYPE_ALIAS_SET and also when being asked about !TYPE_UNSIGNED
+	 check if there isn't a corresponding unsigned type with
+	 TYPE_ALIAS_SET_KNOWN_P.  */
+      if (TYPE_UNSIGNED (t))
+	{
+	  /* There is no signed _BitInt(1).  */
+	  if (TYPE_PRECISION (t) == 1)
+	    return -1;
+	  tree t1 = c_common_signed_type (t);
+	  gcc_checking_assert (t != t1);
+	  TYPE_ALIAS_SET (t) = get_alias_set (t1);
+	  return TYPE_ALIAS_SET (t);
+	}
+      else
+	{
+	  tree t1 = c_common_unsigned_type (t);
+	  gcc_checking_assert (t != t1);
+	  if (TYPE_ALIAS_SET_KNOWN_P (t1))
+	    {
+	      TYPE_ALIAS_SET (t) = TYPE_ALIAS_SET (t1);
+	      return TYPE_ALIAS_SET (t);
+	    }
+	}
+    }
 
   return -1;
 }
@@ -6905,6 +6960,16 @@ fold_offsetof (tree expr, tree type, enum tree_code ctx)
     case ERROR_MARK:
       return expr;
 
+    case REALPART_EXPR:
+     return fold_offsetof (TREE_OPERAND (expr, 0), type, code);
+
+    case IMAGPART_EXPR:
+     base = fold_offsetof (TREE_OPERAND (expr, 0), type, code);
+     if (base == error_mark_node)
+	return base;
+     off = TYPE_SIZE_UNIT (TREE_TYPE (TREE_TYPE (TREE_OPERAND (expr, 0))));
+     break;
+
     case VAR_DECL:
       error ("cannot apply %<offsetof%> to static data member %qD", expr);
       return error_mark_node;
--- a/src/gcc/c-family/c-gimplify.cc
+++ b/src/gcc/c-family/c-gimplify.cc
@@ -908,7 +908,14 @@ c_gimplify_expr (tree *expr_p, gimple_seq *pre_p ATTRIBUTE_UNUSED,
 	    && call_expr_nargs (*expr_p) == 2
 	    && TREE_CODE (CALL_EXPR_ARG (*expr_p, 1)) != INTEGER_CST)
 	  {
-	    tree a = save_expr (CALL_EXPR_ARG (*expr_p, 0));
+	    tree a = CALL_EXPR_ARG (*expr_p, 0);
+	    if (gimplify_expr (&a, pre_p, post_p, is_gimple_val, fb_rvalue)
+		== GS_ERROR)
+	      return GS_ERROR;
+	    tree b = CALL_EXPR_ARG (*expr_p, 1);
+	    if (gimplify_expr (&b, pre_p, post_p, is_gimple_val, fb_rvalue)
+		== GS_ERROR)
+	      return GS_ERROR;
 	    tree c = build_call_expr_loc (EXPR_LOCATION (*expr_p),
 					  fndecl, 1, a);
 	    *expr_p = build3_loc (EXPR_LOCATION (*expr_p), COND_EXPR,
@@ -916,7 +923,7 @@ c_gimplify_expr (tree *expr_p, gimple_seq *pre_p ATTRIBUTE_UNUSED,
 				  build2_loc (EXPR_LOCATION (*expr_p),
 					      NE_EXPR, boolean_type_node, a,
 					      build_zero_cst (TREE_TYPE (a))),
-				  c, CALL_EXPR_ARG (*expr_p, 1));
+				  c, b);
 	    return GS_OK;
 	  }
 	break;
--- a/src/gcc/c-family/c-ubsan.cc
+++ b/src/gcc/c-family/c-ubsan.cc
@@ -407,7 +407,7 @@ ubsan_instrument_bounds (location_t loc, tree array, tree *index,
 
   bound = fold_build2 (PLUS_EXPR, TREE_TYPE (bound), bound,
 		       build_int_cst (TREE_TYPE (bound),
-		       1 + ignore_off_by_one));
+				      1 + ignore_off_by_one));
 
   /* Detect flexible array members and suchlike, unless
      -fsanitize=bounds-strict.  */
@@ -494,8 +494,16 @@ ubsan_instrument_bounds (location_t loc, tree array, tree *index,
     return NULL_TREE;
 
   *index = save_expr (*index);
-  /* Create a "(T *) 0" tree node to describe the array type.  */
-  tree zero_with_type = build_int_cst (build_pointer_type (type), 0);
+  /* If TYPE is a VLA, use 1 instead of 0 as the first argument and
+     use just the addend to TYPE_MAX_VALUE (domain) as the third argument
+     temporarily, so that gimplification can use TYPE_MAX_VALUE (domain)
+     after gimplify_type_sizes.  See PR120052.  */
+  bool is_vla = (TYPE_MAX_VALUE (domain)
+		 && TREE_CODE (TYPE_MAX_VALUE (domain)) != INTEGER_CST);
+  if (is_vla)
+    bound = build_int_cst (TREE_TYPE (bound), 1 + ignore_off_by_one);
+  /* Create a "(T *) 0" (or 1) tree node to describe the array type.  */
+  tree zero_with_type = build_int_cst (build_pointer_type (type), is_vla);
   return build_call_expr_internal_loc (loc, IFN_UBSAN_BOUNDS,
 				       void_type_node, 3, zero_with_type,
 				       *index, bound);
--- a/src/gcc/c/ChangeLog
+++ b/src/gcc/c/ChangeLog
@@ -1,3 +1,20 @@
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-02-18  Jakub Jelinek  <jakub@redhat.com>
+
+	PR c/123365
+	* c-decl.cc (build_compound_literal): Call relayout_decl
+	after completing the type.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-12-09  Jakub Jelinek  <jakub@redhat.com>
+
+	PR c/123018
+	* c-decl.cc (finish_struct): Diagnose bit-fields with vector type.
+
 2025-05-23  Release Manager
 
 	* GCC 14.3.0 released.
--- a/src/gcc/c/c-decl.cc
+++ b/src/gcc/c/c-decl.cc
@@ -6453,6 +6453,7 @@ build_compound_literal (location_t loc, tree type, tree init, bool non_const,
 
       type = TREE_TYPE (decl);
       TREE_TYPE (DECL_INITIAL (decl)) = type;
+      relayout_decl (decl);
     }
 
   if (type == error_mark_node || !COMPLETE_TYPE_P (type))
@@ -9581,6 +9582,13 @@ finish_struct (location_t loc, tree t, tree fieldlist, tree attributes,
 	  unsigned HOST_WIDE_INT width
 	    = tree_to_uhwi (DECL_INITIAL (field));
 	  tree type = TREE_TYPE (field);
+	  if (VECTOR_TYPE_P (type))
+	    {
+	      error_at (DECL_SOURCE_LOCATION (field),
+			"bit-field %qD has invalid type", field);
+	      type = TREE_TYPE (type);
+	      TREE_TYPE (field) = type;
+	    }
 	  if (width != TYPE_PRECISION (type))
 	    {
 	      if (TREE_CODE (type) == BITINT_TYPE
--- a/src/gcc/cfgexpand.cc
+++ b/src/gcc/cfgexpand.cc
@@ -3481,13 +3481,22 @@ expand_asm_stmt (gasm *stmt)
      Case in point is when the i386 backend moved from cc0 to a hard reg --
      maintaining source-level compatibility means automatically clobbering
      the flags register.  */
-  rtx_insn *after_md_seq = NULL;
   auto_vec<rtx> use_rvec;
   if (targetm.md_asm_adjust)
-    after_md_seq
+    {
+      rtx_insn *after_md_seq
 	= targetm.md_asm_adjust (output_rvec, input_rvec, input_mode,
 				 constraints, use_rvec, clobber_rvec,
 				 clobbered_regs, locus);
+      if (after_md_seq)
+	{
+	  push_to_sequence (after_md_seq);
+	  emit_insn (after_rtl_seq);
+	  after_rtl_seq = get_insns ();
+	  after_rtl_end = get_last_insn ();
+	  end_sequence ();
+	}
+    }
 
   /* Do not allow the hook to change the output and input count,
      lest it mess up the operand numbering.  */
@@ -3662,8 +3671,6 @@ expand_asm_stmt (gasm *stmt)
   if (fallthru_label)
     emit_label (fallthru_label);
 
-  if (after_md_seq)
-    emit_insn (after_md_seq);
   if (after_rtl_seq)
     {
       if (nlabels == 0)
--- a/src/gcc/cfgrtl.cc
+++ b/src/gcc/cfgrtl.cc
@@ -1595,54 +1595,20 @@ force_nonfallthru_and_redirect (edge e, basic_block target, rtx jump_label)
     }
 
   /* If e->src ends with asm goto, see if any of the ASM_OPERANDS_LABELs
-     don't point to the target or fallthru label.  */
+     don't point to the fallthru label.  */
   if (JUMP_P (BB_END (e->src))
       && target != EXIT_BLOCK_PTR_FOR_FN (cfun)
       && (e->flags & EDGE_FALLTHRU)
       && (note = extract_asm_operands (PATTERN (BB_END (e->src)))))
     {
-      int i, n = ASM_OPERANDS_LABEL_LENGTH (note);
-      bool adjust_jump_target = false;
+      int n = ASM_OPERANDS_LABEL_LENGTH (note);
 
-      for (i = 0; i < n; ++i)
-	{
-	  if (XEXP (ASM_OPERANDS_LABEL (note, i), 0) == BB_HEAD (e->dest))
-	    {
-	      LABEL_NUSES (XEXP (ASM_OPERANDS_LABEL (note, i), 0))--;
-	      XEXP (ASM_OPERANDS_LABEL (note, i), 0) = block_label (target);
-	      LABEL_NUSES (XEXP (ASM_OPERANDS_LABEL (note, i), 0))++;
-	      adjust_jump_target = true;
-	    }
-	  if (XEXP (ASM_OPERANDS_LABEL (note, i), 0) == BB_HEAD (target))
+      for (int i = 0; i < n; ++i)
+	if (XEXP (ASM_OPERANDS_LABEL (note, i), 0) == BB_HEAD (e->dest))
+	  {
 	    asm_goto_edge = true;
-	}
-      if (adjust_jump_target)
-	{
-	  rtx_insn *insn = BB_END (e->src);
-	  rtx note;
-	  rtx_insn *old_label = BB_HEAD (e->dest);
-	  rtx_insn *new_label = BB_HEAD (target);
-
-	  if (JUMP_LABEL (insn) == old_label)
-	    {
-	      JUMP_LABEL (insn) = new_label;
-	      note = find_reg_note (insn, REG_LABEL_TARGET, new_label);
-	      if (note)
-		remove_note (insn, note);
-	    }
-	  else
-	    {
-	      note = find_reg_note (insn, REG_LABEL_TARGET, old_label);
-	      if (note)
-		remove_note (insn, note);
-	      if (JUMP_LABEL (insn) != new_label
-		  && !find_reg_note (insn, REG_LABEL_TARGET, new_label))
-		add_reg_note (insn, REG_LABEL_TARGET, new_label);
-	    }
-	  while ((note = find_reg_note (insn, REG_LABEL_OPERAND, old_label))
-		 != NULL_RTX)
-	    XEXP (note, 0) = new_label;
-	}
+	    break;
+	  }
     }
 
   if (EDGE_COUNT (e->src->succs) >= 2 || abnormal_edge_flags || asm_goto_edge)
@@ -1681,15 +1647,45 @@ force_nonfallthru_and_redirect (edge e, basic_block target, rtx jump_label)
          and the reg crossing note should be removed.  */
       fixup_partition_crossing (new_edge);
 
-      /* If asm goto has any label refs to target's label,
-	 add also edge from asm goto bb to target.  */
+      /* If asm goto has any label refs to e->dest, change them to point
+	 to jump_block instead.  */
       if (asm_goto_edge)
 	{
-	  new_edge->probability /= 2;
-	  jump_block->count /= 2;
-	  edge new_edge2 = make_edge (new_edge->src, target,
-				      e->flags & ~EDGE_FALLTHRU);
-	  new_edge2->probability = probability - new_edge->probability;
+	  int n = ASM_OPERANDS_LABEL_LENGTH (note);
+
+	  for (int i = 0; i < n; ++i)
+	    if (XEXP (ASM_OPERANDS_LABEL (note, i), 0) == BB_HEAD (e->dest))
+	      {
+		LABEL_NUSES (XEXP (ASM_OPERANDS_LABEL (note, i), 0))--;
+		XEXP (ASM_OPERANDS_LABEL (note, i), 0)
+		  = block_label (jump_block);
+		LABEL_NUSES (XEXP (ASM_OPERANDS_LABEL (note, i), 0))++;
+	      }
+
+	  rtx_insn *insn = BB_END (new_edge->src);
+	  rtx note;
+	  rtx_insn *old_label = BB_HEAD (e->dest);
+	  rtx_insn *new_label = BB_HEAD (jump_block);
+
+	  if (JUMP_LABEL (insn) == old_label)
+	    {
+	      JUMP_LABEL (insn) = new_label;
+	      note = find_reg_note (insn, REG_LABEL_TARGET, new_label);
+	      if (note)
+		remove_note (insn, note);
+	    }
+	  else
+	    {
+	      note = find_reg_note (insn, REG_LABEL_TARGET, old_label);
+	      if (note)
+		remove_note (insn, note);
+	      if (JUMP_LABEL (insn) != new_label
+		  && !find_reg_note (insn, REG_LABEL_TARGET, new_label))
+		add_reg_note (insn, REG_LABEL_TARGET, new_label);
+	    }
+	  while ((note = find_reg_note (insn, REG_LABEL_OPERAND, old_label))
+		 != NULL_RTX)
+	    XEXP (note, 0) = new_label;
 	}
 
       new_bb = jump_block;
--- a/src/gcc/combine.cc
+++ b/src/gcc/combine.cc
@@ -4016,7 +4016,7 @@ try_combine (rtx_insn *i3, rtx_insn *i2, rtx_insn *i1, rtx_insn *i0,
 	  && !(GET_CODE (SET_DEST (set1)) == SUBREG
 	       && find_reg_note (i2, REG_DEAD,
 				 SUBREG_REG (SET_DEST (set1))))
-	  && SET_DEST (set1) != pc_rtx
+	  && !modified_between_p (SET_DEST (set1), i2, i3)
 	  && !reg_used_between_p (SET_DEST (set1), i2, i3)
 	  /* If I3 is a jump, ensure that set0 is a jump so that
 	     we do not create invalid RTL.  */
@@ -4032,7 +4032,7 @@ try_combine (rtx_insn *i3, rtx_insn *i2, rtx_insn *i1, rtx_insn *i0,
 	       && !(GET_CODE (SET_DEST (set0)) == SUBREG
 		    && find_reg_note (i2, REG_DEAD,
 				      SUBREG_REG (SET_DEST (set0))))
-	       && SET_DEST (set0) != pc_rtx
+	       && !modified_between_p (SET_DEST (set0), i2, i3)
 	       && !reg_used_between_p (SET_DEST (set0), i2, i3)
 	       /* If I3 is a jump, ensure that set1 is a jump so that
 		  we do not create invalid RTL.  */
@@ -11691,7 +11691,8 @@ recog_for_combine (rtx *pnewpat, rtx_insn *insn, rtx *pnotes)
       rtx src = SET_SRC (pat);
       if (CONSTANT_P (src)
 	  && !CONST_INT_P (src)
-	  && crtl->uses_const_pool)
+	  && crtl->uses_const_pool
+	  && SET_DEST (pat) != pc_rtx)
 	{
 	  machine_mode mode = GET_MODE (src);
 	  if (mode == VOIDmode)
--- a/src/gcc/common/config/avr/avr-common.cc
+++ b/src/gcc/common/config/avr/avr-common.cc
@@ -29,6 +29,13 @@
 /* Implement TARGET_OPTION_OPTIMIZATION_TABLE.  */
 static const struct default_options avr_option_optimization_table[] =
   {
+    // The lookup table from tree-swicth-conversion.cc lives in .rodata
+    // and hence consumes RAM on almost all devices.  As PR49857 has
+    // been rejected several times for non-technical reasons, just
+    // disable -ftree-switch-conversion by default.  But even with PR49857
+    // in place there remains PR81540, which cannot be filtered out since
+    // the pass has no way to hook in.
+    { OPT_LEVELS_ALL, OPT_ftree_switch_conversion, NULL, 0 },
     // The only effect of -fcaller-saves might be that it triggers
     // a frame without need when it tries to be smart around calls.
     { OPT_LEVELS_ALL, OPT_fcaller_saves, NULL, 0 },
--- a/src/gcc/config.gcc
+++ b/src/gcc/config.gcc
@@ -4277,7 +4277,7 @@ case "${target}" in
 				  echo "Unknown extension used in --with-$which=$val" 1>&2
 				  exit 1
 				fi
-				ext_val=`echo $ext_val | sed -E -e 's/[a-z0-9]+//'`
+				ext_val=`echo $ext_val | sed -E -e 's/[a-z0-9-]+//'`
 			  done
 
 			  true
--- a/src/gcc/config/aarch64/aarch64-builtins.cc
+++ b/src/gcc/config/aarch64/aarch64-builtins.cc
@@ -1903,6 +1903,7 @@ aarch64_init_ls64_builtins_types (void)
   const char *tuple_type_name = "__arm_data512_t";
   tree node_type = get_typenode_from_name (UINT64_TYPE);
   tree array_type = build_array_type_nelts (node_type, 8);
+  array_type = build_distinct_type_copy (array_type);
   SET_TYPE_MODE (array_type, V8DImode);
 
   gcc_assert (TYPE_MODE_RAW (array_type) == TYPE_MODE (array_type));
--- a/src/gcc/config/aarch64/aarch64-cores.def
+++ b/src/gcc/config/aarch64/aarch64-cores.def
@@ -135,6 +135,7 @@ AARCH64_CORE("a64fx", a64fx, a64fx, V8_2A,  (F16, SVE), a64fx, 0x46, 0x001, -1)
 AARCH64_CORE("fujitsu-monaka", fujitsu_monaka, cortexa57, V9_3A, (F16, LS64, RNG, CRYPTO, SVE2_AES, SVE2_BITPERM, SVE2_SHA3, SVE2_SM4), fujitsu_monaka, 0x46, 0x003, -1)
 
 /* HiSilicon ('H') cores. */
+AARCH64_CORE("hip12", hip12, cortexa57, V8_7A, (F16, PROFILE, RNG, SVE2_BITPERM, SVE2_AES, SVE2_SM4, SVE2_SHA3, LS64, RCPC3), hip12, 0x48, 0xd06, -1)
 AARCH64_CORE("tsv110",  tsv110, tsv110, V8_2A,  (CRYPTO, F16), tsv110,   0x48, 0xd01, -1)
 
 /* ARMv8.3-A Architecture Processors.  */
--- a/src/gcc/config/aarch64/aarch64-cost-tables.h
+++ b/src/gcc/config/aarch64/aarch64-cost-tables.h
@@ -561,6 +561,113 @@ const struct cpu_cost_table tsv110_extra_costs =
   }
 };
 
+const struct cpu_cost_table hip12_extra_costs =
+{
+  /* ALU */
+  {
+    0,                 /* arith.  */
+    0,                 /* logical.  */
+    0,                 /* shift.  */
+    0,                 /* shift_reg.  */
+    COSTS_N_INSNS (1), /* arith_shift.  */
+    COSTS_N_INSNS (1), /* arith_shift_reg.  */
+    0,                 /* log_shift.  */
+    0,                 /* log_shift_reg.  */
+    0,                 /* extend.  */
+    COSTS_N_INSNS (1), /* extend_arith.  */
+    0,                 /* bfi.  */
+    0,                 /* bfx.  */
+    0,                 /* clz.  */
+    0,                 /* rev.  */
+    0,                 /* non_exec.  */
+    true               /* non_exec_costs_exec.  */
+  },
+  {
+    /* MULT SImode */
+    {
+      COSTS_N_INSNS (1),       /* simple.  */
+      COSTS_N_INSNS (1),       /* flag_setting.  */
+      COSTS_N_INSNS (1),       /* extend.  */
+      COSTS_N_INSNS (2),       /* add.  */
+      COSTS_N_INSNS (2),       /* extend_add.  */
+      COSTS_N_INSNS (5)        /* idiv.  */
+    },
+    /* MULT DImode */
+    {
+      COSTS_N_INSNS (2),       /* simple.  */
+      0,                       /* flag_setting (N/A).  */
+      COSTS_N_INSNS (2),       /* extend.  */
+      COSTS_N_INSNS (3),       /* add.  */
+      COSTS_N_INSNS (3),       /* extend_add.  */
+      COSTS_N_INSNS (7)        /* idiv.  */
+    }
+  },
+  /* LD/ST */
+  {
+    COSTS_N_INSNS (3),         /* load.  */
+    COSTS_N_INSNS (3),         /* load_sign_extend.  */
+    COSTS_N_INSNS (3),         /* ldrd.  */
+    0,                         /* ldm_1st.  */
+    0,                         /* ldm_regs_per_insn_1st.  */
+    0,                         /* ldm_regs_per_insn_subsequent.  */
+    COSTS_N_INSNS (5),         /* loadf.  */
+    COSTS_N_INSNS (5),         /* loadd.  */
+    COSTS_N_INSNS (4),         /* load_unaligned.  */
+    0,                         /* store.  */
+    0,                         /* strd.  */
+    0,                         /* stm_1st.  */
+    0,                         /* stm_regs_per_insn_1st.  */
+    0,                         /* stm_regs_per_insn_subsequent.  */
+    0,                         /* storef.  */
+    0,                         /* stored.  */
+    COSTS_N_INSNS (1),         /* store_unaligned.  */
+    COSTS_N_INSNS (5),         /* loadv.  */
+    COSTS_N_INSNS (1)          /* storev.  */
+  },
+  {
+    /* FP SFmode */
+    {
+      COSTS_N_INSNS (5),       /* div.  */
+      COSTS_N_INSNS (2),       /* mult.  */
+      COSTS_N_INSNS (4),       /* mult_addsub.  */
+      COSTS_N_INSNS (3),       /* fma.  */
+      COSTS_N_INSNS (1),       /* addsub.  */
+      COSTS_N_INSNS (1),       /* fpconst.  */
+      0,                       /* neg.  */
+      COSTS_N_INSNS (1),       /* compare.  */
+      COSTS_N_INSNS (2),       /* widen.  */
+      COSTS_N_INSNS (2),       /* narrow.  */
+      COSTS_N_INSNS (2),       /* toint.  */
+      COSTS_N_INSNS (3),       /* fromint.  */
+      COSTS_N_INSNS (2)        /* roundint.  */
+    },
+    /* FP DFmode */
+    {
+      COSTS_N_INSNS (7),       /* div.  */
+      COSTS_N_INSNS (2),       /* mult.  */
+      COSTS_N_INSNS (4),       /* mult_addsub.  */
+      COSTS_N_INSNS (3),       /* fma.  */
+      COSTS_N_INSNS (1),       /* addsub.  */
+      COSTS_N_INSNS (1),       /* fpconst.  */
+      0,                       /* neg.  */
+      COSTS_N_INSNS (1),       /* compare.  */
+      COSTS_N_INSNS (2),       /* widen.  */
+      COSTS_N_INSNS (2),       /* narrow.  */
+      COSTS_N_INSNS (2),       /* toint.  */
+      COSTS_N_INSNS (3),       /* fromint.  */
+      COSTS_N_INSNS (2)        /* roundint.  */
+    }
+  },
+  /* Vector */
+  {
+    COSTS_N_INSNS (1),  /* alu.  */
+    COSTS_N_INSNS (2),  /* mult.  */
+    COSTS_N_INSNS (1),  /* movi.  */
+    COSTS_N_INSNS (1),  /* dup.  */
+    COSTS_N_INSNS (1)   /* extract.  */
+  }
+};
+
 const struct cpu_cost_table a64fx_extra_costs =
 {
   /* ALU */
--- a/src/gcc/config/aarch64/aarch64-early-ra.cc
+++ b/src/gcc/config/aarch64/aarch64-early-ra.cc
@@ -2624,23 +2624,10 @@ early_ra::form_chains ()
   if (dump_file && (dump_flags & TDF_DETAILS))
     fprintf (dump_file, "\nChaining allocnos:\n");
 
-  // Perform (modified) interval graph coloring.  First sort by
-  // increasing start point.
-  m_sorted_allocnos.reserve (m_allocnos.length ());
-  m_sorted_allocnos.splice (m_allocnos);
-  m_sorted_allocnos.qsort (cmp_increasing<&allocno_info::start_point>);
-
-  // During this phase, color representatives are only correct for
-  // unprocessed allocno groups (where the color representative is
-  // the group itself) and for groups that contain a current chain head.
-  unsigned int ti = 0;
-  auto_vec<chain_candidate_info> candidates;
-  for (unsigned int hi = 0; hi < m_sorted_allocnos.length (); ++hi)
+  // Record conflicts of hard register and ABI conflicts before the
+  // forming of chains so chains have the updated candidates
+  for (auto *allocno1 : m_allocnos)
     {
-      auto *allocno1 = m_sorted_allocnos[hi];
-      if (allocno1->chain_next != INVALID_ALLOCNO)
-	continue;
-
       // Record conflicts with direct uses for FPR hard registers.
       auto *group1 = allocno1->group ();
       for (unsigned int fpr = allocno1->offset; fpr < 32; ++fpr)
@@ -2656,6 +2643,29 @@ early_ra::form_chains ()
 	    auto fprs = partial_fpr_clobbers (abi_id, group1->fpr_size);
 	    group1->fpr_candidates &= ~fprs >> allocno1->offset;
 	  }
+      if (allocno1->is_shared ())
+	{
+	  auto *allocno2 = m_allocnos[allocno1->related_allocno];
+	  merge_fpr_info (allocno2->group (), group1, allocno2->offset);
+	}
+    }
+
+  // Perform (modified) interval graph coloring.  First sort by
+  // increasing start point.
+  m_sorted_allocnos.reserve (m_allocnos.length ());
+  m_sorted_allocnos.splice (m_allocnos);
+  m_sorted_allocnos.qsort (cmp_increasing<&allocno_info::start_point>);
+
+  // During this phase, color representatives are only correct for
+  // unprocessed allocno groups (where the color representative is
+  // the group itself) and for groups that contain a current chain head.
+  unsigned int ti = 0;
+  auto_vec<chain_candidate_info> candidates;
+  for (unsigned int hi = 0; hi < m_sorted_allocnos.length (); ++hi)
+    {
+      auto *allocno1 = m_sorted_allocnos[hi];
+      if (allocno1->chain_next != INVALID_ALLOCNO)
+	continue;
 
       if (allocno1->is_shared ())
 	{
@@ -2663,8 +2673,6 @@ early_ra::form_chains ()
 	    fprintf (dump_file, "  Allocno %d shares the same hard register"
 		     " as allocno %d\n", allocno1->id,
 		     allocno1->related_allocno);
-	  auto *allocno2 = m_allocnos[allocno1->related_allocno];
-	  merge_fpr_info (allocno2->group (), group1, allocno2->offset);
 	  m_shared_allocnos.safe_push (allocno1);
 	  continue;
 	}
--- a/src/gcc/config/aarch64/aarch64-protos.h
+++ b/src/gcc/config/aarch64/aarch64-protos.h
@@ -860,6 +860,7 @@ bool aarch64_uimm12_shift (unsigned HOST_WIDE_INT);
 int aarch64_movk_shift (const wide_int_ref &, const wide_int_ref &);
 bool aarch64_is_mov_xn_imm (unsigned HOST_WIDE_INT);
 bool aarch64_use_return_insn_p (void);
+bool aarch64_use_simple_return_insn_p (void);
 const char *aarch64_output_casesi (rtx *);
 const char *aarch64_output_load_tp (rtx);
 const char *aarch64_output_sme_zero_za (rtx);
--- a/src/gcc/config/aarch64/aarch64-simd.md
+++ b/src/gcc/config/aarch64/aarch64-simd.md
@@ -6514,7 +6514,7 @@ (define_insn "aarch64_<shrn_op>shrn_n<mode>"
 	(SAT_TRUNC:<VNARROWQ>
 	  (<TRUNC_SHIFT>:SD_HSDI
 	    (match_operand:SD_HSDI 1 "register_operand" "w")
-	    (match_operand:SI 2 "aarch64_simd_shift_imm_offset_<ve_mode>"))))]
+	    (match_operand:SI 2 "aarch64_simd_shift_imm_offset_<vn_mode>"))))]
   "TARGET_SIMD"
   "<shrn_op>shrn\t%<vn2>0<Vmntype>, %<v>1<Vmtype>, %2"
   [(set_attr "type" "neon_shift_imm_narrow_q")]
@@ -6536,7 +6536,7 @@ (define_expand "aarch64_<shrn_op>shrn_n<mode>"
 	(ALL_TRUNC:<VNARROWQ>
 	  (<TRUNC_SHIFT>:VQN
 	    (match_operand:VQN 1 "register_operand")
-	    (match_operand:SI 2 "aarch64_simd_shift_imm_offset_<ve_mode>"))))]
+	    (match_operand:SI 2 "aarch64_simd_shift_imm_offset_<vn_mode>"))))]
   "TARGET_SIMD"
   {
     operands[2] = aarch64_simd_gen_const_vector_dup (<MODE>mode,
@@ -6567,7 +6567,7 @@ (define_insn "*aarch64_<shrn_op>rshrn_n<mode>_insn"
 	      (<TRUNCEXTEND>:<DWI>
 	        (match_operand:SD_HSDI 1 "register_operand" "w"))
 	      (match_operand:<DWI> 3 "aarch64_int_rnd_operand"))
-	    (match_operand:SI 2 "aarch64_simd_shift_imm_offset_<ve_mode>"))))]
+	    (match_operand:SI 2 "aarch64_simd_shift_imm_offset_<vn_mode>"))))]
   "TARGET_SIMD
    && aarch64_const_vec_rnd_cst_p (operands[3], operands[2])"
   "<shrn_op>rshrn\t%<vn2>0<Vmntype>, %<v>1<Vmtype>, %2"
@@ -6582,7 +6582,7 @@ (define_expand "aarch64_<shrn_op>rshrn_n<mode>"
 	      (<TRUNCEXTEND>:<V2XWIDE>
 	        (match_operand:SD_HSDI 1 "register_operand"))
 	      (match_dup 3))
-	    (match_operand:SI 2 "aarch64_simd_shift_imm_offset_<ve_mode>"))))]
+	    (match_operand:SI 2 "aarch64_simd_shift_imm_offset_<vn_mode>"))))]
   "TARGET_SIMD"
   {
     /* Use this expander to create the rounding constant vector, which is
@@ -6602,7 +6602,7 @@ (define_expand "aarch64_<shrn_op>rshrn_n<mode>"
 	      (<TRUNCEXTEND>:<V2XWIDE>
 	        (match_operand:VQN 1 "register_operand"))
 	      (match_dup 3))
-	    (match_operand:SI 2 "aarch64_simd_shift_imm_offset_<ve_mode>"))))]
+	    (match_operand:SI 2 "aarch64_simd_shift_imm_offset_<vn_mode>"))))]
   "TARGET_SIMD"
   {
     if (<CODE> == TRUNCATE
@@ -6644,7 +6644,7 @@ (define_insn "aarch64_sqshrun_n<mode>_insn"
 	  (smax:SD_HSDI
 	    (ashiftrt:SD_HSDI
 	      (match_operand:SD_HSDI 1 "register_operand" "w")
-	      (match_operand:SI 2 "aarch64_simd_shift_imm_offset_<ve_mode>"))
+	      (match_operand:SI 2 "aarch64_simd_shift_imm_offset_<vn_mode>"))
 	    (const_int 0))
 	  (const_int <half_mask>)))]
   "TARGET_SIMD"
@@ -6655,7 +6655,7 @@ (define_insn "aarch64_sqshrun_n<mode>_insn"
 (define_expand "aarch64_sqshrun_n<mode>"
   [(match_operand:<VNARROWQ> 0 "register_operand")
    (match_operand:SD_HSDI 1 "register_operand")
-   (match_operand:SI 2 "aarch64_simd_shift_imm_offset_<ve_mode>")]
+   (match_operand:SI 2 "aarch64_simd_shift_imm_offset_<vn_mode>")]
   "TARGET_SIMD"
   {
     rtx dst = gen_reg_rtx (<MODE>mode);
@@ -6673,7 +6673,7 @@ (define_expand "aarch64_sqshrun_n<mode>"
 	    (smax:VQN
 	      (ashiftrt:VQN
 		(match_operand:VQN 1 "register_operand")
-		(match_operand:SI 2 "aarch64_simd_shift_imm_offset_<ve_mode>"))
+		(match_operand:SI 2 "aarch64_simd_shift_imm_offset_<vn_mode>"))
 	      (match_dup 3))
 	    (match_dup 4))))]
   "TARGET_SIMD"
@@ -6715,7 +6715,7 @@ (define_insn "aarch64_sqrshrun_n<mode>_insn"
 		(sign_extend:<DWI>
 		  (match_operand:SD_HSDI 1 "register_operand" "w"))
 		(match_operand:<DWI> 3 "aarch64_int_rnd_operand"))
-	      (match_operand:SI 2 "aarch64_simd_shift_imm_offset_<ve_mode>"))
+	      (match_operand:SI 2 "aarch64_simd_shift_imm_offset_<vn_mode>"))
 	    (const_int 0))
 	  (const_int <half_mask>)))]
   "TARGET_SIMD
@@ -6727,7 +6727,7 @@ (define_insn "aarch64_sqrshrun_n<mode>_insn"
 (define_expand "aarch64_sqrshrun_n<mode>"
   [(match_operand:<VNARROWQ> 0 "register_operand")
    (match_operand:SD_HSDI 1 "register_operand")
-   (match_operand:SI 2 "aarch64_simd_shift_imm_offset_<ve_mode>")]
+   (match_operand:SI 2 "aarch64_simd_shift_imm_offset_<vn_mode>")]
   "TARGET_SIMD"
   {
     int prec = GET_MODE_UNIT_PRECISION (<DWI>mode);
@@ -6750,7 +6750,7 @@ (define_expand "aarch64_sqrshrun_n<mode>"
 		  (sign_extend:<V2XWIDE>
 		    (match_operand:VQN 1 "register_operand"))
 		  (match_dup 3))
-		(match_operand:SI 2 "aarch64_simd_shift_imm_offset_<ve_mode>"))
+		(match_operand:SI 2 "aarch64_simd_shift_imm_offset_<vn_mode>"))
 	      (match_dup 4))
 	    (match_dup 5))))]
   "TARGET_SIMD"
--- a/src/gcc/config/aarch64/aarch64-sme.md
+++ b/src/gcc/config/aarch64/aarch64-sme.md
@@ -61,6 +61,10 @@
 ;; (b) they are sometimes used conditionally, particularly in streaming-
 ;; compatible code.
 ;;
+;; To prevent the latter from upsetting the assembler, we emit the literal
+;; encodings of "SMSTART SM" and "SMSTOP SM" when compiling without
+;; TARGET_SME.
+;;
 ;; =========================================================================
 
 ;; -------------------------------------------------------------------------
@@ -160,7 +164,9 @@ (define_insn "aarch64_smstart_sm"
    (clobber (reg:VNx16BI P14_REGNUM))
    (clobber (reg:VNx16BI P15_REGNUM))]
   ""
-  "smstart\tsm"
+  {
+    return TARGET_SME ? "smstart\tsm" : ".inst 0xd503437f // smstart sm";
+  }
 )
 
 ;; Turn off streaming mode.  This clobbers all SVE state.
@@ -195,7 +201,9 @@ (define_insn "aarch64_smstop_sm"
    (clobber (reg:VNx16BI P14_REGNUM))
    (clobber (reg:VNx16BI P15_REGNUM))]
   ""
-  "smstop\tsm"
+  {
+    return TARGET_SME ? "smstop\tsm" : ".inst 0xd503427f // smstop sm";
+  }
 )
 
 ;; -------------------------------------------------------------------------
@@ -373,6 +381,8 @@ (define_insn_and_split "aarch64_restore_za"
 		    (reg:DI SME_STATE_REGNUM)
 		    (reg:DI TPIDR2_SETUP_REGNUM)
 		    (reg:DI ZA_SAVED_REGNUM)] UNSPEC_RESTORE_ZA))
+   (set (reg:DI SME_STATE_REGNUM)
+	(unspec:DI [(reg:DI SME_STATE_REGNUM)] UNSPEC_TPIDR2_RESTORE))
    (clobber (reg:DI R0_REGNUM))
    (clobber (reg:DI R14_REGNUM))
    (clobber (reg:DI R15_REGNUM))
--- a/src/gcc/config/aarch64/aarch64-sve-builtins-base.cc
+++ b/src/gcc/config/aarch64/aarch64-sve-builtins-base.cc
@@ -2396,7 +2396,10 @@ public:
   rtx
   expand (function_expander &e) const override
   {
-    return e.use_exact_insn (code_for_aarch64_sve_rev (e.vector_mode (0)));
+    auto mode = e.vector_mode (0);
+    return e.use_exact_insn (e.type_suffix (0).bool_p
+			     ? code_for_aarch64_sve_rev_acle (mode)
+			     : code_for_aarch64_sve_rev (mode));
   }
 };
 
--- a/src/gcc/config/aarch64/aarch64-sve-builtins-functions.h
+++ b/src/gcc/config/aarch64/aarch64-sve-builtins-functions.h
@@ -615,7 +615,10 @@ public:
   rtx
   expand (function_expander &e) const override
   {
-    insn_code icode = code_for_aarch64_sve (m_unspec, e.vector_mode (0));
+    auto mode = e.vector_mode (0);
+    insn_code icode = (e.type_suffix (0).bool_p
+		       ? code_for_aarch64_sve_acle (m_unspec, mode)
+		       : code_for_aarch64_sve (m_unspec, mode));
     return e.use_exact_insn (icode);
   }
 
--- a/src/gcc/config/aarch64/aarch64-sve-builtins.cc
+++ b/src/gcc/config/aarch64/aarch64-sve-builtins.cc
@@ -92,7 +92,7 @@ public:
 };
 
 /* Hash traits for registered_function.  */
-struct registered_function_hasher : nofree_ptr_hash <registered_function>
+struct registered_function_hasher : ggc_ptr_hash <registered_function>
 {
   typedef function_instance compare_type;
 
@@ -934,12 +934,12 @@ tree acle_svprfop;
 static GTY(()) vec<registered_function *, va_gc> *registered_functions;
 
 /* Stores the starting function index for each pragma handler.  */
-static unsigned int initial_indexes[NUM_PRAGMA_HANDLERS];
+static  GTY(()) unsigned int initial_indexes[NUM_PRAGMA_HANDLERS];
 
 /* All registered function decls, hashed on the function_instance
    that they implement.  This is used for looking up implementations of
    overloaded functions.  */
-static hash_table<registered_function_hasher> *function_table;
+static GTY(()) hash_table<registered_function_hasher> *function_table;
 
 /* Index 0 maps all overloaded function names that we've registered so far to
    their associated function_instances.  Index 1 does the same for functions
@@ -4103,7 +4103,11 @@ function_expander::use_cond_insn (insn_code icode, unsigned int merge_argno)
   add_input_operand (icode, pred);
   for (unsigned int i = 0; i < nops; ++i)
     add_input_operand (icode, args[opno + i]);
-  add_input_operand (icode, fallback_arg);
+  if (fallback_arg == CONST0_RTX (mode)
+      && insn_operand_matches (icode, m_ops.length (), fallback_arg))
+    add_fixed_operand (fallback_arg);
+  else
+    add_input_operand (icode, fallback_arg);
   return generate_insn (icode);
 }
 
@@ -4581,7 +4585,7 @@ handle_arm_sve_h (bool function_nulls_p)
   register_svprfop ();
 
   /* Define the functions.  */
-  function_table = new hash_table<registered_function_hasher> (1023);
+  function_table = hash_table<registered_function_hasher>::create_ggc (1023);
   function_builder builder (arm_sve_handle, function_nulls_p);
   for (unsigned int i = 0; i < ARRAY_SIZE (function_groups); ++i)
     builder.register_function_group (function_groups[i]);
--- a/src/gcc/config/aarch64/aarch64-sve.md
+++ b/src/gcc/config/aarch64/aarch64-sve.md
@@ -1458,18 +1458,18 @@ (define_insn "mask_gather_load<mode><v_int_container>"
 	  UNSPEC_LD1_GATHER))]
   "TARGET_SVE && TARGET_NON_STREAMING"
   {@ [cons: =0, 1, 2, 3, 4, 5  ]
-     [&w, Z,   w, Ui1, Ui1, Upl] ld1<Vesize>\t%0.s, %5/z, [%2.s]
-     [?w, Z,   0, Ui1, Ui1, Upl] ^
-     [&w, vgw, w, Ui1, Ui1, Upl] ld1<Vesize>\t%0.s, %5/z, [%2.s, #%1]
-     [?w, vgw, 0, Ui1, Ui1, Upl] ^
-     [&w, rk,  w, Z,   Ui1, Upl] ld1<Vesize>\t%0.s, %5/z, [%1, %2.s, sxtw]
-     [?w, rk,  0, Z,   Ui1, Upl] ^
-     [&w, rk,  w, Ui1, Ui1, Upl] ld1<Vesize>\t%0.s, %5/z, [%1, %2.s, uxtw]
-     [?w, rk,  0, Ui1, Ui1, Upl] ^
-     [&w, rk,  w, Z,   i,   Upl] ld1<Vesize>\t%0.s, %5/z, [%1, %2.s, sxtw %p4]
-     [?w, rk,  0, Z,   i,   Upl] ^
-     [&w, rk,  w, Ui1, i,   Upl] ld1<Vesize>\t%0.s, %5/z, [%1, %2.s, uxtw %p4]
-     [?w, rk,  0, Ui1, i,   Upl] ^
+     [&w, Z,          w, Ui1, Ui1, Upl] ld1<Vesize>\t%0.s, %5/z, [%2.s]
+     [?w, Z,          0, Ui1, Ui1, Upl] ^
+     [&w, vg<Vesize>, w, Ui1, Ui1, Upl] ld1<Vesize>\t%0.s, %5/z, [%2.s, #%1]
+     [?w, vg<Vesize>, 0, Ui1, Ui1, Upl] ^
+     [&w, rk,         w, Z,   Ui1, Upl] ld1<Vesize>\t%0.s, %5/z, [%1, %2.s, sxtw]
+     [?w, rk,         0, Z,   Ui1, Upl] ^
+     [&w, rk,         w, Ui1, Ui1, Upl] ld1<Vesize>\t%0.s, %5/z, [%1, %2.s, uxtw]
+     [?w, rk,         0, Ui1, Ui1, Upl] ^
+     [&w, rk,         w, Z,   i,   Upl] ld1<Vesize>\t%0.s, %5/z, [%1, %2.s, sxtw %p4]
+     [?w, rk,         0, Z,   i,   Upl] ^
+     [&w, rk,         w, Ui1, i,   Upl] ld1<Vesize>\t%0.s, %5/z, [%1, %2.s, uxtw %p4]
+     [?w, rk,         0, Ui1, i,   Upl] ^
   }
 )
 
@@ -1487,14 +1487,14 @@ (define_insn "mask_gather_load<mode><v_int_container>"
 	  UNSPEC_LD1_GATHER))]
   "TARGET_SVE && TARGET_NON_STREAMING"
   {@ [cons: =0, 1, 2, 3, 4, 5]
-     [&w, Z,   w, i, Ui1, Upl] ld1<Vesize>\t%0.d, %5/z, [%2.d]
-     [?w, Z,   0, i, Ui1, Upl] ^
-     [&w, vgd, w, i, Ui1, Upl] ld1<Vesize>\t%0.d, %5/z, [%2.d, #%1]
-     [?w, vgd, 0, i, Ui1, Upl] ^
-     [&w, rk,  w, i, Ui1, Upl] ld1<Vesize>\t%0.d, %5/z, [%1, %2.d]
-     [?w, rk,  0, i, Ui1, Upl] ^
-     [&w, rk,  w, i, i,   Upl] ld1<Vesize>\t%0.d, %5/z, [%1, %2.d, lsl %p4]
-     [?w, rk,  0, i, i,   Upl] ^
+     [&w, Z,          w, i, Ui1, Upl] ld1<Vesize>\t%0.d, %5/z, [%2.d]
+     [?w, Z,          0, i, Ui1, Upl] ^
+     [&w, vg<Vesize>, w, i, Ui1, Upl] ld1<Vesize>\t%0.d, %5/z, [%2.d, #%1]
+     [?w, vg<Vesize>, 0, i, Ui1, Upl] ^
+     [&w, rk,         w, i, Ui1, Upl] ld1<Vesize>\t%0.d, %5/z, [%1, %2.d]
+     [?w, rk,         0, i, Ui1, Upl] ^
+     [&w, rk,         w, i, i,   Upl] ld1<Vesize>\t%0.d, %5/z, [%1, %2.d, lsl %p4]
+     [?w, rk,         0, i, i,   Upl] ^
   }
 )
 
@@ -2378,13 +2378,13 @@ (define_insn "mask_scatter_store<mode><v_int_container>"
 	   (match_operand:SVE_4 4 "register_operand")]
 	  UNSPEC_ST1_SCATTER))]
   "TARGET_SVE && TARGET_NON_STREAMING"
-  {@ [ cons: 0 , 1 , 2   , 3   , 4 , 5    ]
-     [ Z       , w , Ui1 , Ui1 , w , Upl  ] st1<Vesize>\t%4.s, %5, [%1.s]
-     [ vgw     , w , Ui1 , Ui1 , w , Upl  ] st1<Vesize>\t%4.s, %5, [%1.s, #%0]
-     [ rk      , w , Z   , Ui1 , w , Upl  ] st1<Vesize>\t%4.s, %5, [%0, %1.s, sxtw]
-     [ rk      , w , Ui1 , Ui1 , w , Upl  ] st1<Vesize>\t%4.s, %5, [%0, %1.s, uxtw]
-     [ rk      , w , Z   , i   , w , Upl  ] st1<Vesize>\t%4.s, %5, [%0, %1.s, sxtw %p3]
-     [ rk      , w , Ui1 , i   , w , Upl  ] st1<Vesize>\t%4.s, %5, [%0, %1.s, uxtw %p3]
+  {@ [ cons: 0    , 1 , 2   , 3   , 4 , 5    ]
+     [ Z          , w , Ui1 , Ui1 , w , Upl  ] st1<Vesize>\t%4.s, %5, [%1.s]
+     [ vg<Vesize> , w , Ui1 , Ui1 , w , Upl  ] st1<Vesize>\t%4.s, %5, [%1.s, #%0]
+     [ rk         , w , Z   , Ui1 , w , Upl  ] st1<Vesize>\t%4.s, %5, [%0, %1.s, sxtw]
+     [ rk         , w , Ui1 , Ui1 , w , Upl  ] st1<Vesize>\t%4.s, %5, [%0, %1.s, uxtw]
+     [ rk         , w , Z   , i   , w , Upl  ] st1<Vesize>\t%4.s, %5, [%0, %1.s, sxtw %p3]
+     [ rk         , w , Ui1 , i   , w , Upl  ] st1<Vesize>\t%4.s, %5, [%0, %1.s, uxtw %p3]
   }
 )
 
@@ -2401,11 +2401,11 @@ (define_insn "mask_scatter_store<mode><v_int_container>"
 	   (match_operand:SVE_2 4 "register_operand")]
 	  UNSPEC_ST1_SCATTER))]
   "TARGET_SVE && TARGET_NON_STREAMING"
-  {@ [ cons: 0 , 1 , 3   , 4 , 5    ]
-     [ Z       , w , Ui1 , w , Upl  ] st1<Vesize>\t%4.d, %5, [%1.d]
-     [ vgd     , w , Ui1 , w , Upl  ] st1<Vesize>\t%4.d, %5, [%1.d, #%0]
-     [ rk      , w , Ui1 , w , Upl  ] st1<Vesize>\t%4.d, %5, [%0, %1.d]
-     [ rk      , w , i   , w , Upl  ] st1<Vesize>\t%4.d, %5, [%0, %1.d, lsl %p3]
+  {@ [ cons: 0    , 1 , 3   , 4 , 5    ]
+     [ Z          , w , Ui1 , w , Upl  ] st1<Vesize>\t%4.d, %5, [%1.d]
+     [ vg<Vesize> , w , Ui1 , w , Upl  ] st1<Vesize>\t%4.d, %5, [%1.d, #%0]
+     [ rk         , w , Ui1 , w , Upl  ] st1<Vesize>\t%4.d, %5, [%0, %1.d]
+     [ rk         , w , i   , w , Upl  ] st1<Vesize>\t%4.d, %5, [%0, %1.d, lsl %p3]
   }
 )
 
@@ -6422,10 +6422,10 @@ (define_expand "@aarch64_frecps<mode>"
 ;; by providing this, but we need to use UNSPECs since rtx logical ops
 ;; aren't defined for floating-point modes.
 (define_insn "*<optab><mode>3"
-  [(set (match_operand:SVE_FULL_F 0 "register_operand" "=w")
-	(unspec:SVE_FULL_F
-	  [(match_operand:SVE_FULL_F 1 "register_operand" "w")
-	   (match_operand:SVE_FULL_F 2 "register_operand" "w")]
+  [(set (match_operand:SVE_F 0 "register_operand" "=w")
+	(unspec:SVE_F
+	  [(match_operand:SVE_F 1 "register_operand" "w")
+	   (match_operand:SVE_F 2 "register_operand" "w")]
 	  LOGICALF))]
   "TARGET_SVE"
   "<logicalf_op>\t%0.d, %1.d, %2.d"
@@ -9123,7 +9123,30 @@ (define_insn "@aarch64_sve_rev<mode>"
 	(unspec:PRED_ALL [(match_operand:PRED_ALL 1 "register_operand" "Upa")]
 			 UNSPEC_REV))]
   "TARGET_SVE"
-  "rev\t%0.<Vetype>, %1.<Vetype>")
+  "rev\t%0.<Vetype>, %1.<Vetype>"
+)
+
+(define_expand "@aarch64_sve_rev<mode>_acle"
+  [(set (match_operand:VNx16BI 0 "register_operand")
+	(unspec:VNx16BI
+	  [(match_operand:VNx16BI 1 "register_operand")
+	   (match_dup:PRED_ALL 2)]
+	  UNSPEC_REV_PRED))]
+  "TARGET_SVE"
+  {
+    operands[2] = CONST0_RTX (<MODE>mode);
+  }
+)
+
+(define_insn "*aarch64_sve_rev<mode>_acle"
+  [(set (match_operand:VNx16BI 0 "register_operand" "=Upa")
+	(unspec:VNx16BI
+	  [(match_operand:VNx16BI 1 "register_operand" "Upa")
+	   (match_operand:PRED_ALL 2 "aarch64_simd_imm_zero")]
+	  UNSPEC_REV_PRED))]
+  "TARGET_SVE"
+  "rev\t%0.<Vetype>, %1.<Vetype>"
+)
 
 ;; -------------------------------------------------------------------------
 ;; ---- [PRED] Special-purpose binary permutes
@@ -9148,18 +9171,39 @@ (define_insn "@aarch64_sve_<perm_insn><mode>"
   "<perm_insn>\t%0.<Vetype>, %1.<Vetype>, %2.<Vetype>"
 )
 
-;; Special purpose permute used by the predicate generation instructions.
-;; Unlike the normal permute patterns, these instructions operate on VNx16BI
-;; regardless of the element size, so that all input and output bits are
-;; well-defined.  Operand 3 then indicates the size of the permute.
-(define_insn "@aarch64_sve_trn1_conv<mode>"
+;; Special-purpose permutes used by the ACLE intrinsics and predicate
+;; generation instructions.  Unlike the normal permute patterns, these
+;; instructions operate on VNx16BI regardless of the element size, so that
+;; all input and output bits are well-defined.  Operand 3 then indicates
+;; the size of the permute.
+;;
+;; To make generation easier, this pattern embeds the permute type as the
+;; fourth operand to the unspec.  On the one hand, this avoids overloading
+;; unspecs like UNSPEC_ZIP1 to represent two different operations.  On the
+;; other hand, it avoids having a separate unspec for each variant, and
+;; having to map from one kind of unspec to the other.
+(define_expand "@aarch64_sve_<perm_insn><mode>_acle"
+  [(set (match_operand:VNx16BI 0 "register_operand")
+	(unspec:VNx16BI [(match_operand:VNx16BI 1 "register_operand")
+			 (match_operand:VNx16BI 2 "register_operand")
+			 (match_dup:PRED_ALL 3)
+			 (const_int PERMUTE)]
+			UNSPEC_PERMUTE_PRED))]
+  "TARGET_SVE"
+  {
+    operands[3] = CONST0_RTX (<MODE>mode);
+  }
+)
+
+(define_insn "*aarch64_sve_<perm_insn><mode>_acle"
   [(set (match_operand:VNx16BI 0 "register_operand" "=Upa")
 	(unspec:VNx16BI [(match_operand:VNx16BI 1 "register_operand" "Upa")
 			 (match_operand:VNx16BI 2 "register_operand" "Upa")
-			 (match_operand:PRED_ALL 3 "aarch64_simd_imm_zero")]
-			UNSPEC_TRN1_CONV))]
+			 (match_operand:PRED_ALL 3 "aarch64_simd_imm_zero")
+			 (const_int PERMUTE)]
+			UNSPEC_PERMUTE_PRED))]
   "TARGET_SVE"
-  "trn1\t%0.<PRED_ALL:Vetype>, %1.<PRED_ALL:Vetype>, %2.<PRED_ALL:Vetype>"
+  "<perm_insn>\t%0.<PRED_ALL:Vetype>, %1.<PRED_ALL:Vetype>, %2.<PRED_ALL:Vetype>"
 )
 
 ;; =========================================================================
@@ -10989,16 +11033,12 @@ (define_insn_and_split "@aarch64_sve_get_neonq_<mode>"
 
 (define_insn "@aarch64_sve_set_neonq_<mode>"
   [(set (match_operand:SVE_FULL 0 "register_operand" "=w")
-      (unspec:SVE_FULL
-	[(match_operand:SVE_FULL 1 "register_operand" "w")
-	(match_operand:<V128> 2 "register_operand" "w")
-	(match_operand:<VPRED> 3 "register_operand" "Upl")]
-	UNSPEC_SET_NEONQ))]
+	(unspec:SVE_FULL
+	  [(match_operand:SVE_FULL 1 "register_operand" "w")
+	   (match_operand:<V128> 2 "register_operand" "w")
+	   (match_operand:<VPRED> 3 "register_operand" "Upl")]
+	  UNSPEC_SET_NEONQ))]
   "TARGET_SVE
    && BYTES_BIG_ENDIAN"
-  {
-    operands[2] = lowpart_subreg (<MODE>mode, operands[2],
-                                  GET_MODE (operands[2]));
-    return "sel\t%0.<Vetype>, %3, %2.<Vetype>, %1.<Vetype>";
-  }
+  "sel\t%0.<Vetype>, %3, %Z2.<Vetype>, %1.<Vetype>"
 )
--- a/src/gcc/config/aarch64/aarch64-sys-regs.def
+++ b/src/gcc/config/aarch64/aarch64-sys-regs.def
@@ -740,7 +740,7 @@
   SYSREG ("pmscr_el1",		CPENC (3,0,9,9,0),	F_ARCHEXT,		AARCH64_FEATURE (PROFILE))
   SYSREG ("pmscr_el12",		CPENC (3,5,9,9,0),	F_ARCHEXT,		AARCH64_FEATURE (PROFILE))
   SYSREG ("pmscr_el2",		CPENC (3,4,9,9,0),	F_ARCHEXT,		AARCH64_FEATURE (PROFILE))
-  SYSREG ("pmsdsfr_el1",	CPENC (3,4,9,10,4),	F_ARCHEXT,		AARCH64_FEATURE (SPE_FDS))
+  SYSREG ("pmsdsfr_el1",	CPENC (3,0,9,10,4),	F_ARCHEXT,		AARCH64_FEATURE (SPE_FDS))
   SYSREG ("pmselr_el0",		CPENC (3,3,9,12,5),	0,			AARCH64_NO_FEATURES)
   SYSREG ("pmsevfr_el1",	CPENC (3,0,9,9,5),	F_ARCHEXT,		AARCH64_FEATURE (PROFILE))
   SYSREG ("pmsfcr_el1",		CPENC (3,0,9,9,4),	F_ARCHEXT,		AARCH64_FEATURE (PROFILE))
--- a/src/gcc/config/aarch64/aarch64-tune.md
+++ b/src/gcc/config/aarch64/aarch64-tune.md
@@ -1,5 +1,5 @@
 ;; -*- buffer-read-only: t -*-
 ;; Generated automatically by gentune.sh from aarch64-cores.def
 (define_attr "tune"
-	"cortexa34,cortexa35,cortexa53,cortexa57,cortexa72,cortexa73,thunderx,thunderxt88p1,thunderxt88,octeontx,octeontxt81,octeontxt83,thunderxt81,thunderxt83,ampere1,ampere1a,ampere1b,emag,xgene1,falkor,qdf24xx,exynosm1,phecda,thunderx2t99p1,vulcan,thunderx2t99,cortexa55,cortexa75,cortexa76,cortexa76ae,cortexa77,cortexa78,cortexa78ae,cortexa78c,cortexa65,cortexa65ae,cortexx1,cortexx1c,neoversen1,ares,neoversee1,octeontx2,octeontx2t98,octeontx2t96,octeontx2t93,octeontx2f95,octeontx2f95n,octeontx2f95mm,a64fx,fujitsu_monaka,tsv110,thunderx3t110,neoversev1,zeus,neoverse512tvb,saphira,cortexa57cortexa53,cortexa72cortexa53,cortexa73cortexa35,cortexa73cortexa53,cortexa75cortexa55,cortexa76cortexa55,cortexr82,cortexa510,cortexa520,cortexa710,cortexa715,cortexa720,cortexa725,cortexx2,cortexx3,cortexx4,cortexx925,neoversen2,cobalt100,neoversen3,neoversev2,grace,neoversev3,neoversev3ae,demeter,generic,generic_armv8_a,generic_armv9_a"
+	"cortexa34,cortexa35,cortexa53,cortexa57,cortexa72,cortexa73,thunderx,thunderxt88p1,thunderxt88,octeontx,octeontxt81,octeontxt83,thunderxt81,thunderxt83,ampere1,ampere1a,ampere1b,emag,xgene1,falkor,qdf24xx,exynosm1,phecda,thunderx2t99p1,vulcan,thunderx2t99,cortexa55,cortexa75,cortexa76,cortexa76ae,cortexa77,cortexa78,cortexa78ae,cortexa78c,cortexa65,cortexa65ae,cortexx1,cortexx1c,neoversen1,ares,neoversee1,octeontx2,octeontx2t98,octeontx2t96,octeontx2t93,octeontx2f95,octeontx2f95n,octeontx2f95mm,a64fx,fujitsu_monaka,hip12,tsv110,thunderx3t110,neoversev1,zeus,neoverse512tvb,saphira,cortexa57cortexa53,cortexa72cortexa53,cortexa73cortexa35,cortexa73cortexa53,cortexa75cortexa55,cortexa76cortexa55,cortexr82,cortexa510,cortexa520,cortexa710,cortexa715,cortexa720,cortexa725,cortexx2,cortexx3,cortexx4,cortexx925,neoversen2,cobalt100,neoversen3,neoversev2,grace,neoversev3,neoversev3ae,demeter,generic,generic_armv8_a,generic_armv9_a"
 	(const (symbol_ref "((enum attr_tune) aarch64_tune)")))
--- a/src/gcc/config/aarch64/aarch64.cc
+++ b/src/gcc/config/aarch64/aarch64.cc
@@ -395,6 +395,7 @@ static const struct aarch64_flag_desc aarch64_tuning_flags[] =
 #include "tuning_models/thunderxt88.h"
 #include "tuning_models/thunderx.h"
 #include "tuning_models/tsv110.h"
+#include "tuning_models/hip12.h"
 #include "tuning_models/xgene1.h"
 #include "tuning_models/emag.h"
 #include "tuning_models/qdf24xx.h"
@@ -5679,7 +5680,7 @@ aarch64_sve_move_pred_via_while (rtx target, machine_mode mode,
   target = aarch64_target_reg (target, mode);
   emit_insn (gen_while (UNSPEC_WHILELO, DImode, mode,
 			target, const0_rtx, limit));
-  return target;
+  return gen_lowpart (VNx16BImode, target);
 }
 
 static rtx
@@ -5824,8 +5825,7 @@ aarch64_expand_sve_const_pred_trn (rtx target, rtx_vector_builder &builder,
      operands but permutes them as though they had mode MODE.  */
   machine_mode mode = aarch64_sve_pred_mode (permute_size).require ();
   target = aarch64_target_reg (target, GET_MODE (a));
-  rtx type_reg = CONST0_RTX (mode);
-  emit_insn (gen_aarch64_sve_trn1_conv (mode, target, a, b, type_reg));
+  emit_insn (gen_aarch64_sve_acle (UNSPEC_TRN1, mode, target, a, b));
   return target;
 }
 
@@ -9818,6 +9818,20 @@ aarch64_use_return_insn_p (void)
   return known_eq (cfun->machine->frame.frame_size, 0);
 }
 
+/* Return false for locally streaming functions in order to avoid
+   shrink-wrapping them.  Shrink-wrapping is unsafe when the function prologue
+   and epilogue contain streaming state change, because these implicitly change
+   the meaning of poly_int values.  */
+
+bool
+aarch64_use_simple_return_insn_p (void)
+{
+  if (aarch64_cfun_enables_pstate_sm ())
+    return false;
+
+  return true;
+}
+
 /* Generate the epilogue instructions for returning from a function.
    This is almost exactly the reverse of the prolog sequence, except
    that we need to insert barriers to avoid scheduling loads that read
@@ -24019,6 +24033,13 @@ aarch64_expand_vector_init (rtx target, rtx vals)
       emit_insn (rec_seq);
     }
 
+  /* The two halves should (by induction) be individually endian-correct.
+     However, in the memory layout provided by VALS, the nth element of
+     HALVES[0] comes immediately before the nth element HALVES[1].
+     This means that, on big-endian targets, the nth element of HALVES[0]
+     is more significant than the nth element HALVES[1].  */
+  if (BYTES_BIG_ENDIAN)
+    std::swap (halves[0], halves[1]);
   rtvec v = gen_rtvec (2, halves[0], halves[1]);
   rtx_insn *zip1_insn
     = emit_set_insn (target, gen_rtx_UNSPEC (mode, v, UNSPEC_ZIP1));
@@ -24432,20 +24453,41 @@ aarch64_asm_preferred_eh_data_format (int code ATTRIBUTE_UNUSED, int global)
    return (global ? DW_EH_PE_indirect : 0) | DW_EH_PE_pcrel | type;
 }
 
+/* Return true if function declaration FNDECL needs to be marked as
+   having a variant PCS.  */
+
+static bool
+aarch64_is_variant_pcs (tree fndecl)
+{
+  /* Check for ABIs that preserve more registers than usual.  */
+  arm_pcs pcs = (arm_pcs) fndecl_abi (fndecl).id ();
+  if (pcs == ARM_PCS_SIMD || pcs == ARM_PCS_SVE)
+    return true;
+
+  /* Check for ABIs that allow PSTATE.SM to be 1 on entry.  */
+  tree fntype = TREE_TYPE (fndecl);
+  if (aarch64_fntype_pstate_sm (fntype) != AARCH64_FL_SM_OFF)
+    return true;
+
+  /* Check for ABIs that require PSTATE.ZA to be 1 on entry, either because
+     of ZA or ZT0.  */
+  if (aarch64_fntype_pstate_za (fntype) != 0)
+    return true;
+
+  return false;
+}
+
 /* Output .variant_pcs for aarch64_vector_pcs function symbols.  */
 
 static void
 aarch64_asm_output_variant_pcs (FILE *stream, const tree decl, const char* name)
 {
-  if (TREE_CODE (decl) == FUNCTION_DECL)
+  if (TREE_CODE (decl) == FUNCTION_DECL
+      && aarch64_is_variant_pcs (decl))
     {
-      arm_pcs pcs = (arm_pcs) fndecl_abi (decl).id ();
-      if (pcs == ARM_PCS_SIMD || pcs == ARM_PCS_SVE)
-	{
-	  fprintf (stream, "\t.variant_pcs\t");
-	  assemble_name (stream, name);
-	  fprintf (stream, "\n");
-	}
+      fprintf (stream, "\t.variant_pcs\t");
+      assemble_name (stream, name);
+      fprintf (stream, "\n");
     }
 }
 
@@ -25934,12 +25976,23 @@ aarch64_evpc_tbl (struct expand_vec_perm_d *d)
 static bool
 aarch64_evpc_sve_tbl (struct expand_vec_perm_d *d)
 {
-  unsigned HOST_WIDE_INT nelt;
+  if (!d->one_vector_p)
+    {
+      /* aarch64_expand_sve_vec_perm does not yet handle variable-length
+	 vectors.  */
+      if (!d->perm.length ().is_constant ())
+	return false;
 
-  /* Permuting two variable-length vectors could overflow the
-     index range.  */
-  if (!d->one_vector_p && !d->perm.length ().is_constant (&nelt))
-    return false;
+      /* This permutation reduces to the vec_perm optab if the elements are
+	 large enough to hold all selector indices.  Do not handle that case
+	 here, since the general TBL+SUB+TBL+ORR sequence is too expensive to
+	 be considered a "native" constant permutation.
+
+	 Not doing this would undermine code that queries can_vec_perm_const_p
+	 with allow_variable_p set to false.  See PR121027.  */
+      if (selector_fits_mode_p (d->vmode, d->perm))
+	return false;
+    }
 
   if (d->testing_p)
     return true;
--- a/src/gcc/config/aarch64/aarch64.md
+++ b/src/gcc/config/aarch64/aarch64.md
@@ -132,6 +132,14 @@ (define_constants
     ;; The actual value can sometimes vary, because it does not track
     ;; changes to PSTATE.ZA that happen during a lazy save and restore.
     ;; Those effects are instead tracked by ZA_SAVED_REGNUM.
+    ;;
+    ;; Sequences also write to this register if they synchronize the
+    ;; actual contents of ZA and PSTATE.ZA with the current function's
+    ;; ZA_REGNUM and SME_STATE_REGNUM.  Conceptually, these extra writes
+    ;; do not change the value of SME_STATE_REGNUM.  They simply act as
+    ;; sequencing points.  They means that all direct accesses to ZA can
+    ;; depend only on ZA_REGNUM and SME_STATE_REGNUM, rather than also
+    ;; depending on ZA_SAVED_REGNUM etc.
     (SME_STATE_REGNUM 88)
 
     ;; Instructions write to this register if they set TPIDR2_EL0 to a
@@ -259,6 +267,7 @@ (define_c_enum "unspec" [
     UNSPEC_PACIBSP
     UNSPEC_PRLG_STK
     UNSPEC_REV
+    UNSPEC_REV_PRED
     UNSPEC_RBIT
     UNSPEC_SADALP
     UNSPEC_SCVTF
@@ -1049,7 +1058,7 @@ (define_expand "return"
 
 (define_insn "simple_return"
   [(simple_return)]
-  ""
+  "aarch64_use_simple_return_insn_p ()"
   {
     output_asm_insn ("ret", operands);
     return aarch64_sls_barrier (aarch64_harden_sls_retbr_p ());
--- a/src/gcc/config/aarch64/arm_acle.h
+++ b/src/gcc/config/aarch64/arm_acle.h
@@ -94,16 +94,16 @@ __pli (void const volatile *__addr)
 
 __extension__ extern __inline void
 __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__plix (unsigned int __cache, unsigned int __rettn,
+__plix (const unsigned int __cache, const unsigned int __rettn,
 	void const volatile *__addr)
 {
   return __builtin_aarch64_plix (__cache, __rettn, __addr);
 }
 
 __extension__ extern __inline void
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__pldx (unsigned int __access, unsigned int __cache, unsigned int __rettn,
-	void const volatile *__addr)
+  __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+  __pldx (const unsigned int __access, const unsigned int __cache,
+	  const unsigned int __rettn, void const volatile *__addr)
 {
   return __builtin_aarch64_pldx (__access, __cache, __rettn, __addr);
 }
--- a/src/gcc/config/aarch64/iterators.md
+++ b/src/gcc/config/aarch64/iterators.md
@@ -519,15 +519,20 @@ (define_mode_iterator SVE_PARTIAL_I [VNx8QI VNx4QI VNx2QI
 				     VNx4HI VNx2HI
 				     VNx2SI])
 
+;; All SVE integer vector modes.
+(define_mode_iterator SVE_I [VNx16QI VNx8QI VNx4QI VNx2QI
+			     VNx8HI VNx4HI VNx2HI
+			     VNx4SI VNx2SI
+			     VNx2DI])
+
+;; All SVE floating-point vector modes.
+(define_mode_iterator SVE_F [VNx8HF VNx4HF VNx2HF
+			     VNx8BF VNx4BF VNx2BF
+			     VNx4SF VNx2SF
+			     VNx2DF])
+
 ;; All SVE vector modes.
-(define_mode_iterator SVE_ALL [VNx16QI VNx8QI VNx4QI VNx2QI
-			       VNx8HI VNx4HI VNx2HI
-			       VNx8HF VNx4HF VNx2HF
-			       VNx8BF VNx4BF VNx2BF
-			       VNx4SI VNx2SI
-			       VNx4SF VNx2SF
-			       VNx2DI
-			       VNx2DF])
+(define_mode_iterator SVE_ALL [SVE_I SVE_F])
 
 ;; All SVE 2-vector modes.
 (define_mode_iterator SVE_FULLx2 [VNx32QI VNx16HI VNx8SI VNx4DI
@@ -549,12 +554,6 @@ (define_mode_iterator SVE_STRUCT [SVE_FULLx2 SVE_FULLx3 SVE_FULLx4])
 ;; All SVE vector and structure modes.
 (define_mode_iterator SVE_ALL_STRUCT [SVE_ALL SVE_STRUCT])
 
-;; All SVE integer vector modes.
-(define_mode_iterator SVE_I [VNx16QI VNx8QI VNx4QI VNx2QI
-			     VNx8HI VNx4HI VNx2HI
-			     VNx4SI VNx2SI
-			     VNx2DI])
-
 ;; All SVE integer vector modes and Advanced SIMD 64-bit vector
 ;; element modes
 (define_mode_iterator SVE_I_SIMD_DI [SVE_I V2DI])
@@ -824,7 +823,6 @@ (define_c_enum "unspec"
     UNSPEC_UZP2Q	; Used in aarch64-sve.md.
     UNSPEC_ZIP1Q	; Used in aarch64-sve.md.
     UNSPEC_ZIP2Q	; Used in aarch64-sve.md.
-    UNSPEC_TRN1_CONV	; Used in aarch64-sve.md.
     UNSPEC_COND_CMPEQ_WIDE ; Used in aarch64-sve.md.
     UNSPEC_COND_CMPGE_WIDE ; Used in aarch64-sve.md.
     UNSPEC_COND_CMPGT_WIDE ; Used in aarch64-sve.md.
@@ -1054,6 +1052,9 @@ (define_c_enum "unspec"
     UNSPEC_BFCVT       ; Used in aarch64-simd.md.
     UNSPEC_FCVTXN	; Used in aarch64-simd.md.
 
+    ;; All used in aarch64-sve.md
+    UNSPEC_PERMUTE_PRED
+
     ;; All used in aarch64-sve2.md
     UNSPEC_FCVTN
     UNSPEC_FDOT
@@ -1940,7 +1941,8 @@ (define_mode_attr ve_mode [(V8QI "qi") (V16QI "qi")
 			   (SI   "si")])
 
 ;; Like ve_mode but for the half-width modes.
-(define_mode_attr vn_mode [(V8HI  "qi") (V4SI  "hi") (V2DI  "si")])
+(define_mode_attr vn_mode [(V8HI  "qi") (V4SI  "hi") (V2DI  "si") (DI "si")
+			   (SI "hi") (HI "qi")])
 
 ;; Vm for lane instructions is restricted to FP_LO_REGS.
 (define_mode_attr vwx [(V4HI "x") (V8HI "x") (HI "x")
new file mode 100644
--- /dev/null
+++ b/src/gcc/config/aarch64/tuning_models/hip12.h
@@ -0,0 +1,225 @@
+/* Tuning model description for AArch64 architecture.
+   Copyright (C) 2009-2026 Free Software Foundation, Inc.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3, or (at your option)
+   any later version.
+
+   GCC is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with GCC; see the file COPYING3.  If not see
+   <http://www.gnu.org/licenses/>.  */
+
+#ifndef GCC_AARCH64_H_HIP12
+#define GCC_AARCH64_H_HIP12
+
+#include "generic.h"
+
+static const struct cpu_addrcost_table hip12_addrcost_table =
+{
+    {
+      0, /* hi  */
+      0, /* si  */
+      0, /* di  */
+      2, /* ti  */
+    },
+  0, /* pre_modify  */
+  0, /* post_modify  */
+  2, /* post_modify_ld3_st3  */
+  2, /* post_modify_ld4_st4  */
+  0, /* register_offset  */
+  0, /* register_sextend  */
+  0, /* register_zextend  */
+  0, /* imm_offset  */
+};
+
+static const struct cpu_regmove_cost hip12_regmove_cost =
+{
+  1, /* GP2GP  */
+  /* Spilling to int<->fp instead of memory is recommended so set
+     realistic costs compared to memmov_cost.  */
+  5, /* GP2FP  */
+  2, /* FP2GP  */
+  2  /* FP2FP  */
+};
+
+static const advsimd_vec_cost hip12_advsimd_vector_cost =
+{
+  2, /* int_stmt_cost  */
+  2, /* fp_stmt_cost  */
+  2, /* ld2_st2_permute_cost  */
+  2, /* ld3_st3_permute_cost  */
+  3, /* ld4_st4_permute_cost  */
+  2, /* permute_cost  */
+  9, /* reduc_i8_cost  */
+  7, /* reduc_i16_cost  */
+  5, /* reduc_i32_cost  */
+  3, /* reduc_i64_cost  */
+  9, /* reduc_f16_cost  */
+  6, /* reduc_f32_cost  */
+  3, /* reduc_f64_cost  */
+  2, /* store_elt_extra_cost  */
+  2, /* vec_to_scalar_cost  */
+  4, /* scalar_to_vec_cost  */
+  6, /* align_load_cost  */
+  6, /* unalign_load_cost  */
+  1, /* unalign_store_cost  */
+  1  /* store_cost  */
+};
+
+static const sve_vec_cost hip12_sve_vector_cost =
+{
+  {
+    2, /* int_stmt_cost  */
+    2, /* fp_stmt_cost  */
+    2, /* ld2_st2_permute_cost  */
+    3, /* ld3_st3_permute_cost  */
+    3, /* ld4_st4_permute_cost  */
+    2, /* permute_cost  */
+    /* Theoretically, a reduction involving 31 scalar ADDs could
+       complete in ~6 cycles and would have a cost of 31.  [SU]ADDV
+       completes in 13 cycles, so give it a cost of 31 + 7.  */
+    38, /* reduc_i8_cost  */
+    /* Likewise for 15 scalar ADDs (~3 cycles) vs. 10: 15 + 7.  */
+    22, /* reduc_i16_cost  */
+    /* Likewise for 7 scalar ADDs (~2 cycles) vs. 7: 7 + 5.  */
+    12, /* reduc_i32_cost  */
+    /* Likewise for 3 scalar ADDs (~1 cycles) vs. 4: 3 + 3.  */
+    6, /* reduc_i64_cost  */
+    /* Theoretically, a reduction involving 15 scalar FADDs could
+       complete in ~8 cycles and would have a cost of 30.  FADDV
+       completes in 15 cycles, so give it a cost of 30 + 7.  */
+    37, /* reduc_f16_cost  */
+    /* Likewise for 7 scalar FADDs (~4 cycles) vs. 12: 14 + 8.  */
+    22, /* reduc_f32_cost  */
+    /* Likewise for 3 scalar FADDs (~2 cycles) vs. 9: 6 + 7.  */
+    13, /* reduc_f64_cost  */
+    2, /* store_elt_extra_cost  */
+    2, /* vec_to_scalar_cost  */
+    4, /* scalar_to_vec_cost  */
+    6, /* align_load_cost  */
+    6, /* unalign_load_cost  */
+    1, /* unalign_store_cost  */
+    1  /* store_cost  */
+  },
+  3, /* clast_cost  */
+  42, /* fadda_f16_cost  */
+  26, /* fadda_f32_cost  */
+  20, /* fadda_f64_cost  */
+  32, /* gather_load_x32_cost  */
+  16, /* gather_load_x64_cost  */
+  3 /* scatter_store_elt_cost  */
+};
+
+static const aarch64_scalar_vec_issue_info hip12_scalar_issue_info =
+{
+  5, /* loads_stores_per_cycle  */
+  2, /* stores_per_cycle  */
+  6, /* general_ops_per_cycle  */
+  0, /* fp_simd_load_general_ops  */
+  1 /* fp_simd_store_general_ops  */
+};
+
+static const aarch64_advsimd_vec_issue_info hip12_advsimd_issue_info =
+{
+  {
+    5, /* loads_stores_per_cycle  */
+    2, /* stores_per_cycle  */
+    4, /* general_ops_per_cycle  */
+    0, /* fp_simd_load_general_ops  */
+    1 /* fp_simd_store_general_ops  */
+  },
+  2, /* ld2_st2_general_ops  */
+  2, /* ld3_st3_general_ops  */
+  3 /* ld4_st4_general_ops  */
+};
+
+static const aarch64_sve_vec_issue_info hip12_sve_issue_info =
+{
+  {
+    {
+      5, /* loads_stores_per_cycle  */
+      2, /* stores_per_cycle  */
+      2, /* general_ops_per_cycle  */
+      0, /* fp_simd_load_general_ops  */
+      1 /* fp_simd_store_general_ops  */
+    },
+    2, /* ld2_st2_general_ops  */
+    2, /* ld3_st3_general_ops  */
+    3 /* ld4_st4_general_ops  */
+  },
+  2, /* pred_ops_per_cycle  */
+  2, /* while_pred_ops  */
+  2, /* int_cmp_pred_ops  */
+  1, /* fp_cmp_pred_ops  */
+  1, /* gather_scatter_pair_general_ops  */
+  1 /* gather_scatter_pair_pred_ops  */
+};
+
+static const aarch64_vec_issue_info hip12_vec_issue_info =
+{
+  &hip12_scalar_issue_info,
+  &hip12_advsimd_issue_info,
+  &hip12_sve_issue_info
+};
+
+static const struct cpu_vector_cost hip12_vector_cost =
+{
+  1, /* scalar_int_stmt_cost  */
+  2, /* scalar_fp_stmt_cost  */
+  4, /* scalar_load_cost  */
+  1, /* scalar_store_cost  */
+  1, /* cond_taken_branch_cost  */
+  1, /* cond_not_taken_branch_cost  */
+  &hip12_advsimd_vector_cost, /* advsimd  */
+  &hip12_sve_vector_cost, /* sve  */
+  &hip12_vec_issue_info /* issue_info  */
+};
+
+static const struct tune_params hip12_tunings =
+{
+  &hip12_extra_costs,
+  &hip12_addrcost_table,
+  &hip12_regmove_cost,
+  &hip12_vector_cost,
+  &generic_branch_cost,
+  &generic_approx_modes,
+  SVE_256, /* sve_width  */
+  { 4, /* load_int.  */
+    1, /* store_int.  */
+    6, /* load_fp.  */
+    1, /* store_fp.  */
+    8, /* load_pred.  */
+    4 /* store_pred.  */
+  }, /* memmov_cost.  */
+  8,    /* issue_rate  */
+  (AARCH64_FUSE_CMP_BRANCH
+   | AARCH64_FUSE_AES_AESMC), /* fusible_ops  */
+  "16", /* function_align.  */
+  "4",  /* jump_align.  */
+  "8",  /* loop_align.  */
+  2,    /* int_reassoc_width.  */
+  4,    /* fp_reassoc_width.  */
+  2,    /* fma_reassoc_width.  */
+  2,    /* vec_reassoc_width.  */
+  2,    /* min_div_recip_mul_sf.  */
+  2,    /* min_div_recip_mul_df.  */
+  0,    /* max_case_values.  */
+  tune_params::AUTOPREFETCHER_WEAK,    /* autoprefetcher_model.  */
+  (AARCH64_EXTRA_TUNE_CHEAP_SHIFT_EXTEND
+   | AARCH64_EXTRA_TUNE_FULLY_PIPELINED_FMA
+   | AARCH64_EXTRA_TUNE_USE_NEW_VECTOR_COSTS
+   | AARCH64_EXTRA_TUNE_MATCHED_VECTOR_THROUGHPUT),    /* tune_flags.  */
+  &generic_armv8_a_prefetch_tune,
+  AARCH64_LDP_STP_POLICY_ALWAYS,    /* ldp_policy_model.  */
+  AARCH64_LDP_STP_POLICY_ALWAYS     /* stp_policy_model.  */
+};
+
+#endif /* GCC_AARCH64_H_HIP12.  */
--- a/src/gcc/config/arm/arm.cc
+++ b/src/gcc/config/arm/arm.cc
@@ -24153,7 +24153,7 @@ arm_print_condition (FILE *stream)
 
 
 /* Globally reserved letters: acln
-   Puncutation letters currently used: @_|?().!#
+   Puncutation letters currently used: @_-|?().!#
    Lower case letters currently used: bcdefhimpqtvwxyz
    Upper case letters currently used: ABCDEFGHIJKLMNOPQRSTUV
    Letters previously used, but now deprecated/obsolete: sWXYZ.
@@ -24188,6 +24188,11 @@ arm_print_operand (FILE *stream, rtx x, int code)
     case '_':
       fputs (user_label_prefix, stream);
       return;
+    case '-':
+#ifdef LOCAL_LABEL_PREFIX
+      fputs (LOCAL_LABEL_PREFIX, stream);
+#endif
+      return;
 
     case '|':
       fputs (REGISTER_PREFIX, stream);
@@ -25038,9 +25043,9 @@ arm_print_operand_punct_valid_p (unsigned char code)
 {
   return (code == '@' || code == '|' || code == '.'
 	  || code == '(' || code == ')' || code == '#'
+	  || code == '-' || code == '_'
 	  || (TARGET_32BIT && (code == '?'))
-	  || (TARGET_THUMB2 && (code == '!'))
-	  || (TARGET_THUMB && (code == '_')));
+	  || (TARGET_THUMB2 && (code == '!')));
 }
 
 /* Target hook for assembling integer objects.  The ARM version needs to
--- a/src/gcc/config/arm/mve.md
+++ b/src/gcc/config/arm/mve.md
@@ -1267,8 +1267,8 @@ (define_insn "mve_vandq_f<mode>"
 (define_insn "mve_vbicq_f<mode>"
   [
    (set (match_operand:MVE_0 0 "s_register_operand" "=w")
-	(and:MVE_0 (not:MVE_0 (match_operand:MVE_0 1 "s_register_operand" "w"))
-			      (match_operand:MVE_0 2 "s_register_operand" "w")))
+	(and:MVE_0 (not:MVE_0 (match_operand:MVE_0 2 "s_register_operand" "w"))
+			      (match_operand:MVE_0 1 "s_register_operand" "w")))
   ]
   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
   "vbic\t%q0, %q1, %q2"
--- a/src/gcc/config/arm/neon.md
+++ b/src/gcc/config/arm/neon.md
@@ -872,11 +872,11 @@ (define_insn "*umax<mode>3_neon"
   [(set_attr "type" "neon_minmax<q>")]
 )
 
-(define_insn "*smin<mode>3_neon"
-  [(set (match_operand:VDQW 0 "s_register_operand" "=w")
-	(smin:VDQW (match_operand:VDQW 1 "s_register_operand" "w")
-		   (match_operand:VDQW 2 "s_register_operand" "w")))]
-  "TARGET_NEON"
+(define_insn "*smin<VDQWH:mode>3_neon"
+  [(set (match_operand:VDQWH 0 "s_register_operand" "=w")
+	(smin:VDQWH (match_operand:VDQWH 1 "s_register_operand" "w")
+		    (match_operand:VDQWH 2 "s_register_operand" "w")))]
+  "ARM_HAVE_NEON_<MODE>_ARITH"
   "vmin.<V_s_elem>\t%<V_reg>0, %<V_reg>1, %<V_reg>2"
   [(set (attr "type")
       (if_then_else (match_test "<Is_float_mode>")
@@ -884,11 +884,11 @@ (define_insn "*smin<mode>3_neon"
                     (const_string "neon_minmax<q>")))]
 )
 
-(define_insn "*smax<mode>3_neon"
-  [(set (match_operand:VDQW 0 "s_register_operand" "=w")
-	(smax:VDQW (match_operand:VDQW 1 "s_register_operand" "w")
-		   (match_operand:VDQW 2 "s_register_operand" "w")))]
-  "TARGET_NEON"
+(define_insn "*smax<VDQWH:mode>3_neon"
+  [(set (match_operand:VDQWH 0 "s_register_operand" "=w")
+	(smax:VDQWH (match_operand:VDQWH 1 "s_register_operand" "w")
+		    (match_operand:VDQWH 2 "s_register_operand" "w")))]
+  "ARM_HAVE_NEON_<MODE>_ARITH"
   "vmax.<V_s_elem>\t%<V_reg>0, %<V_reg>1, %<V_reg>2"
   [(set (attr "type")
       (if_then_else (match_test "<Is_float_mode>")
--- a/src/gcc/config/arm/thumb2.md
+++ b/src/gcc/config/arm/thumb2.md
@@ -1465,19 +1465,24 @@ (define_insn "*thumb2_cbz"
 	      (pc)))
    (clobber (reg:CC CC_REGNUM))]
   "TARGET_THUMB2"
-  "*
-  if (get_attr_length (insn) == 2)
-    return \"cbz\\t%0, %l1\";
-  else
-    return \"cmp\\t%0, #0\;beq\\t%l1\";
-  "
+  {
+    int offset = (INSN_ADDRESSES (INSN_UID (operands[1]))
+		  - INSN_ADDRESSES (INSN_UID (insn)));
+    if (get_attr_length (insn) == 2)
+      return "cbz\t%0, %l1";
+    else if (offset >= -1048564 && offset <= 1048576)
+      return "cmp\t%0, #0\;beq\t%l1";
+    else if (which_alternative == 0)
+      return "cbnz\t%0, %-LCB%=\;b\t%l1\n%-LCB%=:";
+    return "cmp\t%0, #0\;bne\t%-LCB%=\;b\t%l1\n%-LCB%=:";
+  }
   [(set (attr "length")
         (if_then_else
 	    (and (ge (minus (match_dup 1) (pc)) (const_int 2))
 	         (le (minus (match_dup 1) (pc)) (const_int 128))
 	         (not (match_test "which_alternative")))
 	    (const_int 2)
-	    (const_int 8)))
+	    (const_int 10)))
    (set_attr "type" "branch,multiple")]
 )
 
@@ -1489,19 +1494,24 @@ (define_insn "*thumb2_cbnz"
 	      (pc)))
    (clobber (reg:CC CC_REGNUM))]
   "TARGET_THUMB2"
-  "*
-  if (get_attr_length (insn) == 2)
-    return \"cbnz\\t%0, %l1\";
-  else
-    return \"cmp\\t%0, #0\;bne\\t%l1\";
-  "
+  {
+    int offset = (INSN_ADDRESSES (INSN_UID (operands[1]))
+		  - INSN_ADDRESSES (INSN_UID (insn)));
+    if (get_attr_length (insn) == 2)
+      return "cbnz\t%0, %l1";
+    else if (offset >= -1048564 && offset <= 1048576)
+      return "cmp\t%0, #0\;bne\t%l1";
+    else if (which_alternative == 0)
+      return "cbz\t%0, %-LCB%=\;b\t%l1\n%-LCB%=:";
+    return "cmp\t%0, #0\;beq\t%-LCB%=\;b\t%l1\n%-LCB%=:";
+  }
   [(set (attr "length")
         (if_then_else
 	    (and (ge (minus (match_dup 1) (pc)) (const_int 2))
 	         (le (minus (match_dup 1) (pc)) (const_int 128))
 	         (not (match_test "which_alternative")))
 	    (const_int 2)
-	    (const_int 8)))
+	    (const_int 10)))
    (set_attr "type" "branch,multiple")]
 )
 
--- a/src/gcc/config/avr/avr-mcus.def
+++ b/src/gcc/config/avr/avr-mcus.def
@@ -313,6 +313,10 @@ AVR_MCU ("avr64da28",        ARCH_AVRXMEGA2, AVR_ISA_FLMAP, "__AVR_AVR64DA28__",
 AVR_MCU ("avr64da32",        ARCH_AVRXMEGA2, AVR_ISA_FLMAP, "__AVR_AVR64DA32__",   0x6000, 0x0, 0x10000, 0)
 AVR_MCU ("avr64da48",        ARCH_AVRXMEGA2, AVR_ISA_FLMAP, "__AVR_AVR64DA48__",   0x6000, 0x0, 0x10000, 0)
 AVR_MCU ("avr64da64",        ARCH_AVRXMEGA2, AVR_ISA_FLMAP, "__AVR_AVR64DA64__",   0x6000, 0x0, 0x10000, 0)
+AVR_MCU ("avr64da28s",       ARCH_AVRXMEGA2, AVR_ISA_FLMAP, "__AVR_AVR64DA28S__",  0x6000, 0x0, 0x10000, 0)
+AVR_MCU ("avr64da32s",       ARCH_AVRXMEGA2, AVR_ISA_FLMAP, "__AVR_AVR64DA32S__",  0x6000, 0x0, 0x10000, 0)
+AVR_MCU ("avr64da48s",       ARCH_AVRXMEGA2, AVR_ISA_FLMAP, "__AVR_AVR64DA48S__",  0x6000, 0x0, 0x10000, 0)
+AVR_MCU ("avr64da64s",       ARCH_AVRXMEGA2, AVR_ISA_FLMAP, "__AVR_AVR64DA64S__",  0x6000, 0x0, 0x10000, 0)
 AVR_MCU ("avr64db28",        ARCH_AVRXMEGA2, AVR_ISA_FLMAP, "__AVR_AVR64DB28__",   0x6000, 0x0, 0x10000, 0)
 AVR_MCU ("avr64db32",        ARCH_AVRXMEGA2, AVR_ISA_FLMAP, "__AVR_AVR64DB32__",   0x6000, 0x0, 0x10000, 0)
 AVR_MCU ("avr64db48",        ARCH_AVRXMEGA2, AVR_ISA_FLMAP, "__AVR_AVR64DB48__",   0x6000, 0x0, 0x10000, 0)
@@ -389,6 +393,9 @@ AVR_MCU ("avr16du32",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR16DU32__",
 AVR_MCU ("avr32da28",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32DA28__",   0x7000, 0x0, 0x8000, 0x8000)
 AVR_MCU ("avr32da32",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32DA32__",   0x7000, 0x0, 0x8000, 0x8000)
 AVR_MCU ("avr32da48",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32DA48__",   0x7000, 0x0, 0x8000, 0x8000)
+AVR_MCU ("avr32da28s",       ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32DA28S__",  0x7000, 0x0, 0x8000, 0x8000)
+AVR_MCU ("avr32da32s",       ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32DA32S__",  0x7000, 0x0, 0x8000, 0x8000)
+AVR_MCU ("avr32da48s",       ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32DA48S__",  0x7000, 0x0, 0x8000, 0x8000)
 AVR_MCU ("avr32db28",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32DB28__",   0x7000, 0x0, 0x8000, 0x8000)
 AVR_MCU ("avr32db32",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32DB32__",   0x7000, 0x0, 0x8000, 0x8000)
 AVR_MCU ("avr32db48",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32DB48__",   0x7000, 0x0, 0x8000, 0x8000)
@@ -404,12 +411,24 @@ AVR_MCU ("avr16eb14",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR16EB14__",
 AVR_MCU ("avr16eb20",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR16EB20__",   0x7800, 0x0, 0x4000, 0x8000)
 AVR_MCU ("avr16eb28",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR16EB28__",   0x7800, 0x0, 0x4000, 0x8000)
 AVR_MCU ("avr16eb32",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR16EB32__",   0x7800, 0x0, 0x4000, 0x8000)
+AVR_MCU ("avr32eb14",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32EB14__",   0x7400, 0x0, 0x8000, 0x8000)
+AVR_MCU ("avr32eb20",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32EB20__",   0x7400, 0x0, 0x8000, 0x8000)
+AVR_MCU ("avr32eb28",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32EB28__",   0x7400, 0x0, 0x8000, 0x8000)
+AVR_MCU ("avr32eb32",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32EB32__",   0x7400, 0x0, 0x8000, 0x8000)
 AVR_MCU ("avr16ea28",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR16EA28__",   0x7800, 0x0, 0x4000, 0x8000)
 AVR_MCU ("avr16ea32",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR16EA32__",   0x7800, 0x0, 0x4000, 0x8000)
 AVR_MCU ("avr16ea48",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR16EA48__",   0x7800, 0x0, 0x4000, 0x8000)
 AVR_MCU ("avr32ea28",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32EA28__",   0x7000, 0x0, 0x8000, 0x8000)
 AVR_MCU ("avr32ea32",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32EA32__",   0x7000, 0x0, 0x8000, 0x8000)
 AVR_MCU ("avr32ea48",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32EA48__",   0x7000, 0x0, 0x8000, 0x8000)
+AVR_MCU ("avr16la14",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR16LA14__",   0x7800, 0x0, 0x4000, 0x8000)
+AVR_MCU ("avr16la20",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR16LA20__",   0x7800, 0x0, 0x4000, 0x8000)
+AVR_MCU ("avr16la28",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR16LA28__",   0x7800, 0x0, 0x4000, 0x8000)
+AVR_MCU ("avr16la32",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR16LA32__",   0x7800, 0x0, 0x4000, 0x8000)
+AVR_MCU ("avr32la14",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32LA14__",   0x7800, 0x0, 0x8000, 0x8000)
+AVR_MCU ("avr32la20",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32LA20__",   0x7800, 0x0, 0x8000, 0x8000)
+AVR_MCU ("avr32la28",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32LA28__",   0x7800, 0x0, 0x8000, 0x8000)
+AVR_MCU ("avr32la32",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32LA32__",   0x7800, 0x0, 0x8000, 0x8000)
 AVR_MCU ("avr32sd20",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32SD20__",   0x7000, 0x0, 0x8000, 0x8000)
 AVR_MCU ("avr32sd28",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32SD28__",   0x7000, 0x0, 0x8000, 0x8000)
 AVR_MCU ("avr32sd32",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32SD32__",   0x7000, 0x0, 0x8000, 0x8000)
@@ -427,6 +446,10 @@ AVR_MCU ("avr128da28",       ARCH_AVRXMEGA4, AVR_ISA_FLMAP, "__AVR_AVR128DA28__"
 AVR_MCU ("avr128da32",       ARCH_AVRXMEGA4, AVR_ISA_FLMAP, "__AVR_AVR128DA32__",  0x4000, 0x0, 0x20000, 0)
 AVR_MCU ("avr128da48",       ARCH_AVRXMEGA4, AVR_ISA_FLMAP, "__AVR_AVR128DA48__",  0x4000, 0x0, 0x20000, 0)
 AVR_MCU ("avr128da64",       ARCH_AVRXMEGA4, AVR_ISA_FLMAP, "__AVR_AVR128DA64__",  0x4000, 0x0, 0x20000, 0)
+AVR_MCU ("avr128da28s",      ARCH_AVRXMEGA4, AVR_ISA_FLMAP, "__AVR_AVR128DA28S__", 0x4000, 0x0, 0x20000, 0)
+AVR_MCU ("avr128da32s",      ARCH_AVRXMEGA4, AVR_ISA_FLMAP, "__AVR_AVR128DA32S__", 0x4000, 0x0, 0x20000, 0)
+AVR_MCU ("avr128da48s",      ARCH_AVRXMEGA4, AVR_ISA_FLMAP, "__AVR_AVR128DA48S__", 0x4000, 0x0, 0x20000, 0)
+AVR_MCU ("avr128da64s",      ARCH_AVRXMEGA4, AVR_ISA_FLMAP, "__AVR_AVR128DA64S__", 0x4000, 0x0, 0x20000, 0)
 AVR_MCU ("avr128db28",       ARCH_AVRXMEGA4, AVR_ISA_FLMAP, "__AVR_AVR128DB28__",  0x4000, 0x0, 0x20000, 0)
 AVR_MCU ("avr128db32",       ARCH_AVRXMEGA4, AVR_ISA_FLMAP, "__AVR_AVR128DB32__",  0x4000, 0x0, 0x20000, 0)
 AVR_MCU ("avr128db48",       ARCH_AVRXMEGA4, AVR_ISA_FLMAP, "__AVR_AVR128DB48__",  0x4000, 0x0, 0x20000, 0)
--- a/src/gcc/config/avr/avr.cc
+++ b/src/gcc/config/avr/avr.cc
@@ -4368,7 +4368,8 @@ avr_load_libgcc_p (rtx op)
 
   return (n_bytes > 2
 	  && !AVR_HAVE_LPMX
-	  && avr_mem_flash_p (op));
+	  && avr_mem_flash_p (op)
+	  && MEM_ADDR_SPACE (op) == ADDR_SPACE_FLASH);
 }
 
 /* Return true if a value of mode MODE is read by __xload_* function.  */
@@ -4493,6 +4494,46 @@ avr_out_lpm_no_lpmx (rtx_insn *insn, rtx *xop, int *plen)
 	    avr_asm_len ("sbiw %2,1", xop, plen, 1);
 
 	  break; /* 2 */
+
+	/* cases 3 and 4 are only needed with ELPM but no ELPMx.  */
+
+	case 3:
+	  if (REGNO (dest) == REG_Z - 2
+	      && !reg_unused_after (insn, all_regs_rtx[REG_31]))
+	    avr_asm_len ("push r31", xop, plen, 1);
+
+	  avr_asm_len ("%4lpm $ mov %A0,%3 $ adiw %2,1", xop, plen, 3);
+	  avr_asm_len ("%4lpm $ mov %B0,%3 $ adiw %2,1", xop, plen, 3);
+	  avr_asm_len ("%4lpm $ mov %C0,%3", xop, plen, 2);
+
+	  if (REGNO (dest) == REG_Z - 2)
+	    {
+	      if (!reg_unused_after (insn, all_regs_rtx[REG_31]))
+		avr_asm_len ("pop r31", xop, plen, 1);
+	    }
+	  else if (!reg_unused_after (insn, addr))
+	    avr_asm_len ("sbiw %2,2", xop, plen, 1);
+
+	  break; /* 3 */
+
+	case 4:
+	  avr_asm_len ("%4lpm $ mov %A0,%3 $ adiw %2,1", xop, plen, 3);
+	  avr_asm_len ("%4lpm $ mov %B0,%3 $ adiw %2,1", xop, plen, 3);
+	  if (REGNO (dest) != REG_Z - 2)
+	    {
+	      avr_asm_len ("%4lpm $ mov %C0,%3 $ adiw %2,1", xop, plen, 3);
+	      avr_asm_len ("%4lpm $ mov %D0,%3", xop, plen, 2);
+	      if (!reg_unused_after (insn, addr))
+		avr_asm_len ("sbiw %2,3", xop, plen, 1);
+	    }
+	  else
+	    {
+	      avr_asm_len ("%4lpm $ push %3 $ adiw %2,1", xop, plen, 3);
+	      avr_asm_len ("%4lpm $ mov %D0,%3", xop, plen, 2);
+	      avr_asm_len ("pop $C0", xop, plen, 1);
+	    }
+
+	  break; /* 4 */
 	}
 
       break; /* REG */
@@ -10093,16 +10134,17 @@ avr_out_insv (rtx_insn *insn, rtx xop[], int *plen)
 }
 
 
-/* Output instructions to extract a bit to 8-bit register XOP[0].
-   The input XOP[1] is a register or an 8-bit MEM in the lower I/O range.
-   XOP[2] is the const_int bit position.  Return "".
+/* Output instructions to extract a bit to 8-bit register OP[0].
+   The input OP[1] is a register or an 8-bit MEM in the lower I/O range.
+   OP[2] is the const_int bit position.  Return "".
 
    PLEN != 0: Set *PLEN to the code length in words.  Don't output anything.
    PLEN == 0: Output instructions.  */
 
 const char *
-avr_out_extr (rtx_insn *insn, rtx xop[], int *plen)
+avr_out_extr (rtx_insn *insn, rtx op[], int *plen)
 {
+  rtx xop[] = { op[0], op[1], op[2] };
   rtx dest = xop[0];
   rtx src = xop[1];
   int bit = INTVAL (xop[2]);
@@ -10160,16 +10202,17 @@ avr_out_extr (rtx_insn *insn, rtx xop[], int *plen)
 }
 
 
-/* Output instructions to extract a negated bit to 8-bit register XOP[0].
-   The input XOP[1] is an 8-bit register or MEM in the lower I/O range.
-   XOP[2] is the const_int bit position.  Return "".
+/* Output instructions to extract a negated bit to 8-bit register OP[0].
+   The input OP[1] is an 8-bit register or MEM in the lower I/O range.
+   OP[2] is the const_int bit position.  Return "".
 
    PLEN != 0: Set *PLEN to the code length in words.  Don't output anything.
    PLEN == 0: Output instructions.  */
 
 const char *
-avr_out_extr_not (rtx_insn * /* insn */, rtx xop[], int *plen)
+avr_out_extr_not (rtx_insn * /* insn */, rtx op[], int *plen)
 {
+  rtx xop[] = { op[0], op[1], op[2] };
   rtx dest = xop[0];
   rtx src = xop[1];
   int bit = INTVAL (xop[2]);
@@ -14285,6 +14328,16 @@ avr_output_addr_vec (rtx_insn *labl, rtx table)
 
   app_disable();
 
+  // AVR-SD: On functional safety devices, each executed instruction must
+  // be followed by a valid opcode.  This is because instruction validation
+  // runs at fetch and decode for the next instruction and while the 2-stage
+  // pipeline is executing the current one.  There is no multilib option for
+  // these devices, so take all multilib variants that contain AVR-SD.
+  const bool maybe_sd = (AVR_HAVE_JMP_CALL
+			 && (avr_arch_index == ARCH_AVRXMEGA2
+			     || avr_arch_index == ARCH_AVRXMEGA3));
+  bool uses_subsection = false;
+
   // Switch to appropriate (sub)section.
 
   if (DECL_SECTION_NAME (current_function_decl)
@@ -14296,6 +14349,7 @@ avr_output_addr_vec (rtx_insn *labl, rtx table)
 
       switch_to_section (current_function_section ());
       fprintf (stream, "\t.subsection\t1\n");
+      uses_subsection = true;
     }
   else
     {
@@ -14318,9 +14372,21 @@ avr_output_addr_vec (rtx_insn *labl, rtx table)
 	       AVR_HAVE_JMP_CALL ? "a" : "ax");
     }
 
-  // Output the label that preceeds the table.
-
   ASM_OUTPUT_ALIGN (stream, 1);
+
+  if (maybe_sd && uses_subsection)
+    {
+      // Insert a valid opcode prior to the first gs() label.
+      // Any valid opcode will do.  Use CLH since it disassembles
+      // more nicely than NOP = 0x0000.  This is all GCC can do.
+      // Other cases, like inserting CLH after the vector table and
+      // after the last instruction, are handled by other parts of
+      // the toolchain.
+      fprintf (stream, "\tclh\n");
+    }
+
+  // Output the label that precedes the table.
+
   targetm.asm_out.internal_label (stream, "L", CODE_LABEL_NUMBER (labl));
 
   // Output the table's content.
--- a/src/gcc/config/avr/elf.h
+++ b/src/gcc/config/avr/elf.h
@@ -17,6 +17,19 @@
    along with GCC; see the file COPYING3.  If not see
    <http://www.gnu.org/licenses/>.  */
 
+/* defaults.h requires HAVE_INITFINI_ARRAY_SUPPORT to be present
+   in order for attribute "retain" to be recognized.  This is due
+   to some quirks in crtstuff.h -- which isn't even used by avr.
+   All we need is that Binutils supports the "R"etain section flag.
+   If that's the case, define SUPPORTS_SHF_GNU_RETAIN so that
+   defaults.h doesn't define it to 0.  */
+#if defined(IN_GCC) && !defined(USED_FOR_TARGET) && !defined(GENERATOR_FILE)
+#include "auto-host.h" /* HAVE_GAS_SHF_GNU_RETAIN */
+#if HAVE_GAS_SHF_GNU_RETAIN
+#undef SUPPORTS_SHF_GNU_RETAIN
+#define SUPPORTS_SHF_GNU_RETAIN 1
+#endif
+#endif
 
 /* Overriding some definitions from elfos.h for AVR.  */
 
--- a/src/gcc/config/avr/specs.h
+++ b/src/gcc/config/avr/specs.h
@@ -57,7 +57,7 @@ along with GCC; see the file COPYING3.  If not see
   "%(asm_errata_skip) "
 
 #define LINK_RELAX_SPEC                         \
-  "%{mrelax:--relax} "
+  "%{!r:%{mrelax:--relax}} "
 
 #undef  LINK_SPEC
 #define LINK_SPEC                               \
--- a/src/gcc/config/gnu.h
+++ b/src/gcc/config/gnu.h
@@ -19,6 +19,10 @@ You should have received a copy of the GNU General Public License
 along with GCC.  If not, see <http://www.gnu.org/licenses/>.
 */
 
+/* C libraries used on GNU/Hurd.  */
+#define OPTION_GLIBC_P(opts)	(DEFAULT_LIBC == LIBC_GLIBC)
+#define OPTION_GLIBC		OPTION_GLIBC_P (&global_options)
+
 #undef GNU_USER_TARGET_OS_CPP_BUILTINS
 #define GNU_USER_TARGET_OS_CPP_BUILTINS()		\
     do {					\
--- a/src/gcc/config/i386/amxbf16intrin.h
+++ b/src/gcc/config/i386/amxbf16intrin.h
@@ -36,8 +36,10 @@
 
 #if defined(__x86_64__)
 #define _tile_dpbf16ps_internal(dst,src1,src2)					\
-  __asm__ volatile\
-  ("{tdpbf16ps\t%%tmm"#src2", %%tmm"#src1", %%tmm"#dst"|tdpbf16ps\t%%tmm"#dst", %%tmm"#src1", %%tmm"#src2"}" ::)
+  __asm__ volatile								\
+  ("{tdpbf16ps\t%%tmm%c[_src2], %%tmm%c[_src1], %%tmm%c[_dst]			\
+    |tdpbf16ps\ttmm%c[_dst], tmm%c[_src1], tmm%c[_src2]}"			\
+    :: [_dst]"i"(dst), [_src1]"i"(src1), [_src2]"i"(src2))
 
 #define _tile_dpbf16ps(dst,src1,src2)					\
   _tile_dpbf16ps_internal (dst, src1, src2)
--- a/src/gcc/config/i386/amxcomplexintrin.h
+++ b/src/gcc/config/i386/amxcomplexintrin.h
@@ -35,13 +35,17 @@
 #endif /* __AMX_COMPLEX__ */
 
 #if defined(__x86_64__)
-#define _tile_cmmimfp16ps_internal(src1_dst,src2,src3)				\
-  __asm__ volatile\
-  ("{tcmmimfp16ps\t%%tmm"#src3", %%tmm"#src2", %%tmm"#src1_dst"|tcmmimfp16ps\t%%tmm"#src1_dst", %%tmm"#src2", %%tmm"#src3"}" ::)
-
-#define _tile_cmmrlfp16ps_internal(src1_dst,src2,src3)				\
-  __asm__ volatile\
-  ("{tcmmrlfp16ps\t%%tmm"#src3", %%tmm"#src2", %%tmm"#src1_dst"|tcmmrlfp16ps\t%%tmm"#src1_dst", %%tmm"#src2", %%tmm"#src3"}" ::)
+#define _tile_cmmimfp16ps_internal(src1_dst,src2,src3)			  \
+  __asm__ volatile							  \
+  ("{tcmmimfp16ps\t%%tmm%c[_src3], %%tmm%c[_src2], %%tmm%c[_src1_dst]	  \
+    |tcmmimfp16ps\ttmm%c[_src1_dst], tmm%c[_src2], tmm%c[_src3]}"	  \
+    :: [_src1_dst]"i"(src1_dst), [_src2]"i"(src2), [_src3]"i"(src3))
+
+#define _tile_cmmrlfp16ps_internal(src1_dst,src2,src3)			  \
+  __asm__ volatile							  \
+  ("{tcmmrlfp16ps\t%%tmm%c[_src3], %%tmm%c[_src2], %%tmm%c[_src1_dst]	  \
+    |tcmmrlfp16ps\ttmm%c[_src1_dst], tmm%c[_src2], tmm%c[_src3]}"	  \
+    :: [_src1_dst]"i"(src1_dst), [_src2]"i"(src2), [_src3]"i"(src3))
 
 #define _tile_cmmimfp16ps(src1_dst,src2,src3)					\
   _tile_cmmimfp16ps_internal (src1_dst, src2, src3)
--- a/src/gcc/config/i386/amxfp16intrin.h
+++ b/src/gcc/config/i386/amxfp16intrin.h
@@ -29,9 +29,11 @@
 #define _AMXFP16INTRIN_H_INCLUDED
 
 #if defined(__x86_64__)
-#define _tile_dpfp16ps_internal(dst,src1,src2)			\
-  __asm__ volatile \
-  ("{tdpfp16ps\t%%tmm"#src2", %%tmm"#src1", %%tmm"#dst"|tdpfp16ps\t%%tmm"#dst", %%tmm"#src1", %%tmm"#src2"}" ::)
+#define _tile_dpfp16ps_internal(dst,src1,src2)				\
+  __asm__ volatile							\
+  ("{tdpfp16ps\t%%tmm%c[_src2], %%tmm%c[_src1], %%tmm%c[_dst]		\
+    |tdpfp16ps\ttmm%c[_dst], tmm%c[_src1], tmm%c[_src2]}"		\
+    :: [_dst]"i"(dst), [_src1]"i"(src1), [_src2]"i"(src2))
 
 #define _tile_dpfp16ps(dst,src1,src2)				\
   _tile_dpfp16ps_internal (dst,src1,src2)
--- a/src/gcc/config/i386/amxint8intrin.h
+++ b/src/gcc/config/i386/amxint8intrin.h
@@ -37,7 +37,9 @@
 #if defined(__x86_64__)
 #define _tile_int8_dp_internal(name,dst,src1,src2)					\
   __asm__ volatile							\
-  ("{"#name"\t%%tmm"#src2", %%tmm"#src1", %%tmm"#dst"|"#name"\t%%tmm"#dst", %%tmm"#src1", %%tmm"#src2"}" ::)
+  ("{"#name"\t%%tmm%c[_src2], %%tmm%c[_src1], %%tmm%c[_dst]		\
+   |"#name"\ttmm%c[_dst], tmm%c[_src1], tmm%c[_src2]}"		\
+   ::[_dst]"i"(dst),[_src1]"i"(src1),[_src2]"i"(src2))
 
 #define _tile_dpbssd(dst,src1,src2)					\
   _tile_int8_dp_internal (tdpbssd, dst, src1, src2)
--- a/src/gcc/config/i386/amxtileintrin.h
+++ b/src/gcc/config/i386/amxtileintrin.h
@@ -61,32 +61,32 @@ _tile_release (void)
 
 #define _tile_loadd_internal(dst,base,stride)				\
   __asm__ volatile							\
-  ("{tileloadd\t(%0,%1,1), %%tmm"#dst"|tileloadd\t%%tmm"#dst", [%0+%1*1]}" \
-   :: "r" ((const void*) (base)), "r" ((__PTRDIFF_TYPE__) (stride)))
+  ("{tileloadd\t(%0,%1,1), %%tmm%c[_dst]|tileloadd\ttmm%c[_dst], [%0+%1*1]}" \
+  :: "r" ((const void*) (base)), "r" ((__PTRDIFF_TYPE__) (stride)), [_dst]"i"(dst))
 
 #define _tile_stream_loadd(dst,base,stride)		\
   _tile_stream_loadd_internal (dst, base, stride)
 
 #define _tile_stream_loadd_internal(dst,base,stride)			\
   __asm__ volatile							\
-  ("{tileloaddt1\t(%0,%1,1), %%tmm"#dst"|tileloaddt1\t%%tmm"#dst", [%0+%1*1]}" \
-   :: "r" ((const void*) (base)), "r" ((__PTRDIFF_TYPE__) (stride)))
+  ("{tileloaddt1\t(%0,%1,1), %%tmm%c[_dst]|tileloaddt1\ttmm%c[_dst], [%0+%1*1]}" \
+  :: "r" ((const void*) (base)), "r" ((__PTRDIFF_TYPE__) (stride)), [_dst]"i"(dst))
 
 #define _tile_stored(dst,base,stride)		\
   _tile_stored_internal (dst, base, stride)
 
 #define _tile_stored_internal(src,base,stride)				\
   __asm__ volatile							\
-  ("{tilestored\t%%tmm"#src", (%0,%1,1)|tilestored\t[%0+%1*1], %%tmm"#src"}" \
-   :: "r" ((void*) (base)), "r" ((__PTRDIFF_TYPE__) (stride)) \
-   : "memory")
+  ("{tilestored\t%%tmm%c[_src], (%0,%1,1)|tilestored\t[%0+%1*1], tmm%c[_src]}" \
+  :: "r" ((void*) (base)), "r" ((__PTRDIFF_TYPE__) (stride)), [_src]"i"(src) \
+  : "memory")
 
 #define _tile_zero(dst)				\
   _tile_zero_internal (dst)
 
-#define _tile_zero_internal(dst)		\
-  __asm__ volatile				\
-  ("tilezero\t%%tmm"#dst ::)
+#define _tile_zero_internal(dst)					\
+  __asm__ volatile							\
+  ("{tilezero\t%%tmm%c[_dst]|tilezero\ttmm%c[_dst]}" :: [_dst]"i"(dst))
 
 #endif
 
--- a/src/gcc/config/i386/driver-i386.cc
+++ b/src/gcc/config/i386/driver-i386.cc
@@ -658,18 +658,24 @@ const char *host_detect_local_cpu (int argc, const char **argv)
 		}
 	      else if (has_feature (FEATURE_AVX))
 		{
-		  /* Assume Panther Lake.  */
-		  if (has_feature (FEATURE_PREFETCHI))
-		    cpu = "pantherlake";
 		  /* Assume Clearwater Forest.  */
-		  else if (has_feature (FEATURE_USER_MSR))
+		  if (has_feature (FEATURE_USER_MSR))
 		    cpu = "clearwaterforest";
-		  /* Assume Arrow Lake S.  */
 		  else if (has_feature (FEATURE_SM3))
-		    cpu = "arrowlake-s";
+		    {
+			if (has_feature (FEATURE_KL))
+			  /* Assume Arrow Lake S.  */
+			  cpu = "arrowlake-s";
+			else
+			  /* Assume Panther Lake.  */
+			  cpu = "pantherlake";
+		    }
 		  /* Assume Sierra Forest.  */
-		  else if (has_feature (FEATURE_AVXVNNIINT8))
+		  else if (has_feature (FEATURE_CLDEMOTE))
 		    cpu = "sierraforest";
+		  /* Assume Arrow Lake.  */
+		  else if (has_feature (FEATURE_AVXVNNIINT8))
+		    cpu = "arrowlake";
 		  /* Assume Alder Lake.  */
 		  else if (has_feature (FEATURE_SERIALIZE))
 		    cpu = "alderlake";
--- a/src/gcc/config/i386/host-mingw32.cc
+++ b/src/gcc/config/i386/host-mingw32.cc
@@ -135,7 +135,6 @@ mingw32_gt_pch_use_address (void *&addr, size_t size, int fd,
      and earlier, backslashes are invalid in object name.  So, we need
      to check if we are on Windows2000 or higher.  */
   OSVERSIONINFO version_info;
-  int r;
 
   version_info.dwOSVersionInfoSize = sizeof (version_info);
 
@@ -169,25 +168,24 @@ mingw32_gt_pch_use_address (void *&addr, size_t size, int fd,
       return -1; 
     }
 
-  /* Retry five times, as here might occure a race with multiple gcc's
-     instances at same time.  */
-  for (r = 0; r < 5; r++)
-   {
-      mmap_addr = MapViewOfFileEx (mmap_handle, FILE_MAP_COPY, 0, offset,
-				   size, addr);
-      if (mmap_addr == addr)
-	break;
-      if (r != 4)
-        Sleep (500);
-   }
-      
-  if (mmap_addr != addr)
+  /* Try mapping the file at `addr`.  */
+  mmap_addr = MapViewOfFileEx (mmap_handle, FILE_MAP_COPY, 0, offset,
+			       size, addr);
+  if (mmap_addr == NULL)
     {
-      w32_error (__FUNCTION__, __FILE__, __LINE__, "MapViewOfFileEx");
-      CloseHandle(mmap_handle);
-      return  -1;
+      /* We could not map the file at its original address, so let the
+	 system choose a different one. The PCH can be relocated later.  */
+      mmap_addr = MapViewOfFileEx (mmap_handle, FILE_MAP_COPY, 0, offset,
+				   size, NULL);
+      if (mmap_addr == NULL)
+	{
+	  w32_error (__FUNCTION__, __FILE__, __LINE__, "MapViewOfFileEx");
+	  CloseHandle(mmap_handle);
+	  return  -1;
+	}
     }
 
+  addr = mmap_addr;
   return 1;
 }
 
--- a/src/gcc/config/i386/i386-expand.cc
+++ b/src/gcc/config/i386/i386-expand.cc
@@ -2344,34 +2344,44 @@ ix86_expand_copysign (rtx operands[])
     vdest = gen_reg_rtx (vmode);
   else
     dest = NULL_RTX;
-  op1 = lowpart_subreg (vmode, force_reg (mode, operands[2]), mode);
+  op1 = lowpart_subreg (vmode, force_reg (mode, operands[1]), mode);
   mask = ix86_build_signbit_mask (vmode, TARGET_AVX512F && mode != HFmode, 0);
 
-  if (CONST_DOUBLE_P (operands[1]))
+  if (CONST_DOUBLE_P (operands[2]))
     {
-      op0 = simplify_unary_operation (ABS, mode, operands[1], mode);
-      /* Optimize for 0, simplify b = copy_signf (0.0f, a) to b = mask & a.  */
-      if (op0 == CONST0_RTX (mode))
+      if (real_isneg (CONST_DOUBLE_REAL_VALUE (operands[2])))
+	/* Simplify b = copysign (a, negative) to b = mask | a.  */
+	op1 = gen_rtx_IOR (vmode, mask, op1);
+      else
 	{
-	  emit_move_insn (vdest, gen_rtx_AND (vmode, mask, op1));
-	  if (dest)
-	    emit_move_insn (dest, lowpart_subreg (mode, vdest, vmode));
-	  return;
+	  /* Simplify b = copysign (a, positive) to b = invert_mask & a.  */
+	  rtx invert_mask
+	    = ix86_build_signbit_mask (vmode,
+				       TARGET_AVX512F && mode != HFmode,
+				       true);
+	  op1 = gen_rtx_AND (vmode, invert_mask, op1);
 	}
-
-      if (GET_MODE_SIZE (mode) < 16)
-	op0 = ix86_build_const_vector (vmode, false, op0);
-      op0 = force_reg (vmode, op0);
+      emit_move_insn (vdest, op1);
+      if (dest)
+	emit_move_insn (dest, lowpart_subreg (mode, vdest, vmode));
+      return;
     }
   else
-    op0 = lowpart_subreg (vmode, force_reg (mode, operands[1]), mode);
+    op0 = lowpart_subreg (vmode, force_reg (mode, operands[2]), mode);
 
   op2 = gen_reg_rtx (vmode);
   op3 = gen_reg_rtx (vmode);
-  emit_move_insn (op2, gen_rtx_AND (vmode,
-				    gen_rtx_NOT (vmode, mask),
-				    op0));
-  emit_move_insn (op3, gen_rtx_AND (vmode, mask, op1));
+  rtx invert_mask;
+  /* NB: Generate vmovdqa, vpandn, vpand, vpor for AVX and generate pand,
+     pand, por for SSE.  */
+  if (TARGET_AVX)
+    invert_mask = gen_rtx_NOT (vmode, mask);
+  else
+    invert_mask = ix86_build_signbit_mask (vmode,
+					   TARGET_AVX512F && mode != HFmode,
+					   true);
+  emit_move_insn (op2, gen_rtx_AND (vmode, invert_mask, op1));
+  emit_move_insn (op3, gen_rtx_AND (vmode, mask, op0));
   emit_move_insn (vdest, gen_rtx_IOR (vmode, op2, op3));
   if (dest)
     emit_move_insn (dest, lowpart_subreg (mode, vdest, vmode));
@@ -13551,7 +13561,7 @@ ix86_expand_builtin (tree exp, rtx target, rtx subtarget,
 	for (i = 0; i < 3; i++)
 	  xmm_regs[i] = gen_rtx_REG (V2DImode, GET_SSE_REGNO (i));
 
-	if (target == 0)
+	if (target == 0 || !register_operand (target, SImode))
 	  target = gen_reg_rtx (SImode);
 
 	emit_insn (gen_encodekey128u32 (target, op0));
@@ -13594,7 +13604,7 @@ ix86_expand_builtin (tree exp, rtx target, rtx subtarget,
 	for (i = 0; i < 4; i++)
 	  xmm_regs[i] = gen_rtx_REG (V2DImode, GET_SSE_REGNO (i));
 
-	if (target == 0)
+	if (target == 0 || !register_operand (target, SImode))
 	  target = gen_reg_rtx (SImode);
 
 	emit_insn (gen_encodekey256u32 (target, op0));
@@ -13730,7 +13740,7 @@ ix86_expand_builtin (tree exp, rtx target, rtx subtarget,
 	  }
 	else
 	  {
-	    if (target == 0)
+	    if (target == 0 || !register_operand (target, DImode))
 	      target = gen_reg_rtx (DImode);
 	    icode = CODE_FOR_urdmsr;
 	    op1 = op0;
--- a/src/gcc/config/i386/i386.cc
+++ b/src/gcc/config/i386/i386.cc
@@ -12119,6 +12119,28 @@ static GTY(()) rtx ix86_tls_symbol;
 static rtx
 ix86_tls_get_addr (void)
 {
+  if (cfun->machine->call_saved_registers
+      == TYPE_NO_CALLER_SAVED_REGISTERS)
+    {
+      /* __tls_get_addr doesn't preserve vector registers.  When a
+	 function with no_caller_saved_registers attribute calls
+	 __tls_get_addr, YMM and ZMM registers will be clobbered.
+	 Issue an error and suggest -mtls-dialect=gnu2 in this case.  */
+      if (cfun->machine->func_type == TYPE_NORMAL)
+	error (G_("%<-mtls-dialect=gnu2%> must be used with a function"
+		  " with the %<no_caller_saved_registers%> attribute"));
+      else
+	error (cfun->machine->func_type == TYPE_EXCEPTION
+	       ? G_("%<-mtls-dialect=gnu2%> must be used with an"
+		    " exception service routine")
+	       : G_("%<-mtls-dialect=gnu2%> must be used with an"
+		    " interrupt service routine"));
+      /* Don't issue the same error twice.  */
+      cfun->machine->func_type = TYPE_NORMAL;
+      cfun->machine->call_saved_registers
+	= TYPE_DEFAULT_CALL_SAVED_REGISTERS;
+    }
+
   if (!ix86_tls_symbol)
     {
       const char *sym
@@ -12218,11 +12240,12 @@ legitimize_tls_address (rtx x, enum tls_model model, bool for_mov)
 	  if (TARGET_64BIT)
 	    {
 	      rtx rax = gen_rtx_REG (Pmode, AX_REG);
+	      rtx rdi = gen_rtx_REG (Pmode, DI_REG);
 	      rtx_insn *insns;
 
 	      start_sequence ();
 	      emit_call_insn
-		(gen_tls_global_dynamic_64 (Pmode, rax, x, caddr));
+		(gen_tls_global_dynamic_64 (Pmode, rax, x, caddr, rdi));
 	      insns = get_insns ();
 	      end_sequence ();
 
@@ -12272,12 +12295,13 @@ legitimize_tls_address (rtx x, enum tls_model model, bool for_mov)
 	  if (TARGET_64BIT)
 	    {
 	      rtx rax = gen_rtx_REG (Pmode, AX_REG);
+	      rtx rdi = gen_rtx_REG (Pmode, DI_REG);
 	      rtx_insn *insns;
 	      rtx eqv;
 
 	      start_sequence ();
 	      emit_call_insn
-		(gen_tls_local_dynamic_base_64 (Pmode, rax, caddr));
+		(gen_tls_local_dynamic_base_64 (Pmode, rax, caddr, rdi));
 	      insns = get_insns ();
 	      end_sequence ();
 
@@ -19999,7 +20023,7 @@ avx_vpermilp_parallel (rtx par, machine_mode mode)
 	}
       for (i = 2; i < 4; ++i)
 	{
-	  if (ipar[i] < 2)
+	  if (ipar[i] < 2 || ipar[i] >= 4)
 	    return 0;
 	  mask |= (ipar[i] - 2) << i;
 	}
--- a/src/gcc/config/i386/i386.h
+++ b/src/gcc/config/i386/i386.h
@@ -2415,12 +2415,14 @@ constexpr wide_int_bitmask PTA_GOLDMONT_PLUS = PTA_GOLDMONT | PTA_RDPID
   | PTA_SGX | PTA_PTWRITE;
 constexpr wide_int_bitmask PTA_TREMONT = PTA_GOLDMONT_PLUS | PTA_CLWB
   | PTA_GFNI | PTA_MOVDIRI | PTA_MOVDIR64B | PTA_CLDEMOTE | PTA_WAITPKG;
-constexpr wide_int_bitmask PTA_ALDERLAKE = PTA_TREMONT | PTA_ADX | PTA_AVX
+constexpr wide_int_bitmask PTA_ALDERLAKE = PTA_GOLDMONT_PLUS | PTA_CLWB
+  | PTA_GFNI | PTA_MOVDIRI | PTA_MOVDIR64B | PTA_WAITPKG | PTA_ADX | PTA_AVX
   | PTA_AVX2 | PTA_BMI | PTA_BMI2 | PTA_F16C | PTA_FMA | PTA_LZCNT
   | PTA_PCONFIG | PTA_PKU | PTA_VAES | PTA_VPCLMULQDQ | PTA_SERIALIZE
   | PTA_HRESET | PTA_KL | PTA_WIDEKL | PTA_AVXVNNI;
-constexpr wide_int_bitmask PTA_SIERRAFOREST = PTA_ALDERLAKE | PTA_AVXIFMA
-  | PTA_AVXVNNIINT8 | PTA_AVXNECONVERT | PTA_CMPCCXADD | PTA_ENQCMD | PTA_UINTR;
+constexpr wide_int_bitmask PTA_SIERRAFOREST = PTA_ALDERLAKE | PTA_CLDEMOTE
+  | PTA_AVXIFMA | PTA_AVXVNNIINT8 | PTA_AVXNECONVERT | PTA_CMPCCXADD
+  | PTA_ENQCMD | PTA_UINTR;
 constexpr wide_int_bitmask PTA_GRANITERAPIDS = PTA_SAPPHIRERAPIDS | PTA_AMX_FP16
   | PTA_PREFETCHI;
 constexpr wide_int_bitmask PTA_GRANITERAPIDS_D = PTA_GRANITERAPIDS
@@ -2430,10 +2432,11 @@ constexpr wide_int_bitmask PTA_ARROWLAKE = PTA_ALDERLAKE | PTA_AVXIFMA
   | PTA_AVXVNNIINT8 | PTA_AVXNECONVERT | PTA_CMPCCXADD | PTA_UINTR;
 constexpr wide_int_bitmask PTA_ARROWLAKE_S = PTA_ARROWLAKE | PTA_AVXVNNIINT16
   | PTA_SHA512 | PTA_SM3 | PTA_SM4;
-constexpr wide_int_bitmask PTA_CLEARWATERFOREST = PTA_SIERRAFOREST
-  | PTA_AVXVNNIINT16 | PTA_SHA512 | PTA_SM3 | PTA_SM4 | PTA_USER_MSR
-  | PTA_PREFETCHI;
-constexpr wide_int_bitmask PTA_PANTHERLAKE = PTA_ARROWLAKE_S | PTA_PREFETCHI;
+constexpr wide_int_bitmask PTA_CLEARWATERFOREST =
+  (PTA_SIERRAFOREST & (~(PTA_KL | PTA_WIDEKL))) | PTA_AVXVNNIINT16 | PTA_SHA512
+  | PTA_SM3 | PTA_SM4 | PTA_USER_MSR | PTA_PREFETCHI;
+constexpr wide_int_bitmask PTA_PANTHERLAKE =
+  (PTA_ARROWLAKE_S & (~(PTA_KL | PTA_WIDEKL)));
 constexpr wide_int_bitmask PTA_KNM = PTA_KNL | PTA_AVX5124VNNIW
   | PTA_AVX5124FMAPS | PTA_AVX512VPOPCNTDQ;
 
--- a/src/gcc/config/i386/i386.md
+++ b/src/gcc/config/i386/i386.md
@@ -2332,22 +2332,32 @@ (define_insn "*mov<mode>_xor"
    (set_attr "mode" "SI")
    (set_attr "length_immediate" "0")])
 
-(define_insn "*mov<mode>_and"
+;; Generate shorter "and $0,mem" for -Oz.  Split it to "mov $0,mem"
+;; otherwise.
+(define_insn_and_split "*mov<mode>_and"
   [(set (match_operand:SWI248 0 "memory_operand" "=m")
 	(match_operand:SWI248 1 "const0_operand"))
    (clobber (reg:CC FLAGS_REG))]
   "reload_completed"
   "and{<imodesuffix>}\t{%1, %0|%0, %1}"
+  "&& !(optimize_insn_for_size_p () && optimize_size > 1)"
+  [(set (match_dup 0) (match_dup 1))]
+  ""
   [(set_attr "type" "alu1")
    (set_attr "mode" "<MODE>")
    (set_attr "length_immediate" "1")])
 
-(define_insn "*mov<mode>_or"
+;; Generate shorter "or $-1,mem" for -Oz.  Split it to "mov $-1,mem"
+;; otherwise.
+(define_insn_and_split "*mov<mode>_or"
   [(set (match_operand:SWI248 0 "nonimmediate_operand" "=rm")
 	(match_operand:SWI248 1 "constm1_operand"))
    (clobber (reg:CC FLAGS_REG))]
   "reload_completed"
   "or{<imodesuffix>}\t{%1, %0|%0, %1}"
+  "&& !(optimize_insn_for_size_p () && optimize_size > 1)"
+  [(set (match_dup 0) (match_dup 1))]
+  ""
   [(set_attr "type" "alu1")
    (set_attr "mode" "<MODE>")
    (set_attr "length_immediate" "1")])
@@ -2852,6 +2862,8 @@ (define_peephole2
 	(match_operand:SWI248 1 "const_int_operand"))]
   "optimize_insn_for_size_p () && optimize_size > 1
    && operands[1] != const0_rtx
+   && (operands[1] != constm1_rtx
+       || (<MODE>mode == DImode && LEGACY_INT_REG_P (operands[0])))
    && IN_RANGE (INTVAL (operands[1]), -128, 127)
    && !ix86_red_zone_used
    && REGNO (operands[0]) != SP_REG"
@@ -4876,7 +4888,7 @@ (define_insn "*extendsidi2_rex64"
   "TARGET_64BIT"
   "@
    {cltq|cdqe}
-   movs{lq|x}\t{%1, %0|%0, %1}"
+   movs{lq|xd}\t{%1, %0|%0, %1}"
   [(set_attr "type" "imovx")
    (set_attr "mode" "DI")
    (set_attr "prefix_0f" "0")
@@ -14072,8 +14084,8 @@ (define_insn "*<code><mode>2_i387"
 
 (define_expand "copysign<mode>3"
   [(match_operand:SSEMODEF 0 "register_operand")
-   (match_operand:SSEMODEF 1 "nonmemory_operand")
-   (match_operand:SSEMODEF 2 "register_operand")]
+   (match_operand:SSEMODEF 1 "register_operand")
+   (match_operand:SSEMODEF 2 "nonmemory_operand")]
   "(SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH)
    || (TARGET_SSE && (<MODE>mode == TFmode))
    || (TARGET_AVX512FP16 && (<MODE>mode ==HFmode))"
@@ -21114,7 +21126,8 @@ (define_insn "*tls_global_dynamic_64_<mode>"
 	 (match_operand 3)))
    (unspec:P [(match_operand 1 "tls_symbolic_operand")
 	      (reg:P SP_REG)]
-	     UNSPEC_TLS_GD)]
+	     UNSPEC_TLS_GD)
+   (clobber (match_operand:P 4 "register_operand" "=D"))]
   "TARGET_64BIT"
 {
   if (!TARGET_X32)
@@ -21131,7 +21144,7 @@ (define_insn "*tls_global_dynamic_64_<mode>"
        Use data16 prefix instead, which doesn't have this problem.  */
     fputs ("\tdata16", asm_out_file);
   output_asm_insn
-    ("lea{q}\t{%E1@tlsgd(%%rip), %%rdi|rdi, %E1@tlsgd[rip]}", operands);
+    ("lea{q}\t{%E1@tlsgd(%%rip), %q4|%q4, %E1@tlsgd[rip]}", operands);
   if (TARGET_SUN_TLS || flag_plt || !HAVE_AS_IX86_TLS_GET_ADDR_GOT)
     fputs (ASM_SHORT "0x6666\n", asm_out_file);
   else
@@ -21155,14 +21168,15 @@ (define_insn "*tls_global_dynamic_64_largepic"
 	 (match_operand 4)))
    (unspec:DI [(match_operand 1 "tls_symbolic_operand")
 	       (reg:DI SP_REG)]
-	      UNSPEC_TLS_GD)]
+	      UNSPEC_TLS_GD)
+   (clobber (match_operand:DI 5 "register_operand" "=D"))]
   "TARGET_64BIT && ix86_cmodel == CM_LARGE_PIC && !TARGET_PECOFF
    && GET_CODE (operands[3]) == CONST
    && GET_CODE (XEXP (operands[3], 0)) == UNSPEC
    && XINT (XEXP (operands[3], 0), 1) == UNSPEC_PLTOFF"
 {
   output_asm_insn
-    ("lea{q}\t{%E1@tlsgd(%%rip), %%rdi|rdi, %E1@tlsgd[rip]}", operands);
+    ("lea{q}\t{%E1@tlsgd(%%rip), %5|%5, %E1@tlsgd[rip]}", operands);
   output_asm_insn ("movabs{q}\t{%3, %%rax|rax, %3}", operands);
   output_asm_insn ("add{q}\t{%2, %%rax|rax, %2}", operands);
   return "call\t{*%%rax|rax}";
@@ -21178,7 +21192,8 @@ (define_expand "@tls_global_dynamic_64_<mode>"
 	   (const_int 0)))
      (unspec:P [(match_operand 1 "tls_symbolic_operand")
 		(reg:P SP_REG)]
-	       UNSPEC_TLS_GD)])]
+	       UNSPEC_TLS_GD)
+     (clobber (match_operand:P 3 "register_operand"))])]
   "TARGET_64BIT"
   "ix86_tls_descriptor_calls_expanded_in_cfun = true;")
 
@@ -21229,11 +21244,12 @@ (define_insn "*tls_local_dynamic_base_64_<mode>"
 	(call:P
 	 (mem:QI (match_operand 1 "constant_call_address_operand" "Bz"))
 	 (match_operand 2)))
-   (unspec:P [(reg:P SP_REG)] UNSPEC_TLS_LD_BASE)]
+   (unspec:P [(reg:P SP_REG)] UNSPEC_TLS_LD_BASE)
+   (clobber (match_operand:P 3 "register_operand" "=D"))]
   "TARGET_64BIT"
 {
   output_asm_insn
-    ("lea{q}\t{%&@tlsld(%%rip), %%rdi|rdi, %&@tlsld[rip]}", operands);
+    ("lea{q}\t{%&@tlsld(%%rip), %q3|%q3, %&@tlsld[rip]}", operands);
   if (TARGET_SUN_TLS)
     return "call\t%p1@plt";
   if (flag_plt || !HAVE_AS_IX86_TLS_GET_ADDR_GOT)
@@ -21249,14 +21265,15 @@ (define_insn "*tls_local_dynamic_base_64_largepic"
 	 (mem:QI (plus:DI (match_operand:DI 1 "register_operand" "b")
 			  (match_operand:DI 2 "immediate_operand" "i")))
 	 (match_operand 3)))
-   (unspec:DI [(reg:DI SP_REG)] UNSPEC_TLS_LD_BASE)]
+   (unspec:DI [(reg:DI SP_REG)] UNSPEC_TLS_LD_BASE)
+   (clobber (match_operand:DI 4 "register_operand" "=D"))]
   "TARGET_64BIT && ix86_cmodel == CM_LARGE_PIC && !TARGET_PECOFF
    && GET_CODE (operands[2]) == CONST
    && GET_CODE (XEXP (operands[2], 0)) == UNSPEC
    && XINT (XEXP (operands[2], 0), 1) == UNSPEC_PLTOFF"
 {
   output_asm_insn
-    ("lea{q}\t{%&@tlsld(%%rip), %%rdi|rdi, %&@tlsld[rip]}", operands);
+    ("lea{q}\t{%&@tlsld(%%rip), %4|%4, %&@tlsld[rip]}", operands);
   output_asm_insn ("movabs{q}\t{%2, %%rax|rax, %2}", operands);
   output_asm_insn ("add{q}\t{%1, %%rax|rax, %1}", operands);
   return "call\t{*%%rax|rax}";
@@ -21270,7 +21287,8 @@ (define_expand "@tls_local_dynamic_base_64_<mode>"
 	   (call:P
 	    (mem:QI (match_operand 1))
 	    (const_int 0)))
-      (unspec:P [(reg:P SP_REG)] UNSPEC_TLS_LD_BASE)])]
+      (unspec:P [(reg:P SP_REG)] UNSPEC_TLS_LD_BASE)
+      (clobber (match_operand:P 2 "register_operand"))])]
   "TARGET_64BIT"
   "ix86_tls_descriptor_calls_expanded_in_cfun = true;")
 
@@ -24705,7 +24723,7 @@ (define_insn "movhf_mask"
   [(set (match_operand:HF 0 "nonimmediate_operand" "=v,m,v")
 	(unspec:HF
 	  [(match_operand:HF 1 "nonimmediate_operand" "m,v,v")
-	   (match_operand:HF 2 "nonimm_or_0_operand" "0C,0C,0C")
+	   (match_operand:HF 2 "nonimm_or_0_operand" "0C,0,0C")
 	   (match_operand:QI 3 "register_operand" "Yk,Yk,Yk")]
 	  UNSPEC_MOVCC_MASK))]
   "TARGET_AVX512FP16"
@@ -25745,7 +25763,7 @@ (define_insn "*stack_protect_set_4s_<mode>_di"
 {
   output_asm_insn ("mov{<imodesuffix>}\t{%3, %<k>1|%<k>1, %3}", operands);
   output_asm_insn ("mov{<imodesuffix>}\t{%<k>1, %0|%0, %<k>1}", operands);
-  return "movs{lq|x}\t{%2, %1|%1, %2}";
+  return "movs{lq|xd}\t{%2, %1|%1, %2}";
 }
   [(set_attr "type" "multi")
    (set_attr "length" "24")])
@@ -27688,7 +27706,7 @@ (define_insn "@wrss<mode>"
 		     (match_operand:SWI48 1 "memory_operand" "m")]
 		    UNSPECV_WRSS)]
   "TARGET_SHSTK"
-  "wrss<mskmodesuffix>\t%0, %1"
+  "wrss<mskmodesuffix>\t{%0, %1|%1, %0}"
   [(set_attr "length" "3")
    (set_attr "type" "other")])
 
@@ -27697,7 +27715,7 @@ (define_insn "@wruss<mode>"
 		     (match_operand:SWI48 1 "memory_operand" "m")]
 		    UNSPECV_WRUSS)]
   "TARGET_SHSTK"
-  "wruss<mskmodesuffix>\t%0, %1"
+  "wruss<mskmodesuffix>\t{%0, %1|%1, %0}"
   [(set_attr "length" "4")
    (set_attr "type" "other")])
 
--- a/src/gcc/config/i386/mmx.md
+++ b/src/gcc/config/i386/mmx.md
@@ -1998,7 +1998,8 @@ (define_expand "divv4hf3"
 	(div:V4HF
 	  (match_operand:V4HF 1 "nonimmediate_operand")
 	  (match_operand:V4HF 2 "register_operand")))]
-  "TARGET_AVX512FP16 && TARGET_AVX512VL && ix86_partial_vec_fp_math"
+  "TARGET_AVX512FP16 && TARGET_AVX512VL && ix86_partial_vec_fp_math
+  && TARGET_MMX_WITH_SSE"
 {
   rtx op2 = gen_reg_rtx (V8HFmode);
   rtx op1 = gen_reg_rtx (V8HFmode);
@@ -2678,7 +2679,8 @@ (define_expand "cmlav4hf4"
    (match_operand:V4HF 1 "vector_operand")
    (match_operand:V4HF 2 "vector_operand")
    (match_operand:V4HF 3 "vector_operand")]
-  "TARGET_AVX512FP16 && TARGET_AVX512VL"
+  "TARGET_AVX512FP16 && TARGET_AVX512VL
+  && TARGET_MMX_WITH_SSE"
 {
   rtx op3 = gen_reg_rtx (V8HFmode);
   rtx op2 = gen_reg_rtx (V8HFmode);
@@ -2700,7 +2702,8 @@ (define_expand "cmla_conjv4hf4"
    (match_operand:V4HF 1 "vector_operand")
    (match_operand:V4HF 2 "vector_operand")
    (match_operand:V4HF 3 "vector_operand")]
-  "TARGET_AVX512FP16 && TARGET_AVX512VL"
+  "TARGET_AVX512FP16 && TARGET_AVX512VL
+  && TARGET_MMX_WITH_SSE"
 {
   rtx op3 = gen_reg_rtx (V8HFmode);
   rtx op2 = gen_reg_rtx (V8HFmode);
@@ -2721,7 +2724,8 @@ (define_expand "cmulv4hf3"
   [(match_operand:V4HF 0 "register_operand")
    (match_operand:V4HF 1 "vector_operand")
    (match_operand:V4HF 2 "vector_operand")]
-  "TARGET_AVX512FP16 && TARGET_AVX512VL"
+  "TARGET_AVX512FP16 && TARGET_AVX512VL
+  && TARGET_MMX_WITH_SSE"
 {
   rtx op2 = gen_reg_rtx (V8HFmode);
   rtx op1 = gen_reg_rtx (V8HFmode);
@@ -2739,7 +2743,8 @@ (define_expand "cmul_conjv4hf3"
   [(match_operand:V4HF 0 "register_operand")
    (match_operand:V4HF 1 "vector_operand")
    (match_operand:V4HF 2 "vector_operand")]
-  "TARGET_AVX512FP16 && TARGET_AVX512VL"
+  "TARGET_AVX512FP16 && TARGET_AVX512VL
+  && TARGET_MMX_WITH_SSE"
 {
   rtx op2 = gen_reg_rtx (V8HFmode);
   rtx op1 = gen_reg_rtx (V8HFmode);
--- a/src/gcc/config/i386/sse.md
+++ b/src/gcc/config/i386/sse.md
@@ -1617,7 +1617,7 @@ (define_insn "*avx512f_load<mode>_mask"
 	  (match_operand:<ssevecmode> 4 "const0_operand")
 	  (const_int 1)))]
   "TARGET_AVX512F"
-  "vmov<ssescalarmodesuffix>\t{%1, %0%{%3%}%N2|%0%{3%}%N2, %1}"
+  "vmov<ssescalarmodesuffix>\t{%1, %0%{%3%}%N2|%0%{%3%}%N2, %1}"
   [(set_attr "type" "ssemov")
    (set_attr "prefix" "evex")
    (set_attr "memory" "load")
@@ -6291,7 +6291,7 @@ (define_insn "avx512f_vmfmadd_<mode>_mask3<round_name>"
 	  (match_dup 3)
 	  (const_int 1)))]
   "TARGET_AVX512F"
-  "vfmadd231<ssescalarmodesuffix>\t{<round_op5>%2, %1, %0%{%4%}|%0%{%4%}, %<iptr>3, %<iptr>2<round_op5>}"
+  "vfmadd231<ssescalarmodesuffix>\t{<round_op5>%2, %1, %0%{%4%}|%0%{%4%}, %<iptr>1, %<iptr>2<round_op5>}"
   [(set_attr "type" "ssemuladd")
    (set_attr "prefix" "evex")
    (set_attr "mode" "<MODE>")])
@@ -6365,7 +6365,7 @@ (define_insn "avx512f_vmfmsub_<mode>_mask3<round_name>"
 	  (match_dup 3)
 	  (const_int 1)))]
   "TARGET_AVX512F"
-  "vfmsub231<ssescalarmodesuffix>\t{<round_op5>%2, %1, %0%{%4%}|%0%{%4%}, %<iptr>3, %<iptr>2<round_op5>}"
+  "vfmsub231<ssescalarmodesuffix>\t{<round_op5>%2, %1, %0%{%4%}|%0%{%4%}, %<iptr>1, %<iptr>2<round_op5>}"
   [(set_attr "type" "ssemuladd")
    (set_attr "prefix" "evex")
    (set_attr "mode" "<MODE>")])
@@ -6426,7 +6426,7 @@ (define_insn "avx512f_vmfnmadd_<mode>_mask3<round_name>"
 	  (match_dup 3)
 	  (const_int 1)))]
   "TARGET_AVX512F"
-  "vfnmadd231<ssescalarmodesuffix>\t{<round_op5>%2, %1, %0%{%4%}|%0%{%4%}, %<iptr>3, %<iptr>2<round_op5>}"
+  "vfnmadd231<ssescalarmodesuffix>\t{<round_op5>%2, %1, %0%{%4%}|%0%{%4%}, %<iptr>1, %<iptr>2<round_op5>}"
   [(set_attr "type" "ssemuladd")
    (set_attr "prefix" "evex")
    (set_attr "mode" "<MODE>")])
@@ -6503,7 +6503,7 @@ (define_insn "*avx512f_vmfnmsub_<mode>_mask3<round_name>"
 	  (match_dup 3)
 	  (const_int 1)))]
   "TARGET_AVX512F"
-  "vfnmsub231<ssescalarmodesuffix>\t{<round_op5>%2, %1, %0%{%4%}|%0%{%4%}, %<iptr>3, %<iptr>2<round_op5>}"
+  "vfnmsub231<ssescalarmodesuffix>\t{<round_op5>%2, %1, %0%{%4%}|%0%{%4%}, %<iptr>1, %<iptr>2<round_op5>}"
   [(set_attr "type" "ssemuladd")
    (set_attr "prefix" "evex")
    (set_attr "mode" "<MODE>")])
@@ -20793,6 +20793,19 @@ (define_insn "vec_concatv2di"
 	   (const_string "orig")))
    (set_attr "mode" "TI,TI,TI,TI,TI,TI,V4SF,V2SF,V2SF")])
 
+;; Eliminate redundancy caused by
+;; /* Special case TImode to 128-bit vector conversions via V2DI.  */
+;; in ix86_expand_vector_move
+
+(define_split
+  [(set (match_operand:V2DI 0 "register_operand")
+	(vec_concat:V2DI
+	  (subreg:DI (match_operand:TI 1 "register_operand") 0)
+	  (subreg:DI (match_dup 1) 8)))]
+  "TARGET_SSE2 && ix86_pre_reload_split ()"
+  [(set (match_dup 0)
+	(subreg:V2DI (match_dup 1) 0))])
+
 (define_insn "*vec_concatv2di_0"
   [(set (match_operand:V2DI 0 "register_operand"     "=v,v ,x")
 	(vec_concat:V2DI
@@ -22971,7 +22984,7 @@ (define_insn "*sse4_1_<code>v8qiv8hi2<mask_name>_1"
    (set_attr "prefix" "orig,orig,maybe_evex")
    (set_attr "mode" "TI")])
 
-(define_insn_and_split "*sse4_1_<code>v8qiv8hi2<mask_name>_2"
+(define_insn_and_split "*sse4_1_<code>v8qiv8hi2_2"
   [(set (match_operand:V8HI 0 "register_operand")
 	(any_extend:V8HI
 	  (vec_select:V8QI
@@ -22983,7 +22996,7 @@ (define_insn_and_split "*sse4_1_<code>v8qiv8hi2<mask_name>_2"
 		       (const_int 2) (const_int 3)
 		       (const_int 4) (const_int 5)
 		       (const_int 6) (const_int 7)]))))]
-  "TARGET_SSE4_1 && <mask_avx512bw_condition> && <mask_avx512vl_condition>
+  "TARGET_SSE4_1
    && ix86_pre_reload_split ()"
   "#"
   "&& 1"
@@ -22991,6 +23004,32 @@ (define_insn_and_split "*sse4_1_<code>v8qiv8hi2<mask_name>_2"
 	(any_extend:V8HI (match_dup 1)))]
   "operands[1] = adjust_address_nv (operands[1], V8QImode, 0);")
 
+(define_insn_and_split "*avx512vl_<code>v8qiv8hi2_mask_2"
+  [(set (match_operand:V8HI 0 "register_operand")
+	(vec_merge:V8HI
+	  (any_extend:V8HI
+	    (vec_select:V8QI
+	      (subreg:V16QI
+		(vec_concat:V2DI
+		  (match_operand:DI 1 "memory_operand")
+		  (const_int 0)) 0)
+	      (parallel [(const_int 0) (const_int 1)
+			 (const_int 2) (const_int 3)
+		         (const_int 4) (const_int 5)
+		         (const_int 6) (const_int 7)])))
+	  (match_operand:V8HI 2 "nonimm_or_0_operand")
+	  (match_operand:QI 3 "register_operand")))]
+  "TARGET_AVX512VL && TARGET_AVX512BW
+   && ix86_pre_reload_split ()"
+  "#"
+  "&& 1"
+  [(set (match_dup 0)
+	(vec_merge:V8HI
+	  (any_extend:V8HI (match_dup 1))
+	  (match_dup 2)
+	  (match_dup 3)))]
+  "operands[1] = adjust_address_nv (operands[1], V8QImode, 0);")
+
 (define_insn_and_split "*sse4_1_zero_extendv8qiv8hi2_3"
   [(set (match_operand:V16QI 0 "register_operand" "=Yr,*x,Yw")
 	(vec_select:V16QI
@@ -23123,7 +23162,7 @@ (define_insn "*avx2_<code>v8qiv8si2<mask_name>_1"
    (set_attr "prefix" "maybe_evex")
    (set_attr "mode" "OI")])
 
-(define_insn_and_split "*avx2_<code>v8qiv8si2<mask_name>_2"
+(define_insn_and_split "*avx2_<code>v8qiv8si2_2"
   [(set (match_operand:V8SI 0 "register_operand")
 	(any_extend:V8SI
 	  (vec_select:V8QI
@@ -23135,7 +23174,7 @@ (define_insn_and_split "*avx2_<code>v8qiv8si2<mask_name>_2"
 		       (const_int 2) (const_int 3)
 		       (const_int 4) (const_int 5)
 		       (const_int 6) (const_int 7)]))))]
-  "TARGET_AVX2 && <mask_avx512vl_condition>
+  "TARGET_AVX2
    && ix86_pre_reload_split ()"
   "#"
   "&& 1"
@@ -23143,6 +23182,33 @@ (define_insn_and_split "*avx2_<code>v8qiv8si2<mask_name>_2"
 	(any_extend:V8SI (match_dup 1)))]
   "operands[1] = adjust_address_nv (operands[1], V8QImode, 0);")
 
+(define_insn_and_split "*avx512vl_<code>v8qiv8si2_mask_2"
+  [(set (match_operand:V8SI 0 "register_operand")
+	(vec_merge:V8SI
+	  (any_extend:V8SI
+	    (vec_select:V8QI
+	      (subreg:V16QI
+		(vec_concat:V2DI
+		  (match_operand:DI 1 "memory_operand")
+		  (const_int 0)) 0)
+	      (parallel [(const_int 0) (const_int 1)
+			 (const_int 2) (const_int 3)
+			 (const_int 4) (const_int 5)
+			 (const_int 6) (const_int 7)])))
+	  (match_operand:V8SI 2 "nonimm_or_0_operand")
+	  (match_operand:QI 3 "register_operand")))]
+  "TARGET_AVX512VL
+   && ix86_pre_reload_split ()"
+  "#"
+  "&& 1"
+  [(set (match_dup 0)
+	(vec_merge:V8SI
+	  (any_extend:V8SI (match_dup 1))
+	  (match_dup 2)
+	  (match_dup 3)))]
+  "operands[1] = adjust_address_nv (operands[1], V8QImode, 0);")
+
+
 (define_expand "<insn>v8qiv8si2"
   [(set (match_operand:V8SI 0 "register_operand")
 	(any_extend:V8SI
@@ -23186,7 +23252,7 @@ (define_insn "*sse4_1_<code>v4qiv4si2<mask_name>_1"
    (set_attr "prefix" "orig,orig,maybe_evex")
    (set_attr "mode" "TI")])
 
-(define_insn_and_split "*sse4_1_<code>v4qiv4si2<mask_name>_2"
+(define_insn_and_split "*sse4_1_<code>v4qiv4si2_2"
   [(set (match_operand:V4SI 0 "register_operand")
 	(any_extend:V4SI
 	  (vec_select:V4QI
@@ -23208,6 +23274,35 @@ (define_insn_and_split "*sse4_1_<code>v4qiv4si2<mask_name>_2"
 	(any_extend:V4SI (match_dup 1)))]
   "operands[1] = adjust_address_nv (operands[1], V4QImode, 0);")
 
+(define_insn_and_split "*avx512vl_<code>v4qiv4si2_mask_2"
+  [(set (match_operand:V4SI 0 "register_operand")
+	(vec_merge:V4SI
+	  (any_extend:V4SI
+	    (vec_select:V4QI
+	      (subreg:V16QI
+		(vec_merge:V4SI
+		  (vec_duplicate:V4SI
+		    (match_operand:SI 1 "memory_operand"))
+		  (const_vector:V4SI
+		    [(const_int 0) (const_int 0)
+		     (const_int 0) (const_int 0)])
+		  (const_int 1)) 0)
+	      (parallel [(const_int 0) (const_int 1)
+			 (const_int 2) (const_int 3)])))
+	  (match_operand:V4SI 2 "nonimm_or_0_operand")
+	  (match_operand:QI 3 "register_operand")))]
+  "TARGET_AVX512VL
+   && ix86_pre_reload_split ()"
+  "#"
+  "&& 1"
+  [(set (match_dup 0)
+	(vec_merge:V4SI
+	  (any_extend:V4SI (match_dup 1))
+	  (match_dup 2)
+	  (match_dup 3)))]
+  "operands[1] = adjust_address_nv (operands[1], V4QImode, 0);")
+
+
 (define_expand "<insn>v4qiv4si2"
   [(set (match_operand:V4SI 0 "register_operand")
 	(any_extend:V4SI
@@ -23359,7 +23454,7 @@ (define_insn "*sse4_1_<code>v4hiv4si2<mask_name>_1"
    (set_attr "prefix" "orig,orig,maybe_evex")
    (set_attr "mode" "TI")])
 
-(define_insn_and_split "*sse4_1_<code>v4hiv4si2<mask_name>_2"
+(define_insn_and_split "*sse4_1_<code>v4hiv4si2_2"
   [(set (match_operand:V4SI 0 "register_operand")
 	(any_extend:V4SI
 	  (vec_select:V4HI
@@ -23369,7 +23464,7 @@ (define_insn_and_split "*sse4_1_<code>v4hiv4si2<mask_name>_2"
 		(const_int 0)) 0)
 	    (parallel [(const_int 0) (const_int 1)
 		       (const_int 2) (const_int 3)]))))]
-  "TARGET_SSE4_1 && <mask_avx512vl_condition>
+  "TARGET_SSE4_1
    && ix86_pre_reload_split ()"
   "#"
   "&& 1"
@@ -23377,6 +23472,31 @@ (define_insn_and_split "*sse4_1_<code>v4hiv4si2<mask_name>_2"
 	(any_extend:V4SI (match_dup 1)))]
   "operands[1] = adjust_address_nv (operands[1], V4HImode, 0);")
 
+(define_insn_and_split "*avx512vl_<code>v4hiv4si2_mask_2"
+  [(set (match_operand:V4SI 0 "register_operand")
+	(vec_merge:V4SI
+	  (any_extend:V4SI
+	    (vec_select:V4HI
+	      (subreg:V8HI
+		(vec_concat:V2DI
+		  (match_operand:DI 1 "memory_operand")
+		  (const_int 0)) 0)
+	      (parallel [(const_int 0) (const_int 1)
+			 (const_int 2) (const_int 3)])))
+	  (match_operand:V4SI 2 "nonimm_or_0_operand")
+	  (match_operand:QI 3 "register_operand")))]
+  "TARGET_AVX512VL
+   && ix86_pre_reload_split ()"
+  "#"
+  "&& 1"
+  [(set (match_dup 0)
+	(vec_merge:V4SI
+	  (any_extend:V4SI (match_dup 1))
+	  (match_dup 2)
+	  (match_dup 3)))]
+  "operands[1] = adjust_address_nv (operands[1], V4HImode, 0);")
+
+
 (define_expand "<insn>v4hiv4si2"
   [(set (match_operand:V4SI 0 "register_operand")
 	(any_extend:V4SI
@@ -23487,7 +23607,7 @@ (define_insn "*avx512f_<code>v8qiv8di2<mask_name>_1"
    (set_attr "prefix" "evex")
    (set_attr "mode" "XI")])
 
-(define_insn_and_split "*avx512f_<code>v8qiv8di2<mask_name>_2"
+(define_insn_and_split "*avx512f_<code>v8qiv8di2_2"
   [(set (match_operand:V8DI 0 "register_operand")
 	(any_extend:V8DI
 	  (vec_select:V8QI
@@ -23506,6 +23626,32 @@ (define_insn_and_split "*avx512f_<code>v8qiv8di2<mask_name>_2"
 	(any_extend:V8DI (match_dup 1)))]
   "operands[1] = adjust_address_nv (operands[1], V8QImode, 0);")
 
+(define_insn_and_split "*avx512f_<code>v8qiv8di2_mask_2"
+  [(set (match_operand:V8DI 0 "register_operand")
+	(vec_merge:V8DI
+	  (any_extend:V8DI
+	    (vec_select:V8QI
+	      (subreg:V16QI
+		(vec_concat:V2DI
+		  (match_operand:DI 1 "memory_operand")
+		  (const_int 0)) 0)
+	      (parallel [(const_int 0) (const_int 1)
+			 (const_int 2) (const_int 3)
+		         (const_int 4) (const_int 5)
+		         (const_int 6) (const_int 7)])))
+	  (match_operand:V8DI 2 "nonimm_or_0_operand")
+	  (match_operand:QI 3 "register_operand")))]
+  "TARGET_AVX512F && ix86_pre_reload_split ()"
+  "#"
+  "&& 1"
+  [(set (match_dup 0)
+	(vec_merge:V8DI
+	  (any_extend:V8DI (match_dup 1))
+	  (match_dup 2)
+	  (match_dup 3)))]
+  "operands[1] = adjust_address_nv (operands[1], V8QImode, 0);")
+
+
 (define_expand "<insn>v8qiv8di2"
   [(set (match_operand:V8DI 0 "register_operand")
 	(any_extend:V8DI
@@ -23546,7 +23692,7 @@ (define_insn "*avx2_<code>v4qiv4di2<mask_name>_1"
    (set_attr "prefix" "maybe_evex")
    (set_attr "mode" "OI")])
 
-(define_insn_and_split "*avx2_<code>v4qiv4di2<mask_name>_2"
+(define_insn_and_split "*avx2_<code>v4qiv4di2_2"
   [(set (match_operand:V4DI 0 "register_operand")
 	(any_extend:V4DI
 	  (vec_select:V4QI
@@ -23560,7 +23706,7 @@ (define_insn_and_split "*avx2_<code>v4qiv4di2<mask_name>_2"
 		(const_int 1)) 0)
 	    (parallel [(const_int 0) (const_int 1)
 		       (const_int 2) (const_int 3)]))))]
-  "TARGET_AVX2 && <mask_avx512vl_condition>
+  "TARGET_AVX2
    && ix86_pre_reload_split ()"
   "#"
   "&& 1"
@@ -23568,6 +23714,35 @@ (define_insn_and_split "*avx2_<code>v4qiv4di2<mask_name>_2"
 	(any_extend:V4DI (match_dup 1)))]
   "operands[1] = adjust_address_nv (operands[1], V4QImode, 0);")
 
+(define_insn_and_split "*avx512vl_<code>v4qiv4di2_mask_2"
+  [(set (match_operand:V4DI 0 "register_operand")
+	(vec_merge:V4DI
+	  (any_extend:V4DI
+	    (vec_select:V4QI
+	      (subreg:V16QI
+		(vec_merge:V4SI
+		  (vec_duplicate:V4SI
+		    (match_operand:SI 1 "memory_operand"))
+		  (const_vector:V4SI
+		    [(const_int 0) (const_int 0)
+		     (const_int 0) (const_int 0)])
+		  (const_int 1)) 0)
+	      (parallel [(const_int 0) (const_int 1)
+			 (const_int 2) (const_int 3)])))
+	  (match_operand:V4DI 2 "nonimm_or_0_operand")
+	  (match_operand:QI 3 "register_operand")))]
+  "TARGET_AVX512VL
+   && ix86_pre_reload_split ()"
+  "#"
+  "&& 1"
+  [(set (match_dup 0)
+	(vec_merge:V4DI
+	  (any_extend:V4DI (match_dup 1))
+	  (match_dup 2)
+	  (match_dup 3)))]
+  "operands[1] = adjust_address_nv (operands[1], V4QImode, 0);")
+
+
 (define_expand "<insn>v4qiv4di2"
   [(set (match_operand:V4DI 0 "register_operand")
 	(any_extend:V4DI
@@ -23689,7 +23864,7 @@ (define_insn "*avx2_<code>v4hiv4di2<mask_name>_1"
    (set_attr "prefix" "maybe_evex")
    (set_attr "mode" "OI")])
 
-(define_insn_and_split "*avx2_<code>v4hiv4di2<mask_name>_2"
+(define_insn_and_split "*avx2_<code>v4hiv4di2_2"
   [(set (match_operand:V4DI 0 "register_operand")
 	(any_extend:V4DI
 	  (vec_select:V4HI
@@ -23699,7 +23874,7 @@ (define_insn_and_split "*avx2_<code>v4hiv4di2<mask_name>_2"
 		(const_int 0)) 0)
 	    (parallel [(const_int 0) (const_int 1)
 		       (const_int 2) (const_int 3)]))))]
-  "TARGET_AVX2 && <mask_avx512vl_condition>
+  "TARGET_AVX2
    && ix86_pre_reload_split ()"
   "#"
   "&& 1"
@@ -23707,6 +23882,31 @@ (define_insn_and_split "*avx2_<code>v4hiv4di2<mask_name>_2"
 	(any_extend:V4DI (match_dup 1)))]
   "operands[1] = adjust_address_nv (operands[1], V4HImode, 0);")
 
+(define_insn_and_split "*avx512vl_<code>v4hiv4di2_mask_2"
+  [(set (match_operand:V4DI 0 "register_operand")
+	(vec_merge:V4DI
+	  (any_extend:V4DI
+	    (vec_select:V4HI
+	      (subreg:V8HI
+		(vec_concat:V2DI
+		  (match_operand:DI 1 "memory_operand")
+		  (const_int 0)) 0)
+	      (parallel [(const_int 0) (const_int 1)
+		         (const_int 2) (const_int 3)])))
+	  (match_operand:V4DI 2 "nonimm_or_0_operand")
+	  (match_operand:QI 3 "register_operand")))]
+  "TARGET_AVX512VL
+   && ix86_pre_reload_split ()"
+  "#"
+  "&& 1"
+  [(set (match_dup 0)
+	(vec_merge:V4DI
+	  (any_extend:V4DI (match_dup 1))
+	  (match_dup 2)
+	  (match_dup 3)))]
+  "operands[1] = adjust_address_nv (operands[1], V4HImode, 0);")
+
+
 (define_expand "<insn>v4hiv4di2"
   [(set (match_operand:V4DI 0 "register_operand")
 	(any_extend:V4DI
@@ -23749,7 +23949,7 @@ (define_insn "*sse4_1_<code>v2hiv2di2<mask_name>_1"
    (set_attr "prefix" "orig,orig,maybe_evex")
    (set_attr "mode" "TI")])
 
-(define_insn_and_split "*sse4_1_<code>v2hiv2di2<mask_name>_2"
+(define_insn_and_split "*sse4_1_<code>v2hiv2di2_2"
   [(set (match_operand:V2DI 0 "register_operand")
 	(any_extend:V2DI
 	  (vec_select:V2HI
@@ -23762,7 +23962,7 @@ (define_insn_and_split "*sse4_1_<code>v2hiv2di2<mask_name>_2"
 		    (const_int 0) (const_int 0)])
 		(const_int 1)) 0)
 	    (parallel [(const_int 0) (const_int 1)]))))]
-  "TARGET_SSE4_1 && <mask_avx512vl_condition>
+  "TARGET_SSE4_1
    && ix86_pre_reload_split ()"
   "#"
   "&& 1"
@@ -23770,6 +23970,34 @@ (define_insn_and_split "*sse4_1_<code>v2hiv2di2<mask_name>_2"
 	(any_extend:V2DI (match_dup 1)))]
   "operands[1] = adjust_address_nv (operands[1], V2HImode, 0);")
 
+(define_insn_and_split "*avx512vl_<code>v2hiv2di2_mask_2"
+  [(set (match_operand:V2DI 0 "register_operand")
+	(vec_merge:V2DI
+	  (any_extend:V2DI
+	    (vec_select:V2HI
+	      (subreg:V8HI
+		(vec_merge:V4SI
+		  (vec_duplicate:V4SI
+		    (match_operand:SI 1 "memory_operand"))
+		  (const_vector:V4SI
+		    [(const_int 0) (const_int 0)
+		     (const_int 0) (const_int 0)])
+		  (const_int 1)) 0)
+	      (parallel [(const_int 0) (const_int 1)])))
+	  (match_operand:V2DI 2 "nonimm_or_0_operand")
+	  (match_operand:QI 3 "register_operand")))]
+  "TARGET_AVX512VL
+   && ix86_pre_reload_split ()"
+  "#"
+  "&& 1"
+  [(set (match_dup 0)
+	(vec_merge:V2DI
+	  (any_extend:V2DI (match_dup 1))
+	  (match_dup 2)
+	  (match_dup 3)))]
+  "operands[1] = adjust_address_nv (operands[1], V2HImode, 0);")
+
+
 (define_expand "<insn>v2hiv2di2"
   [(set (match_operand:V2DI 0 "register_operand")
 	(any_extend:V2DI
@@ -23915,7 +24143,7 @@ (define_insn "*sse4_1_<code>v2siv2di2<mask_name>_1"
    (set_attr "prefix" "orig,orig,maybe_evex")
    (set_attr "mode" "TI")])
 
-(define_insn_and_split "*sse4_1_<code>v2siv2di2<mask_name>_2"
+(define_insn_and_split "*sse4_1_<code>v2siv2di2_2"
   [(set (match_operand:V2DI 0 "register_operand")
 	(any_extend:V2DI
 	  (vec_select:V2SI
@@ -23924,7 +24152,7 @@ (define_insn_and_split "*sse4_1_<code>v2siv2di2<mask_name>_2"
 		(match_operand:DI 1 "memory_operand")
 		(const_int 0)) 0)
 	    (parallel [(const_int 0) (const_int 1)]))))]
-  "TARGET_SSE4_1 && <mask_avx512vl_condition>
+  "TARGET_SSE4_1
    && ix86_pre_reload_split ()"
   "#"
   "&& 1"
@@ -23932,6 +24160,29 @@ (define_insn_and_split "*sse4_1_<code>v2siv2di2<mask_name>_2"
 	(any_extend:V2DI (match_dup 1)))]
   "operands[1] = adjust_address_nv (operands[1], V2SImode, 0);")
 
+(define_insn_and_split "*avx512vl_<code>v2siv2di2_mask_2"
+  [(set (match_operand:V2DI 0 "register_operand")
+	(vec_merge:V2DI
+	  (any_extend:V2DI
+	    (vec_select:V2SI
+	      (subreg:V4SI
+		(vec_concat:V2DI
+		  (match_operand:DI 1 "memory_operand")
+		  (const_int 0)) 0)
+	      (parallel [(const_int 0) (const_int 1)])))
+	  (match_operand:V2DI 2 "nonimm_or_0_operand")
+	  (match_operand:QI 3 "register_operand")))]
+  "TARGET_AVX512VL
+   && ix86_pre_reload_split ()"
+  "#"
+  "&& 1"
+  [(set (match_dup 0)
+	(vec_merge:V2DI
+	  (any_extend:V2DI (match_dup 1))
+	  (match_dup 2)
+	  (match_dup 3)))]
+  "operands[1] = adjust_address_nv (operands[1], V2SImode, 0);")
+
 (define_insn_and_split "*sse4_1_zero_extendv2siv2di2_3"
   [(set (match_operand:V4SI 0 "register_operand" "=Yr,*x,v")
 	(vec_select:V4SI
@@ -27002,17 +27253,18 @@ (define_insn "*vec_dupv2di"
 (define_insn "avx2_vbroadcasti128_<mode>"
   [(set (match_operand:VI_256 0 "register_operand" "=x,v,v")
 	(vec_concat:VI_256
-	  (match_operand:<ssehalfvecmode> 1 "memory_operand" "m,m,m")
+	  (match_operand:<ssehalfvecmode> 1 "memory_operand" "jm,m,m")
 	  (match_dup 1)))]
   "TARGET_AVX2"
   "@
    vbroadcasti128\t{%1, %0|%0, %1}
    vbroadcast<i128vldq>\t{%1, %0|%0, %1}
    vbroadcast<shuffletype>32x4\t{%1, %0|%0, %1}"
-  [(set_attr "isa" "*,avx512dq,avx512vl")
+  [(set_attr "isa" "noavx512vl,avx512dq,avx512vl")
    (set_attr "type" "ssemov")
    (set_attr "prefix_extra" "1")
    (set_attr "prefix" "vex,evex,evex")
+   (set_attr "addr" "gpr16,*,*")
    (set_attr "mode" "OI")])
 
 ;; optimize vlddqu + vinserti128 to vbroadcasti128, the former will use
--- a/src/gcc/config/i386/x86-tune.def
+++ b/src/gcc/config/i386/x86-tune.def
@@ -583,6 +583,8 @@ DEF_TUNE (X86_TUNE_AVX256_AVOID_VEC_PERM,
 /* X86_TUNE_AVX256_SPLIT_REGS: if true, AVX512 ops are split into two AVX256 ops.  */
 DEF_TUNE (X86_TUNE_AVX512_SPLIT_REGS, "avx512_split_regs", m_ZNVER4)
 
+/* It's better to align MOVE_MAX with prefer_vector_width to reduce
+   risk of STLF stalls(small store followed by big load.)  */
 /* X86_TUNE_AVX256_MOVE_BY_PIECES: Optimize move_by_pieces with 256-bit
    AVX instructions.  */
 DEF_TUNE (X86_TUNE_AVX256_MOVE_BY_PIECES, "avx256_move_by_pieces",
@@ -596,14 +598,12 @@ DEF_TUNE (X86_TUNE_AVX256_STORE_BY_PIECES, "avx256_store_by_pieces",
 /* X86_TUNE_AVX512_MOVE_BY_PIECES: Optimize move_by_pieces with 512-bit
    AVX instructions.  */
 DEF_TUNE (X86_TUNE_AVX512_MOVE_BY_PIECES, "avx512_move_by_pieces",
-	  m_SAPPHIRERAPIDS | m_GRANITERAPIDS | m_GRANITERAPIDS_D
-	  | m_ZNVER4 | m_ZNVER5)
+	   m_ZNVER4 | m_ZNVER5)
 
 /* X86_TUNE_AVX512_STORE_BY_PIECES: Optimize store_by_pieces with 512-bit
    AVX instructions.  */
 DEF_TUNE (X86_TUNE_AVX512_STORE_BY_PIECES, "avx512_store_by_pieces",
-	  m_SAPPHIRERAPIDS | m_GRANITERAPIDS | m_GRANITERAPIDS_D
-	  | m_ZNVER4 | m_ZNVER5)
+	  m_ZNVER4 | m_ZNVER5)
 
 /*****************************************************************************/
 /*****************************************************************************/
--- a/src/gcc/config/i386/xmmintrin.h
+++ b/src/gcc/config/i386/xmmintrin.h
@@ -1181,17 +1181,17 @@ _mm_maskmove_si64 (__m64 __A, __m64 __N, char *__P)
   __v2di __N128 = __extension__ (__v2di) { ((__v1di) __N)[0], 0 };
 
   /* Check the alignment of __P.  */
-  __SIZE_TYPE__ offset = ((__SIZE_TYPE__) __P) & 0xf;
-  if (offset)
+  __SIZE_TYPE__ __offset = ((__SIZE_TYPE__) __P) & 0xf;
+  if (__offset)
     {
       /* If the misalignment of __P > 8, subtract __P by 8 bytes.
 	 Otherwise, subtract __P by the misalignment.  */
-      if (offset > 8)
-	offset = 8;
-      __P = (char *) (((__SIZE_TYPE__) __P) - offset);
+      if (__offset > 8)
+	__offset = 8;
+      __P = (char *) (((__SIZE_TYPE__) __P) - __offset);
 
       /* Shift __A128 and __N128 to the left by the adjustment.  */
-      switch (offset)
+      switch (__offset)
 	{
 	case 1:
 	  __A128 = __builtin_ia32_pslldqi128 (__A128, 8);
--- a/src/gcc/config/loongarch/lasx.md
+++ b/src/gcc/config/loongarch/lasx.md
@@ -983,59 +983,6 @@ (define_insn "umod<mode>3"
   [(set_attr "type" "simd_div")
    (set_attr "mode" "<MODE>")])
 
-(define_insn "xor<mode>3"
-  [(set (match_operand:LASX 0 "register_operand" "=f,f,f")
-	(xor:LASX
-	  (match_operand:LASX 1 "register_operand" "f,f,f")
-	  (match_operand:LASX 2 "reg_or_vector_same_val_operand" "f,YC,Urv8")))]
-  "ISA_HAS_LASX"
-  "@
-   xvxor.v\t%u0,%u1,%u2
-   xvbitrevi.%v0\t%u0,%u1,%V2
-   xvxori.b\t%u0,%u1,%B2"
-  [(set_attr "type" "simd_logic,simd_bit,simd_logic")
-   (set_attr "mode" "<MODE>")])
-
-(define_insn "ior<mode>3"
-  [(set (match_operand:LASX 0 "register_operand" "=f,f,f")
-	(ior:LASX
-	  (match_operand:LASX 1 "register_operand" "f,f,f")
-	  (match_operand:LASX 2 "reg_or_vector_same_val_operand" "f,YC,Urv8")))]
-  "ISA_HAS_LASX"
-  "@
-   xvor.v\t%u0,%u1,%u2
-   xvbitseti.%v0\t%u0,%u1,%V2
-   xvori.b\t%u0,%u1,%B2"
-  [(set_attr "type" "simd_logic,simd_bit,simd_logic")
-   (set_attr "mode" "<MODE>")])
-
-(define_insn "and<mode>3"
-  [(set (match_operand:LASX 0 "register_operand" "=f,f,f")
-	(and:LASX
-	  (match_operand:LASX 1 "register_operand" "f,f,f")
-	  (match_operand:LASX 2 "reg_or_vector_same_val_operand" "f,YZ,Urv8")))]
-  "ISA_HAS_LASX"
-{
-  switch (which_alternative)
-    {
-    case 0:
-      return "xvand.v\t%u0,%u1,%u2";
-    case 1:
-      {
-	rtx elt0 = CONST_VECTOR_ELT (operands[2], 0);
-	unsigned HOST_WIDE_INT val = ~UINTVAL (elt0);
-	operands[2] = loongarch_gen_const_int_vector (<MODE>mode, val & (-val));
-	return "xvbitclri.%v0\t%u0,%u1,%V2";
-      }
-    case 2:
-      return "xvandi.b\t%u0,%u1,%B2";
-    default:
-      gcc_unreachable ();
-    }
-}
-  [(set_attr "type" "simd_logic,simd_bit,simd_logic")
-   (set_attr "mode" "<MODE>")])
-
 (define_insn "one_cmpl<mode>2"
   [(set (match_operand:ILASX 0 "register_operand" "=f")
 	(not:ILASX (match_operand:ILASX 1 "register_operand" "f")))]
@@ -1148,16 +1095,6 @@ (define_insn "fma<mode>4"
   [(set_attr "type" "simd_fmadd")
    (set_attr "mode" "<MODE>")])
 
-(define_insn "fnma<mode>4"
-  [(set (match_operand:FLASX 0 "register_operand" "=f")
-	(fma:FLASX (neg:FLASX (match_operand:FLASX 1 "register_operand" "f"))
-		   (match_operand:FLASX 2 "register_operand" "f")
-		   (match_operand:FLASX 3 "register_operand" "0")))]
-  "ISA_HAS_LASX"
-  "xvfnmsub.<flasxfmt>\t%u0,%u1,%u2,%u0"
-  [(set_attr "type" "simd_fmadd")
-   (set_attr "mode" "<MODE>")])
-
 (define_expand "sqrt<mode>2"
   [(set (match_operand:FLASX 0 "register_operand")
     (sqrt:FLASX (match_operand:FLASX 1 "register_operand")))]
@@ -2337,9 +2274,9 @@ (define_insn "lasx_xvssub_u_<lasxfmt_u>"
   [(set_attr "type" "simd_int_arith")
    (set_attr "mode" "<MODE>")])
 
-(define_insn "lasx_xvshuf_<lasxfmt_f>"
+(define_insn "@lasx_xvshuf_<lasxfmt_f>"
   [(set (match_operand:LASX_DWH 0 "register_operand" "=f")
-	(unspec:LASX_DWH [(match_operand:LASX_DWH 1 "register_operand" "0")
+	(unspec:LASX_DWH [(match_operand:<VIMODE> 1 "register_operand" "0")
 			  (match_operand:LASX_DWH 2 "register_operand" "f")
 			  (match_operand:LASX_DWH 3 "register_operand" "f")]
 			UNSPEC_LASX_XVSHUF))]
@@ -2943,59 +2880,6 @@ (define_insn "lasx_xvsigncov_<lasxfmt>"
   [(set_attr "type" "simd_int_arith")
    (set_attr "mode" "<MODE>")])
 
-(define_expand "copysign<mode>3"
-  [(set (match_dup 4)
-	(and:FLASX
-	  (not:FLASX (match_dup 3))
-	  (match_operand:FLASX 1 "register_operand")))
-   (set (match_dup 5)
-	(and:FLASX (match_dup 3)
-		   (match_operand:FLASX 2 "reg_or_vector_same_val_operand")))
-   (set (match_operand:FLASX 0 "register_operand")
-	(ior:FLASX (match_dup 4) (match_dup 5)))]
-  "ISA_HAS_LASX"
-{
-  /* copysign (x, -1) should instead be expanded as setting the sign
-     bit.  */
-  if (!REG_P (operands[2]))
-    {
-      rtx op2_elt = unwrap_const_vec_duplicate (operands[2]);
-      if (GET_CODE (op2_elt) == CONST_DOUBLE
-	  && real_isneg (CONST_DOUBLE_REAL_VALUE (op2_elt)))
-	{
-	  rtx n = GEN_INT (8 * GET_MODE_SIZE (<UNITMODE>mode) - 1);
-	  operands[0] = lowpart_subreg (<VIMODE256>mode, operands[0],
-					<MODE>mode);
-	  operands[1] = lowpart_subreg (<VIMODE256>mode, operands[1],
-					<MODE>mode);
-	  emit_insn (gen_lasx_xvbitseti_<lasxfmt> (operands[0],
-						   operands[1], n));
-	  DONE;
-	}
-    }
-
-  operands[2] = force_reg (<MODE>mode, operands[2]);
-  operands[3] = loongarch_build_signbit_mask (<MODE>mode, 1, 0);
-
-  operands[4] = gen_reg_rtx (<MODE>mode);
-  operands[5] = gen_reg_rtx (<MODE>mode);
-})
-
-(define_expand "xorsign<mode>3"
-  [(set (match_dup 4)
-    (and:FLASX (match_dup 3)
-        (match_operand:FLASX 2 "register_operand")))
-   (set (match_operand:FLASX 0 "register_operand")
-    (xor:FLASX (match_dup 4)
-         (match_operand:FLASX 1 "register_operand")))]
-  "ISA_HAS_LASX"
-{
-  operands[3] = loongarch_build_signbit_mask (<MODE>mode, 1, 0);
-
-  operands[4] = gen_reg_rtx (<MODE>mode);
-})
-
-
 (define_insn "absv4df2"
   [(set (match_operand:V4DF 0 "register_operand" "=f")
 	(abs:V4DF (match_operand:V4DF 1 "register_operand" "f")))]
@@ -4598,7 +4482,7 @@ (define_insn "lasx_xvinsve0_<lasxfmt_f>_scalar"
   [(set (match_operand:FLASX 0 "register_operand" "=f")
     (vec_merge:FLASX
       (vec_duplicate:FLASX
-        (match_operand:<UNITMODE> 1 "register_operand" "f"))
+        (match_operand:<UNITMODE> 1 "reg_or_0_operand" "f"))
       (match_operand:FLASX 2 "register_operand" "0")
       (match_operand 3 "const_<bitmask256>_operand" "")))]
   "ISA_HAS_LASX"
--- a/src/gcc/config/loongarch/loongarch-builtins.cc
+++ b/src/gcc/config/loongarch/loongarch-builtins.cc
@@ -1388,10 +1388,10 @@ static const struct loongarch_builtin_description loongarch_builtins[] = {
   LSX_BUILTIN (vfrintrp_d, LARCH_V2DF_FTYPE_V2DF),
   LSX_BUILTIN (vfrintrm_s, LARCH_V4SF_FTYPE_V4SF),
   LSX_BUILTIN (vfrintrm_d, LARCH_V2DF_FTYPE_V2DF),
-  LSX_NO_TARGET_BUILTIN (vstelm_b, LARCH_VOID_FTYPE_V16QI_CVPOINTER_SI_UQI),
-  LSX_NO_TARGET_BUILTIN (vstelm_h, LARCH_VOID_FTYPE_V8HI_CVPOINTER_SI_UQI),
-  LSX_NO_TARGET_BUILTIN (vstelm_w, LARCH_VOID_FTYPE_V4SI_CVPOINTER_SI_UQI),
-  LSX_NO_TARGET_BUILTIN (vstelm_d, LARCH_VOID_FTYPE_V2DI_CVPOINTER_SI_UQI),
+  LSX_NO_TARGET_BUILTIN (vstelm_b, LARCH_VOID_FTYPE_V16QI_VPOINTER_SI_UQI),
+  LSX_NO_TARGET_BUILTIN (vstelm_h, LARCH_VOID_FTYPE_V8HI_VPOINTER_SI_UQI),
+  LSX_NO_TARGET_BUILTIN (vstelm_w, LARCH_VOID_FTYPE_V4SI_VPOINTER_SI_UQI),
+  LSX_NO_TARGET_BUILTIN (vstelm_d, LARCH_VOID_FTYPE_V2DI_VPOINTER_SI_UQI),
   LSX_BUILTIN (vaddwev_d_w, LARCH_V2DI_FTYPE_V4SI_V4SI),
   LSX_BUILTIN (vaddwev_w_h, LARCH_V4SI_FTYPE_V8HI_V8HI),
   LSX_BUILTIN (vaddwev_h_b, LARCH_V8HI_FTYPE_V16QI_V16QI),
@@ -1561,7 +1561,7 @@ static const struct loongarch_builtin_description loongarch_builtins[] = {
   LSX_BUILTIN (vssrarni_du_q, LARCH_UV2DI_FTYPE_UV2DI_V2DI_USI),
   LSX_BUILTIN (vpermi_w, LARCH_V4SI_FTYPE_V4SI_V4SI_USI),
   LSX_BUILTIN (vld, LARCH_V16QI_FTYPE_CVPOINTER_SI),
-  LSX_NO_TARGET_BUILTIN (vst, LARCH_VOID_FTYPE_V16QI_CVPOINTER_SI),
+  LSX_NO_TARGET_BUILTIN (vst, LARCH_VOID_FTYPE_V16QI_VPOINTER_SI),
   LSX_BUILTIN (vssrlrn_b_h, LARCH_V16QI_FTYPE_V8HI_V8HI),
   LSX_BUILTIN (vssrlrn_h_w, LARCH_V8HI_FTYPE_V4SI_V4SI),
   LSX_BUILTIN (vssrlrn_w_d, LARCH_V4SI_FTYPE_V2DI_V2DI),
@@ -1572,7 +1572,7 @@ static const struct loongarch_builtin_description loongarch_builtins[] = {
   LSX_BUILTIN (vldi, LARCH_V2DI_FTYPE_HI),
   LSX_BUILTIN (vshuf_b, LARCH_V16QI_FTYPE_V16QI_V16QI_V16QI),
   LSX_BUILTIN (vldx, LARCH_V16QI_FTYPE_CVPOINTER_DI),
-  LSX_NO_TARGET_BUILTIN (vstx, LARCH_VOID_FTYPE_V16QI_CVPOINTER_DI),
+  LSX_NO_TARGET_BUILTIN (vstx, LARCH_VOID_FTYPE_V16QI_VPOINTER_DI),
   LSX_BUILTIN (vextl_qu_du, LARCH_UV2DI_FTYPE_UV2DI),
 
   /* Built-in functions for LASX */
@@ -2101,11 +2101,11 @@ static const struct loongarch_builtin_description loongarch_builtins[] = {
   LASX_BUILTIN (xvfrintrm_s, LARCH_V8SF_FTYPE_V8SF),
   LASX_BUILTIN (xvfrintrm_d, LARCH_V4DF_FTYPE_V4DF),
   LASX_BUILTIN (xvld, LARCH_V32QI_FTYPE_CVPOINTER_SI),
-  LASX_NO_TARGET_BUILTIN (xvst, LARCH_VOID_FTYPE_V32QI_CVPOINTER_SI),
-  LASX_NO_TARGET_BUILTIN (xvstelm_b, LARCH_VOID_FTYPE_V32QI_CVPOINTER_SI_UQI),
-  LASX_NO_TARGET_BUILTIN (xvstelm_h, LARCH_VOID_FTYPE_V16HI_CVPOINTER_SI_UQI),
-  LASX_NO_TARGET_BUILTIN (xvstelm_w, LARCH_VOID_FTYPE_V8SI_CVPOINTER_SI_UQI),
-  LASX_NO_TARGET_BUILTIN (xvstelm_d, LARCH_VOID_FTYPE_V4DI_CVPOINTER_SI_UQI),
+  LASX_NO_TARGET_BUILTIN (xvst, LARCH_VOID_FTYPE_V32QI_VPOINTER_SI),
+  LASX_NO_TARGET_BUILTIN (xvstelm_b, LARCH_VOID_FTYPE_V32QI_VPOINTER_SI_UQI),
+  LASX_NO_TARGET_BUILTIN (xvstelm_h, LARCH_VOID_FTYPE_V16HI_VPOINTER_SI_UQI),
+  LASX_NO_TARGET_BUILTIN (xvstelm_w, LARCH_VOID_FTYPE_V8SI_VPOINTER_SI_UQI),
+  LASX_NO_TARGET_BUILTIN (xvstelm_d, LARCH_VOID_FTYPE_V4DI_VPOINTER_SI_UQI),
   LASX_BUILTIN (xvinsve0_w, LARCH_V8SI_FTYPE_V8SI_V8SI_UQI),
   LASX_BUILTIN (xvinsve0_d, LARCH_V4DI_FTYPE_V4DI_V4DI_UQI),
   LASX_BUILTIN (xvpickve_w, LARCH_V8SI_FTYPE_V8SI_UQI),
@@ -2121,7 +2121,7 @@ static const struct loongarch_builtin_description loongarch_builtins[] = {
   LASX_BUILTIN (xvorn_v, LARCH_UV32QI_FTYPE_UV32QI_UV32QI),
   LASX_BUILTIN (xvldi, LARCH_V4DI_FTYPE_HI),
   LASX_BUILTIN (xvldx, LARCH_V32QI_FTYPE_CVPOINTER_DI),
-  LASX_NO_TARGET_BUILTIN (xvstx, LARCH_VOID_FTYPE_V32QI_CVPOINTER_DI),
+  LASX_NO_TARGET_BUILTIN (xvstx, LARCH_VOID_FTYPE_V32QI_VPOINTER_DI),
   LASX_BUILTIN (xvextl_qu_du, LARCH_UV4DI_FTYPE_UV4DI),
 
   /* LASX */
@@ -2371,11 +2371,25 @@ loongarch_build_cvpointer_type (void)
   return cache;
 }
 
+/* Return a type for 'volatile void *'.  */
+
+static tree
+loongarch_build_vpointer_type (void)
+{
+  static tree cache;
+
+  if (cache == NULL_TREE)
+    cache = build_pointer_type (build_qualified_type (void_type_node,
+						      TYPE_QUAL_VOLATILE));
+  return cache;
+}
+
 /* Source-level argument types.  */
 #define LARCH_ATYPE_VOID void_type_node
 #define LARCH_ATYPE_INT integer_type_node
 #define LARCH_ATYPE_POINTER ptr_type_node
 #define LARCH_ATYPE_CVPOINTER loongarch_build_cvpointer_type ()
+#define LARCH_ATYPE_VPOINTER loongarch_build_vpointer_type ()
 #define LARCH_ATYPE_BOOLEAN boolean_type_node
 /* Standard mode-based argument types.  */
 #define LARCH_ATYPE_QI intQI_type_node
--- a/src/gcc/config/loongarch/loongarch-def.h
+++ b/src/gcc/config/loongarch/loongarch-def.h
@@ -78,12 +78,10 @@ extern loongarch_def_array<const char *, N_ISA_EXT_TYPES>
 
 
 /* Base ABI */
-enum {
-  ABI_BASE_LP64D	= 0,
-  ABI_BASE_LP64F	= 1,
-  ABI_BASE_LP64S	= 2,
-  N_ABI_BASE_TYPES	= 3
-};
+#define ABI_BASE_LP64D	  0
+#define ABI_BASE_LP64F	  1
+#define ABI_BASE_LP64S	  2
+#define N_ABI_BASE_TYPES  3
 
 extern loongarch_def_array<const char *, N_ABI_BASE_TYPES>
   loongarch_abi_base_strings;
--- a/src/gcc/config/loongarch/loongarch-ftypes.def
+++ b/src/gcc/config/loongarch/loongarch-ftypes.def
@@ -492,27 +492,20 @@ DEF_LARCH_FTYPE (2, (V8QI, V4HI, V4HI))
 DEF_LARCH_FTYPE (1, (V8QI, V8QI))
 DEF_LARCH_FTYPE (2, (V8QI, V8QI, V8QI))
 
-DEF_LARCH_FTYPE (2, (VOID, SI, CVPOINTER))
 DEF_LARCH_FTYPE (2, (VOID, SI, SI))
 DEF_LARCH_FTYPE (2, (VOID, UQI, SI))
 DEF_LARCH_FTYPE (2, (VOID, USI, UQI))
 DEF_LARCH_FTYPE (1, (VOID, UHI))
-DEF_LARCH_FTYPE (3, (VOID, V16QI, CVPOINTER, SI))
-DEF_LARCH_FTYPE (3, (VOID, V16QI, CVPOINTER, DI))
-DEF_LARCH_FTYPE (3, (VOID, V32QI, CVPOINTER, SI))
-DEF_LARCH_FTYPE (3, (VOID, V32QI, CVPOINTER, DI))
+DEF_LARCH_FTYPE (3, (VOID, V16QI, VPOINTER, SI))
+DEF_LARCH_FTYPE (3, (VOID, V16QI, VPOINTER, DI))
+DEF_LARCH_FTYPE (3, (VOID, V32QI, VPOINTER, SI))
+DEF_LARCH_FTYPE (3, (VOID, V32QI, VPOINTER, DI))
 DEF_LARCH_FTYPE (3, (VOID, V4DF, POINTER, SI))
 DEF_LARCH_FTYPE (3, (VOID, V2DF, POINTER, SI))
-DEF_LARCH_FTYPE (3, (VOID, V2DI, CVPOINTER, SI))
-DEF_LARCH_FTYPE (3, (VOID, V4DI, CVPOINTER, SI))
 DEF_LARCH_FTYPE (2, (VOID, V2HI, V2HI))
 DEF_LARCH_FTYPE (2, (VOID, V4QI, V4QI))
 DEF_LARCH_FTYPE (3, (VOID, V4SF, POINTER, SI))
 DEF_LARCH_FTYPE (3, (VOID, V8SF, POINTER, SI))
-DEF_LARCH_FTYPE (3, (VOID, V4SI, CVPOINTER, SI))
-DEF_LARCH_FTYPE (3, (VOID, V8SI, CVPOINTER, SI))
-DEF_LARCH_FTYPE (3, (VOID, V8HI, CVPOINTER, SI))
-DEF_LARCH_FTYPE (3, (VOID, V16HI, CVPOINTER, SI))
 
 DEF_LARCH_FTYPE (1, (V16HI, V32QI))
 DEF_LARCH_FTYPE (1, (UV16HI, UV32QI))
@@ -607,19 +600,10 @@ DEF_LARCH_FTYPE (2, (V4DI, UQI, USI))
 DEF_LARCH_FTYPE (2, (V2DI, UQI, USI))
 DEF_LARCH_FTYPE (2, (V4DI, UQI, UQI))
 DEF_LARCH_FTYPE (2, (V2DI, UQI, UQI))
-DEF_LARCH_FTYPE (4, (VOID, SI, UQI, V16QI, CVPOINTER))
-DEF_LARCH_FTYPE (4, (VOID, SI, UQI, V8HI, CVPOINTER))
-DEF_LARCH_FTYPE (4, (VOID, SI, UQI, V4SI, CVPOINTER))
-DEF_LARCH_FTYPE (4, (VOID, SI, UQI, V2DI, CVPOINTER))
 DEF_LARCH_FTYPE (2, (V16QI, SI, CVPOINTER))
 DEF_LARCH_FTYPE (2, (V8HI, SI, CVPOINTER))
 DEF_LARCH_FTYPE (2, (V4SI, SI, CVPOINTER))
 DEF_LARCH_FTYPE (2, (V2DI, SI, CVPOINTER))
-DEF_LARCH_FTYPE (4, (VOID, V32QI, UQI, SI,  CVPOINTER))
-DEF_LARCH_FTYPE (4, (VOID, V16HI, UQI, SI, CVPOINTER))
-DEF_LARCH_FTYPE (4, (VOID, V8SI, UQI, SI, CVPOINTER))
-DEF_LARCH_FTYPE (4, (VOID, V4DI, UQI, SI, CVPOINTER))
-DEF_LARCH_FTYPE (3, (VOID, V32QI, SI,  CVPOINTER))
 DEF_LARCH_FTYPE (2, (V32QI, SI, CVPOINTER))
 DEF_LARCH_FTYPE (2, (V16HI, SI, CVPOINTER))
 DEF_LARCH_FTYPE (2, (V8SI, SI, CVPOINTER))
@@ -682,10 +666,10 @@ DEF_LARCH_FTYPE(3,(V4DI,V4DI,UV16HI,V16HI))
 DEF_LARCH_FTYPE(2,(UV8SI,UV32QI,UV32QI))
 DEF_LARCH_FTYPE(2,(V8SI,UV32QI,V32QI))
 
-DEF_LARCH_FTYPE(4,(VOID,V16QI,CVPOINTER,SI,UQI))
-DEF_LARCH_FTYPE(4,(VOID,V8HI,CVPOINTER,SI,UQI))
-DEF_LARCH_FTYPE(4,(VOID,V4SI,CVPOINTER,SI,UQI))
-DEF_LARCH_FTYPE(4,(VOID,V2DI,CVPOINTER,SI,UQI))
+DEF_LARCH_FTYPE(4,(VOID,V16QI,VPOINTER,SI,UQI))
+DEF_LARCH_FTYPE(4,(VOID,V8HI,VPOINTER,SI,UQI))
+DEF_LARCH_FTYPE(4,(VOID,V4SI,VPOINTER,SI,UQI))
+DEF_LARCH_FTYPE(4,(VOID,V2DI,VPOINTER,SI,UQI))
 
 DEF_LARCH_FTYPE (2, (DI, V16QI, UQI))
 DEF_LARCH_FTYPE (2, (DI, V8HI, UQI))
@@ -707,10 +691,10 @@ DEF_LARCH_FTYPE (3, (UV16HI, UV16HI, V16HI, USI))
 DEF_LARCH_FTYPE (3, (UV8SI, UV8SI, V8SI, USI))
 DEF_LARCH_FTYPE (3, (UV4DI, UV4DI, V4DI, USI))
 
-DEF_LARCH_FTYPE(4,(VOID,V32QI,CVPOINTER,SI,UQI))
-DEF_LARCH_FTYPE(4,(VOID,V16HI,CVPOINTER,SI,UQI))
-DEF_LARCH_FTYPE(4,(VOID,V8SI,CVPOINTER,SI,UQI))
-DEF_LARCH_FTYPE(4,(VOID,V4DI,CVPOINTER,SI,UQI))
+DEF_LARCH_FTYPE(4,(VOID,V32QI,VPOINTER,SI,UQI))
+DEF_LARCH_FTYPE(4,(VOID,V16HI,VPOINTER,SI,UQI))
+DEF_LARCH_FTYPE(4,(VOID,V8SI,VPOINTER,SI,UQI))
+DEF_LARCH_FTYPE(4,(VOID,V4DI,VPOINTER,SI,UQI))
 
 DEF_LARCH_FTYPE (1, (BOOLEAN,V16QI))
 DEF_LARCH_FTYPE(2,(V16QI,CVPOINTER,CVPOINTER))
--- a/src/gcc/config/loongarch/loongarch.cc
+++ b/src/gcc/config/loongarch/loongarch.cc
@@ -1718,14 +1718,15 @@ loongarch_symbol_binds_local_p (const_rtx x)
 bool
 loongarch_const_vector_bitimm_set_p (rtx op, machine_mode mode)
 {
-  if (GET_CODE (op) == CONST_VECTOR && op != CONST0_RTX (mode))
+  if (GET_CODE (op) == CONST_VECTOR
+      && (GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT
+	  || GET_MODE_CLASS (mode) == MODE_VECTOR_INT))
     {
       unsigned HOST_WIDE_INT val = UINTVAL (CONST_VECTOR_ELT (op, 0));
       int vlog2 = exact_log2 (val & GET_MODE_MASK (GET_MODE_INNER (mode)));
 
       if (vlog2 != -1)
 	{
-	  gcc_assert (GET_MODE_CLASS (mode) == MODE_VECTOR_INT);
 	  gcc_assert (vlog2 >= 0 && vlog2 <= GET_MODE_UNIT_BITSIZE (mode) - 1);
 	  return loongarch_const_vector_same_val_p (op, mode);
 	}
@@ -1740,14 +1741,35 @@ loongarch_const_vector_bitimm_set_p (rtx op, machine_mode mode)
 bool
 loongarch_const_vector_bitimm_clr_p (rtx op, machine_mode mode)
 {
-  if (GET_CODE (op) == CONST_VECTOR && op != CONSTM1_RTX (mode))
+  if (GET_CODE (op) == CONST_VECTOR
+      && (GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT
+	  || GET_MODE_CLASS (mode) == MODE_VECTOR_INT))
     {
-      unsigned HOST_WIDE_INT val = ~UINTVAL (CONST_VECTOR_ELT (op, 0));
+      unsigned HOST_WIDE_INT val;
+      if (GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT)
+	{
+	  rtx val_s = CONST_VECTOR_ELT (op, 0);
+	  const REAL_VALUE_TYPE *x = CONST_DOUBLE_REAL_VALUE (val_s);
+	  if (GET_MODE (val_s) == DFmode)
+	    {
+	      long tmp[2];
+	      REAL_VALUE_TO_TARGET_DOUBLE (*x, tmp);
+	      val = ~((unsigned HOST_WIDE_INT) tmp[1] << 32 | tmp[0]);
+	    }
+	  else
+	    {
+	      long tmp;
+	      REAL_VALUE_TO_TARGET_SINGLE (*x, tmp);
+	      val = ~((unsigned HOST_WIDE_INT) tmp);
+	    }
+	}
+      else
+	val = ~UINTVAL (CONST_VECTOR_ELT (op, 0));
+
       int vlog2 = exact_log2 (val & GET_MODE_MASK (GET_MODE_INNER (mode)));
 
       if (vlog2 != -1)
 	{
-	  gcc_assert (GET_MODE_CLASS (mode) == MODE_VECTOR_INT);
 	  gcc_assert (vlog2 >= 0 && vlog2 <= GET_MODE_UNIT_BITSIZE (mode) - 1);
 	  return loongarch_const_vector_same_val_p (op, mode);
 	}
@@ -4280,6 +4302,7 @@ loongarch_vector_costs::add_stmt_cost (int count, vect_cost_for_stmt kind,
 	    break;
 	  }
       else if (TARGET_RECIP_VEC_DIV
+	       && vectype
 	       && gimple_code (stmt_info->stmt) == GIMPLE_ASSIGN)
 	{
 	  machine_mode mode = TYPE_MODE (vectype);
@@ -6259,15 +6282,19 @@ loongarch_print_operand (FILE *file, rtx op, int letter)
       if (CONST_VECTOR_P (op))
 	{
 	  machine_mode mode = GET_MODE_INNER (GET_MODE (op));
-	  unsigned HOST_WIDE_INT val = UINTVAL (CONST_VECTOR_ELT (op, 0));
-	  int vlog2 = exact_log2 (val & GET_MODE_MASK (mode));
-	  if (vlog2 != -1)
-	    fprintf (file, "%d", vlog2);
-	  else
-	    output_operand_lossage ("invalid use of '%%%c'", letter);
+	  rtx val_s = CONST_VECTOR_ELT (op, 0);
+	  if (CONST_INT_P (val_s))
+	    {
+	      unsigned HOST_WIDE_INT val = UINTVAL (val_s);
+	      int vlog2 = exact_log2 (val & GET_MODE_MASK (mode));
+	      if (vlog2 != -1)
+		{
+		  fprintf (file, "%d", vlog2);
+		  break;
+		}
+	    }
 	}
-      else
-	output_operand_lossage ("invalid use of '%%%c'", letter);
+      output_operand_lossage ("invalid use of '%%%c'", letter);
       break;
 
     case 'W':
@@ -8199,7 +8226,7 @@ static bool
 loongarch_try_expand_lsx_vshuf_const (struct expand_vec_perm_d *d)
 {
   int i;
-  rtx target, op0, op1, sel, tmp;
+  rtx target, op0, op1;
   rtx rperm[MAX_VECT_LEN];
 
   if (GET_MODE_SIZE (d->vmode) == 16)
@@ -8218,47 +8245,23 @@ loongarch_try_expand_lsx_vshuf_const (struct expand_vec_perm_d *d)
       for (i = 0; i < d->nelt; i += 1)
 	  rperm[i] = GEN_INT (d->perm[i]);
 
-      if (d->vmode == E_V2DFmode)
-	{
-	  sel = gen_rtx_CONST_VECTOR (E_V2DImode, gen_rtvec_v (d->nelt, rperm));
-	  tmp = simplify_gen_subreg (E_V2DImode, d->target, d->vmode, 0);
-	  emit_move_insn (tmp, sel);
-	}
-      else if (d->vmode == E_V4SFmode)
-	{
-	  sel = gen_rtx_CONST_VECTOR (E_V4SImode, gen_rtvec_v (d->nelt, rperm));
-	  tmp = simplify_gen_subreg (E_V4SImode, d->target, d->vmode, 0);
-	  emit_move_insn (tmp, sel);
-	}
+      machine_mode sel_mode = related_int_vector_mode (d->vmode)
+	.require ();
+      rtvec sel_v = gen_rtvec_v (d->nelt, rperm);
+
+      /* Despite vshuf.* (except vshuf.b) needs sel == target, we cannot
+	 load sel into target right now: here we are dealing with
+	 pseudo regs, and target may be the same pseudo as one of op0
+	 or op1.  Then we'd clobber the input.  Instead, we use a new
+	 pseudo reg here.  The reload pass will look at the constraint
+	 of vshuf.* and move sel into target first if needed.  */
+      rtx sel = force_reg (sel_mode,
+			   gen_rtx_CONST_VECTOR (sel_mode, sel_v));
+
+      if (d->vmode == E_V16QImode)
+	emit_insn (gen_lsx_vshuf_b (target, op1, op0, sel));
       else
-	{
-	  sel = gen_rtx_CONST_VECTOR (d->vmode, gen_rtvec_v (d->nelt, rperm));
-	  emit_move_insn (d->target, sel);
-	}
-
-      switch (d->vmode)
-	{
-	case E_V2DFmode:
-	  emit_insn (gen_lsx_vshuf_d_f (target, target, op1, op0));
-	  break;
-	case E_V2DImode:
-	  emit_insn (gen_lsx_vshuf_d (target, target, op1, op0));
-	  break;
-	case E_V4SFmode:
-	  emit_insn (gen_lsx_vshuf_w_f (target, target, op1, op0));
-	  break;
-	case E_V4SImode:
-	  emit_insn (gen_lsx_vshuf_w (target, target, op1, op0));
-	  break;
-	case E_V8HImode:
-	  emit_insn (gen_lsx_vshuf_h (target, target, op1, op0));
-	  break;
-	case E_V16QImode:
-	  emit_insn (gen_lsx_vshuf_b (target, op1, op0, target));
-	  break;
-	default:
-	  break;
-	}
+	emit_insn (gen_lsx_vshuf (d->vmode, target, sel, op1, op0));
 
       return true;
     }
@@ -8724,57 +8727,13 @@ loongarch_expand_vec_perm_1 (rtx operands[])
   /* Number of elements in the vector.  */
   w = GET_MODE_NUNITS (mode);
 
-  rtx round_data[MAX_VECT_LEN];
-  rtx round_reg, round_data_rtx;
-
-  if (mode != E_V32QImode)
+  /* If we are using xvshuf.*, clamp the selector to avoid unpredictable
+     output.  */
+  if (maskmode != V8SImode && maskmode != V4DImode)
     {
-      for (int i = 0; i < w; i += 1)
-	{
-	  round_data[i] = GEN_INT (0x1f);
-	}
-
-      if (mode == E_V4DFmode)
-	{
-	  round_data_rtx = gen_rtx_CONST_VECTOR (E_V4DImode,
-						 gen_rtvec_v (w, round_data));
-	  round_reg = gen_reg_rtx (E_V4DImode);
-	}
-      else if (mode == E_V8SFmode)
-	{
-
-	  round_data_rtx = gen_rtx_CONST_VECTOR (E_V8SImode,
-						 gen_rtvec_v (w, round_data));
-	  round_reg = gen_reg_rtx (E_V8SImode);
-	}
-      else
-	{
-	  round_data_rtx = gen_rtx_CONST_VECTOR (mode,
-						 gen_rtvec_v (w, round_data));
-	  round_reg = gen_reg_rtx (mode);
-	}
-
-      emit_move_insn (round_reg, round_data_rtx);
-      switch (mode)
-	{
-	case E_V32QImode:
-	  emit_insn (gen_andv32qi3 (mask, mask, round_reg));
-	  break;
-	case E_V16HImode:
-	  emit_insn (gen_andv16hi3 (mask, mask, round_reg));
-	  break;
-	case E_V8SImode:
-	case E_V8SFmode:
-	  emit_insn (gen_andv8si3 (mask, mask, round_reg));
-	  break;
-	case E_V4DImode:
-	case E_V4DFmode:
-	  emit_insn (gen_andv4di3 (mask, mask, round_reg));
-	  break;
-	default:
-	  gcc_unreachable ();
-	  break;
-	}
+      rtx t = gen_const_vec_duplicate (maskmode, GEN_INT (0x1f));
+      mask = expand_binop (maskmode, and_optab, mask, t, NULL_RTX, false,
+			   OPTAB_DIRECT);
     }
 
   if (mode == V4DImode || mode == V4DFmode)
@@ -9254,7 +9213,7 @@ loongarch_expand_vec_perm_const (struct expand_vec_perm_d *d)
   bool flag = false;
   unsigned int i;
   unsigned char idx;
-  rtx target, op0, op1, sel, tmp;
+  rtx target, op0, op1;
   rtx rperm[MAX_VECT_LEN];
   unsigned int remapped[MAX_VECT_LEN];
   unsigned char perm2[MAX_VECT_LEN];
@@ -9434,63 +9393,23 @@ loongarch_expand_vec_perm_const (struct expand_vec_perm_d *d)
 expand_perm_const_end:
       if (flag)
 	{
-	  /* Copy selector vector from memory to vector register for later insn
-	     gen function.
-	     If vector's element in floating point value, we cannot fit
-	     selector argument into insn gen function directly, because of the
-	     insn template definition.  As a solution, generate a integral mode
-	     subreg of target, then copy selector vector (that is in integral
-	     mode) to this subreg.  */
-	  switch (d->vmode)
-	    {
-	    case E_V4DFmode:
-	      sel = gen_rtx_CONST_VECTOR (E_V4DImode, gen_rtvec_v (d->nelt,
-								   rperm));
-	      tmp = simplify_gen_subreg (E_V4DImode, d->target, d->vmode, 0);
-	      emit_move_insn (tmp, sel);
-	      break;
-	    case E_V8SFmode:
-	      sel = gen_rtx_CONST_VECTOR (E_V8SImode, gen_rtvec_v (d->nelt,
-								   rperm));
-	      tmp = simplify_gen_subreg (E_V8SImode, d->target, d->vmode, 0);
-	      emit_move_insn (tmp, sel);
-	      break;
-	    default:
-	      sel = gen_rtx_CONST_VECTOR (d->vmode, gen_rtvec_v (d->nelt,
-								 rperm));
-	      emit_move_insn (d->target, sel);
-	      break;
-	    }
-
 	  target = d->target;
 	  op0 = d->op0;
 	  op1 = d->one_vector_p ? d->op0 : d->op1;
 
-	  /* We FINALLY can generate xvshuf.* insn.  */
-	  switch (d->vmode)
-	    {
-	    case E_V4DFmode:
-	      emit_insn (gen_lasx_xvshuf_d_f (target, target, op1, op0));
-	      break;
-	    case E_V4DImode:
-	      emit_insn (gen_lasx_xvshuf_d (target, target, op1, op0));
-	      break;
-	    case E_V8SFmode:
-	      emit_insn (gen_lasx_xvshuf_w_f (target, target, op1, op0));
-	      break;
-	    case E_V8SImode:
-	      emit_insn (gen_lasx_xvshuf_w (target, target, op1, op0));
-	      break;
-	    case E_V16HImode:
-	      emit_insn (gen_lasx_xvshuf_h (target, target, op1, op0));
-	      break;
-	    case E_V32QImode:
-	      emit_insn (gen_lasx_xvshuf_b (target, op1, op0, target));
-	      break;
-	    default:
-	      gcc_unreachable ();
-	      break;
-	    }
+	  machine_mode sel_mode = related_int_vector_mode (d->vmode)
+	    .require ();
+	  rtvec sel_v = gen_rtvec_v (d->nelt, rperm);
+
+	  /* See the comment in loongarch_expand_lsx_shuffle for why
+	     we don't simply use a SUBREG to pun target.  */
+	  rtx sel = force_reg (sel_mode,
+			       gen_rtx_CONST_VECTOR (sel_mode, sel_v));
+
+	  if (d->vmode == E_V32QImode)
+	    emit_insn (gen_lasx_xvshuf_b (target, op1, op0, sel));
+	  else
+	    emit_insn (gen_lasx_xvshuf (d->vmode, target, sel, op1, op0));
 
 	  return true;
 	}
@@ -10044,32 +9963,7 @@ loongarch_expand_vector_init_same (rtx target, rtx vals, unsigned nvar)
 	}
     }
 
-  if (imode == GET_MODE (same))
-    temp = same;
-  else if (GET_MODE_SIZE (imode) >= UNITS_PER_WORD)
-    {
-      if (GET_CODE (same) == MEM)
-	{
-	  rtx reg_tmp = gen_reg_rtx (GET_MODE (same));
-	  loongarch_emit_move (reg_tmp, same);
-	  temp = simplify_gen_subreg (imode, reg_tmp, GET_MODE (reg_tmp), 0);
-	}
-      else
-	temp = simplify_gen_subreg (imode, same, GET_MODE (same), 0);
-    }
-  else
-    {
-      if (GET_CODE (same) == MEM)
-	{
-	  rtx reg_tmp = gen_reg_rtx (GET_MODE (same));
-	  loongarch_emit_move (reg_tmp, same);
-	  temp = lowpart_subreg (imode, reg_tmp, GET_MODE (reg_tmp));
-	}
-      else
-	temp = lowpart_subreg (imode, same, GET_MODE (same));
-    }
-
-  temp = force_reg (imode, temp);
+  temp = force_reg (imode, same);
 
   switch (vmode)
     {
@@ -10806,7 +10700,7 @@ loongarch_build_signbit_mask (machine_mode mode, bool vect, bool invert)
     return force_reg (inner_mode, mask);
 
   v = loongarch_build_const_vector (vec_mode, vect, mask);
-  return force_reg (vec_mode, v);
+  return v;
 }
 
 /* Use rsqrte instruction and Newton-Rhapson to compute the approximation of
@@ -10855,10 +10749,11 @@ void loongarch_emit_swrsqrtsf (rtx res, rtx a, machine_mode mode, bool recip)
       if (VECTOR_MODE_P (mode))
 	{
 	  machine_mode imode = related_int_vector_mode (mode).require ();
-	  rtx mask = gen_reg_rtx (imode);
-	  emit_insn (gen_rtx_SET (mask, gen_rtx_NE (imode, a, zero)));
-	  emit_insn (gen_rtx_SET (x0, gen_rtx_AND (mode, x0,
-						   gen_lowpart (mode, mask))));
+	  rtx mask = force_reg (imode, gen_rtx_NE (imode, a, zero));
+	  emit_move_insn (gen_lowpart (imode, x0),
+			  gen_rtx_AND (imode,
+				       gen_lowpart (imode, x0),
+				       mask));
 	}
       else
 	{
@@ -11014,6 +10909,18 @@ loongarch_c_mode_for_suffix (char suffix)
   return VOIDmode;
 }
 
+/* Implement TARGET_COMPUTE_PRESSURE_CLASSES.  */
+
+static int
+loongarch_compute_pressure_classes (reg_class *classes)
+{
+  int i = 0;
+  classes[i++] = GENERAL_REGS;
+  classes[i++] = FP_REGS;
+  classes[i++] = FCC_REGS;
+  return i;
+}
+
 /* Initialize the GCC target structure.  */
 #undef TARGET_ASM_ALIGNED_HI_OP
 #define TARGET_ASM_ALIGNED_HI_OP "\t.half\t"
@@ -11276,6 +11183,9 @@ loongarch_c_mode_for_suffix (char suffix)
 #undef TARGET_C_MODE_FOR_SUFFIX
 #define TARGET_C_MODE_FOR_SUFFIX loongarch_c_mode_for_suffix
 
+#undef TARGET_COMPUTE_PRESSURE_CLASSES
+#define TARGET_COMPUTE_PRESSURE_CLASSES loongarch_compute_pressure_classes
+
 struct gcc_target targetm = TARGET_INITIALIZER;
 
 #include "gt-loongarch.h"
--- a/src/gcc/config/loongarch/loongarch.md
+++ b/src/gcc/config/loongarch/loongarch.md
@@ -2205,7 +2205,7 @@ (define_insn_and_split "movdi_symbolic_off64"
   (unspec:DI [(const_int 0)]
     UNSPEC_LOAD_SYMBOL_OFFSET64)
   (clobber (match_operand:DI 2 "register_operand" "=&r,r"))]
- "TARGET_64BIT && TARGET_CMODEL_EXTREME"
+ "TARGET_64BIT"
 {
   if (which_alternative == 1)
     return "#";
--- a/src/gcc/config/loongarch/lsx.md
+++ b/src/gcc/config/loongarch/lsx.md
@@ -689,9 +689,9 @@ (define_expand "vec_perm<mode>"
   DONE;
 })
 
-(define_insn "lsx_vshuf_<lsxfmt_f>"
+(define_insn "@lsx_vshuf_<lsxfmt_f>"
   [(set (match_operand:LSX_DWH 0 "register_operand" "=f")
-	(unspec:LSX_DWH [(match_operand:LSX_DWH 1 "register_operand" "0")
+	(unspec:LSX_DWH [(match_operand:<VIMODE> 1 "register_operand" "0")
 			 (match_operand:LSX_DWH 2 "register_operand" "f")
 			 (match_operand:LSX_DWH 3 "register_operand" "f")]
 			UNSPEC_LSX_VSHUF))]
@@ -844,59 +844,6 @@ (define_insn "umod<mode>3"
   [(set_attr "type" "simd_div")
    (set_attr "mode" "<MODE>")])
 
-(define_insn "xor<mode>3"
-  [(set (match_operand:LSX 0 "register_operand" "=f,f,f")
-	(xor:LSX
-	  (match_operand:LSX 1 "register_operand" "f,f,f")
-	  (match_operand:LSX 2 "reg_or_vector_same_val_operand" "f,YC,Urv8")))]
-  "ISA_HAS_LSX"
-  "@
-   vxor.v\t%w0,%w1,%w2
-   vbitrevi.%v0\t%w0,%w1,%V2
-   vxori.b\t%w0,%w1,%B2"
-  [(set_attr "type" "simd_logic,simd_bit,simd_logic")
-   (set_attr "mode" "<MODE>")])
-
-(define_insn "ior<mode>3"
-  [(set (match_operand:LSX 0 "register_operand" "=f,f,f")
-	(ior:LSX
-	  (match_operand:LSX 1 "register_operand" "f,f,f")
-	  (match_operand:LSX 2 "reg_or_vector_same_val_operand" "f,YC,Urv8")))]
-  "ISA_HAS_LSX"
-  "@
-   vor.v\t%w0,%w1,%w2
-   vbitseti.%v0\t%w0,%w1,%V2
-   vori.b\t%w0,%w1,%B2"
-  [(set_attr "type" "simd_logic,simd_bit,simd_logic")
-   (set_attr "mode" "<MODE>")])
-
-(define_insn "and<mode>3"
-  [(set (match_operand:LSX 0 "register_operand" "=f,f,f")
-	(and:LSX
-	  (match_operand:LSX 1 "register_operand" "f,f,f")
-	  (match_operand:LSX 2 "reg_or_vector_same_val_operand" "f,YZ,Urv8")))]
-  "ISA_HAS_LSX"
-{
-  switch (which_alternative)
-    {
-    case 0:
-      return "vand.v\t%w0,%w1,%w2";
-    case 1:
-      {
-	rtx elt0 = CONST_VECTOR_ELT (operands[2], 0);
-	unsigned HOST_WIDE_INT val = ~UINTVAL (elt0);
-	operands[2] = loongarch_gen_const_int_vector (<MODE>mode, val & (-val));
-	return "vbitclri.%v0\t%w0,%w1,%V2";
-      }
-    case 2:
-      return "vandi.b\t%w0,%w1,%B2";
-    default:
-      gcc_unreachable ();
-    }
-}
-  [(set_attr "type" "simd_logic,simd_bit,simd_logic")
-   (set_attr "mode" "<MODE>")])
-
 (define_insn "one_cmpl<mode>2"
   [(set (match_operand:ILSX 0 "register_operand" "=f")
 	(not:ILSX (match_operand:ILSX 1 "register_operand" "f")))]
@@ -1006,16 +953,6 @@ (define_insn "fma<mode>4"
   [(set_attr "type" "simd_fmadd")
    (set_attr "mode" "<MODE>")])
 
-(define_insn "fnma<mode>4"
-  [(set (match_operand:FLSX 0 "register_operand" "=f")
-	(fma:FLSX (neg:FLSX (match_operand:FLSX 1 "register_operand" "f"))
-		  (match_operand:FLSX 2 "register_operand" "f")
-		  (match_operand:FLSX 3 "register_operand" "0")))]
-  "ISA_HAS_LSX"
-  "vfnmsub.<flsxfmt>\t%w0,%w1,%w2,%w0"
-  [(set_attr "type" "simd_fmadd")
-   (set_attr "mode" "<MODE>")])
-
 (define_expand "sqrt<mode>2"
   [(set (match_operand:FLSX 0 "register_operand")
     (sqrt:FLSX (match_operand:FLSX 1 "register_operand")))]
@@ -2621,59 +2558,6 @@ (define_insn "lsx_vsigncov_<lsxfmt>"
   [(set_attr "type" "simd_int_arith")
    (set_attr "mode" "<MODE>")])
 
-(define_expand "copysign<mode>3"
-  [(set (match_dup 4)
-	(and:FLSX
-	  (not:FLSX (match_dup 3))
-	  (match_operand:FLSX 1 "register_operand")))
-   (set (match_dup 5)
-	(and:FLSX (match_dup 3)
-		  (match_operand:FLSX 2 "reg_or_vector_same_val_operand")))
-   (set (match_operand:FLSX 0 "register_operand")
-	(ior:FLSX (match_dup 4) (match_dup 5)))]
-  "ISA_HAS_LSX"
-{
-  /* copysign (x, -1) should instead be expanded as setting the sign
-     bit.  */
-  if (!REG_P (operands[2]))
-    {
-      rtx op2_elt = unwrap_const_vec_duplicate (operands[2]);
-      if (GET_CODE (op2_elt) == CONST_DOUBLE
-	  && real_isneg (CONST_DOUBLE_REAL_VALUE (op2_elt)))
-	{
-	  rtx n = GEN_INT (8 * GET_MODE_SIZE (<UNITMODE>mode) - 1);
-	  operands[0] = lowpart_subreg (<VIMODE>mode, operands[0],
-					<MODE>mode);
-	  operands[1] = lowpart_subreg (<VIMODE>mode, operands[1],
-					<MODE>mode);
-	  emit_insn (gen_lsx_vbitseti_<lsxfmt> (operands[0], operands[1],
-						n));
-	  DONE;
-	}
-    }
-
-  operands[2] = force_reg (<MODE>mode, operands[2]);
-  operands[3] = loongarch_build_signbit_mask (<MODE>mode, 1, 0);
-
-  operands[4] = gen_reg_rtx (<MODE>mode);
-  operands[5] = gen_reg_rtx (<MODE>mode);
-})
-
-(define_expand "@xorsign<mode>3"
-  [(set (match_dup 4)
-    (and:FLSX (match_dup 3)
-        (match_operand:FLSX 2 "register_operand")))
-   (set (match_operand:FLSX 0 "register_operand")
-    (xor:FLSX (match_dup 4)
-         (match_operand:FLSX 1 "register_operand")))]
-  "ISA_HAS_LSX"
-{
-  operands[3] = loongarch_build_signbit_mask (<MODE>mode, 1, 0);
-
-  operands[4] = gen_reg_rtx (<MODE>mode);
-})
-
-
 (define_insn "absv2df2"
   [(set (match_operand:V2DF 0 "register_operand" "=f")
 	(abs:V2DF (match_operand:V2DF 1 "register_operand" "f")))]
--- a/src/gcc/config/loongarch/predicates.md
+++ b/src/gcc/config/loongarch/predicates.md
@@ -642,6 +642,18 @@ (define_predicate "const_vector_same_uimm6_operand"
   return loongarch_const_vector_same_int_p (op, mode, 0, 63);
 })
 
+(define_predicate "const_vector_neg_fp_operand"
+  (match_code "const_vector")
+{
+  machine_mode imode = related_int_vector_mode (mode).require ();
+  rtx mask = loongarch_build_signbit_mask (imode, 1, 0);
+
+  op = gen_lowpart (imode, op);
+  return rtx_equal_p (mask,
+		      simplify_const_binary_operation (AND, imode, mask,
+						       op));
+})
+
 (define_predicate "par_const_vector_shf_set_operand"
   (match_code "parallel")
 {
@@ -667,3 +679,7 @@ (define_predicate "reg_or_vector_same_ximm5_operand"
 (define_predicate "reg_or_vector_same_uimm6_operand"
   (ior (match_operand 0 "register_operand")
        (match_operand 0 "const_vector_same_uimm6_operand")))
+
+(define_predicate "reg_or_vector_neg_fp_operand"
+  (ior (match_operand 0 "register_operand")
+       (match_operand 0 "const_vector_neg_fp_operand")))
--- a/src/gcc/config/loongarch/simd.md
+++ b/src/gcc/config/loongarch/simd.md
@@ -35,6 +35,9 @@ (define_mode_iterator IVEC    [(ILSX "ISA_HAS_LSX") (ILASX "ISA_HAS_LASX")])
 ;; All FP modes available
 (define_mode_iterator FVEC    [(FLSX "ISA_HAS_LSX") (FLASX "ISA_HAS_LASX")])
 
+;; All vector modes available
+(define_mode_iterator ALLVEC  [IVEC FVEC])
+
 ;; Mnemonic prefix, "x" for LASX modes.
 (define_mode_attr x [(V2DI "") (V4SI "") (V8HI "") (V16QI "")
 		     (V2DF "") (V4SF "")
@@ -327,6 +330,17 @@ (define_insn "rotr<mode>3"
   [(set_attr "type" "simd_int_arith")
    (set_attr "mode" "<MODE>")])
 
+;; <x>vfnmsub.{s/d}
+(define_insn "fnma<mode>4"
+  [(set (match_operand:FVEC 0 "register_operand" "=f")
+	(fma:FVEC (neg:FVEC (match_operand:FVEC 1 "register_operand" "f"))
+		  (match_operand:FVEC 2 "register_operand" "f")
+		  (match_operand:FVEC 3 "register_operand" "f")))]
+  "!HONOR_SIGNED_ZEROS (<MODE>mode)"
+  "<x>vfnmsub.<simdfmt>\t%<wu>0,%<wu>1,%<wu>2,%<wu>3"
+  [(set_attr "type" "simd_fmadd")
+   (set_attr "mode" "<MODE>")])
+
 ;; <x>vfcmp.*.{s/d} with defined RTX code
 ;; There are no fcmp.{sugt/suge/cgt/cge}.{s/d} menmonics in GAS, so we have
 ;; to reverse the operands ourselves :(.
@@ -485,6 +499,105 @@ (define_insn "neg<mode>2"
   [(set_attr "type" "simd_logic")
    (set_attr "mode" "<MODE>")])
 
+(define_insn "xor<mode>3"
+  [(set (match_operand:IVEC 0 "register_operand" "=f,f,f")
+	(xor:IVEC
+	  (match_operand:IVEC 1 "register_operand" "f,f,f")
+	  (match_operand:IVEC 2 "reg_or_vector_same_val_operand" "f,YC,Urv8")))]
+  ""
+  "@
+   <x>vxor.v\t%<wu>0,%<wu>1,%<wu>2
+   <x>vbitrevi.%v0\t%<wu>0,%<wu>1,%V2
+   <x>vxori.b\t%<wu>0,%<wu>1,%B2"
+  [(set_attr "type" "simd_logic,simd_bit,simd_logic")
+   (set_attr "mode" "<MODE>")])
+
+(define_insn "ior<mode>3"
+  [(set (match_operand:IVEC 0 "register_operand" "=f,f,f")
+	(ior:IVEC
+	  (match_operand:IVEC 1 "register_operand" "f,f,f")
+	  (match_operand:IVEC 2 "reg_or_vector_same_val_operand" "f,YC,Urv8")))]
+  ""
+  "@
+   <x>vor.v\t%<wu>0,%<wu>1,%<wu>2
+   <x>vbitseti.%v0\t%<wu>0,%<wu>1,%V2
+   <x>vori.b\t%<wu>0,%<wu>1,%B2"
+  [(set_attr "type" "simd_logic,simd_bit,simd_logic")
+   (set_attr "mode" "<MODE>")])
+
+(define_insn "and<mode>3"
+  [(set (match_operand:IVEC 0 "register_operand" "=f,f,f")
+	(and:IVEC
+	  (match_operand:IVEC 1 "register_operand" "f,f,f")
+	  (match_operand:IVEC 2 "reg_or_vector_same_val_operand" "f,YZ,Urv8")))]
+  ""
+{
+  switch (which_alternative)
+    {
+    case 0:
+      return "<x>vand.v\t%<wu>0,%<wu>1,%<wu>2";
+    case 1:
+      {
+	operands[2] = simplify_const_unary_operation (NOT, <MODE>mode,
+						      operands[2],
+						      <MODE>mode);
+	return "<x>vbitclri.%v0\t%<wu>0,%<wu>1,%V2";
+      }
+    case 2:
+      return "<x>vandi.b\t%<wu>0,%<wu>1,%B2";
+    default:
+      gcc_unreachable ();
+    }
+}
+  [(set_attr "type" "simd_logic,simd_bit,simd_logic")
+   (set_attr "mode" "<MODE>")])
+
+(define_expand "copysign<mode>3"
+  [(match_operand:FVEC 0 "register_operand")
+   (match_operand:FVEC 1 "register_operand")
+   (match_operand:FVEC 2 "reg_or_vector_neg_fp_operand")]
+  ""
+{
+  machine_mode imode = <VIMODE>mode;
+  rtx op[3], mask = loongarch_build_signbit_mask (imode, 1, 0);
+
+  /* Pun the operation into fixed-point bitwise operations.  */
+  for (int i = 0; i < 3; i++)
+    op[i] = lowpart_subreg (imode, operands[i], <MODE>mode);
+
+  /* Copysign from a positive const should have been already simplified
+     to abs, ignore the case here.  Copysign from a negative const is
+     a simple vbitset which is an alternative of ior (see above).  */
+  if (const_vector_neg_fp_operand (operands[2], <MODE>mode))
+    emit_insn (gen_ior<vimode>3 (op[0], op[1], mask));
+  else
+    {
+      mask = force_reg (imode, mask);
+      emit_insn (gen_<simd_isa>_<x>vbitsel_<simdfmt_as_i> (op[0], op[1],
+							   op[2], mask));
+    }
+
+  DONE;
+})
+
+(define_expand "@xorsign<mode>3"
+  [(match_operand:FVEC 0 "register_operand")
+   (match_operand:FVEC 1 "register_operand")
+   (match_operand:FVEC 2 "register_operand")]
+  ""
+{
+  machine_mode imode = <VIMODE>mode;
+  rtx op[3];
+
+  for (int i = 0; i < 3; i++)
+    op[i] = lowpart_subreg (imode, operands[i], <MODE>mode);
+
+  rtx t = loongarch_build_signbit_mask (imode, 1, 0);
+  t = force_reg (imode, simplify_gen_binary (AND, imode, op[2], t));
+  emit_move_insn (op[0], simplify_gen_binary (XOR, imode, op[1], t));
+  DONE;
+})
+
 ; The LoongArch SX Instructions.
 (include "lsx.md")
 
new file mode 100644
--- /dev/null
+++ b/src/gcc/config/microblaze/iterators.md
@@ -0,0 +1,25 @@
+;; Iterator definitions for GCC MicroBlaze machine description files.
+;; Copyright (C) 2012-2024 Free Software Foundation, Inc.
+;;
+;; This file is part of GCC.
+;;
+;; GCC is free software; you can redistribute it and/or modify
+;; it under the terms of the GNU General Public License as published by
+;; the Free Software Foundation; either version 3, or (at your option)
+;; any later version.
+;;
+;; GCC is distributed in the hope that it will be useful,
+;; but WITHOUT ANY WARRANTY; without even the implied warranty of
+;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+;; GNU General Public License for more details.
+;;
+;; You should have received a copy of the GNU General Public License
+;; along with GCC; see the file COPYING3.  If not see
+;; <http://www.gnu.org/licenses/>.
+
+; atomics code iterator
+(define_code_iterator any_atomic [plus ior xor and])
+
+; atomics code attribute
+(define_code_attr atomic_optab
+  [(plus "add") (ior "or") (xor "xor") (and "and")])
--- a/src/gcc/config/microblaze/microblaze-protos.h
+++ b/src/gcc/config/microblaze/microblaze-protos.h
@@ -62,6 +62,7 @@ extern int symbol_mentioned_p (rtx);
 extern int label_mentioned_p (rtx);
 extern bool microblaze_cannot_force_const_mem (machine_mode, rtx);
 extern void microblaze_eh_return (rtx op0);
+extern void microblaze_subword_address (rtx, rtx *, rtx *);
 #endif  /* RTX_CODE */
 
 /* Declare functions in microblaze-c.cc.  */
--- a/src/gcc/config/microblaze/microblaze.cc
+++ b/src/gcc/config/microblaze/microblaze.cc
@@ -239,6 +239,10 @@ section *sdata2_section;
 #define TARGET_HAVE_TLS true
 #endif
 
+/* MicroBlaze does not do speculative execution.  */
+#undef  TARGET_HAVE_SPECULATION_SAFE_VALUE
+#define TARGET_HAVE_SPECULATION_SAFE_VALUE speculation_safe_value_not_needed
+
 /* Return truth value if a CONST_DOUBLE is ok to be a legitimate constant.  */
 static bool
 microblaze_const_double_ok (rtx op, machine_mode mode)
@@ -1296,6 +1300,34 @@ microblaze_expand_block_move (rtx dest, rtx src, rtx length, rtx align_rtx)
   return false;
 }
 
+/* Compute memory address *aligned_mem and corresponding shift value (*shift)
+   from a QImode memory reference MEM */
+void
+microblaze_subword_address (rtx mem, rtx *aligned_mem, rtx *shift)
+{
+  /* Align the memory address to a word.  */
+  rtx addr = force_reg (Pmode, XEXP (mem, 0));
+
+  rtx addr_mask = gen_int_mode (-4, Pmode);
+
+  rtx aligned_addr = gen_reg_rtx (Pmode);
+
+  emit_move_insn (aligned_addr,  gen_rtx_AND (Pmode, addr, addr_mask));
+
+  *aligned_mem = change_address (mem, SImode, aligned_addr);
+
+  /* Calculate the shift amount.  */
+  emit_move_insn (*shift, gen_rtx_AND (SImode, addr, gen_int_mode (3, SImode)));
+
+  if (TARGET_LITTLE_ENDIAN == 0) {
+    emit_move_insn (*shift,
+		    gen_rtx_MINUS (SImode, gen_int_mode (3, SImode), *shift));
+  }
+
+  emit_move_insn (*shift, gen_rtx_ASHIFT (SImode, *shift,
+					  gen_int_mode (3, SImode)));
+}
+
 static bool
 microblaze_rtx_costs (rtx x, machine_mode mode, int outer_code ATTRIBUTE_UNUSED,
 		      int opno ATTRIBUTE_UNUSED, int *total,
--- a/src/gcc/config/microblaze/microblaze.md
+++ b/src/gcc/config/microblaze/microblaze.md
@@ -21,6 +21,7 @@
 
 (include "constraints.md")
 (include "predicates.md")
+(include "iterators.md")
 
 ;;----------------------------------------------------
 ;; Constants
@@ -43,6 +44,10 @@ (define_constants [
   (UNSPEC_TLS           106)    ;; jump table
   (UNSPEC_SET_TEXT      107)    ;; set text start
   (UNSPEC_TEXT          108)    ;; data text relative
+  (UNSPECV_CAS_BOOL     201)    ;; compare and swap (bool)
+  (UNSPECV_CAS_VAL      202)    ;; compare and swap (val)
+  (UNSPECV_CAS_MEM      203)    ;; compare and swap (mem)
+  (UNSPECV_ATOMIC_FETCH_OP     204)    ;; atomic fetch op
 ])
 
 (define_c_enum "unspec" [
@@ -79,7 +84,7 @@ (define_c_enum "unspec" [
 ;; bshift 	Shift operations
 
 (define_attr "type"
-  "unknown,branch,jump,call,load,store,move,arith,darith,imul,idiv,icmp,multi,nop,no_delay_arith,no_delay_load,no_delay_store,no_delay_imul,no_delay_move,bshift,fadd,frsub,fmul,fdiv,fcmp,fsl,fsqrt,fcvt,trap"
+  "unknown,branch,jump,call,load,store,move,arith,darith,imul,idiv,icmp,multi,nop,no_delay_arith,no_delay_load,no_delay_store,no_delay_imul,no_delay_move,bshift,fadd,frsub,fmul,fdiv,fcmp,fsl,fsqrt,fcvt,trap,atomic"
   (const_string "unknown"))
 
 ;; Main data type used by the insn
--- a/src/gcc/config/microblaze/sync.md
+++ b/src/gcc/config/microblaze/sync.md
@@ -18,26 +18,97 @@
 ;; <http://www.gnu.org/licenses/>.
 
 (define_insn "atomic_compare_and_swapsi"
-  [(match_operand:SI 0 "register_operand" "=&d")	;; bool output
-   (match_operand:SI 1 "register_operand" "=&d")	;; val output
-   (match_operand:SI 2 "nonimmediate_operand" "+Q")	;; memory
-   (match_operand:SI 3 "register_operand" "d")		;; expected value
-   (match_operand:SI 4 "register_operand" "d")		;; desired value
-   (match_operand:SI 5 "const_int_operand" "")		;; is_weak
-   (match_operand:SI 6 "const_int_operand" "")		;; mod_s
-   (match_operand:SI 7 "const_int_operand" "")		;; mod_f
+  [(set (match_operand:SI 0 "register_operand" "=&d")		;; bool output
+        (unspec_volatile:SI
+          [(match_operand:SI 2 "nonimmediate_operand" "+Q")	;; memory
+           (match_operand:SI 3 "register_operand" "d")		;; expected value
+           (match_operand:SI 4 "register_operand" "d")]		;; desired value
+          UNSPECV_CAS_BOOL))
+   (set (match_operand:SI 1 "register_operand" "=&d")		;; val output
+        (unspec_volatile:SI [(const_int 0)] UNSPECV_CAS_VAL))
+   (set (match_dup 2)
+        (unspec_volatile:SI [(const_int 0)] UNSPECV_CAS_MEM))
+   (match_operand:SI 5 "const_int_operand" "")			;; is_weak
+   (match_operand:SI 6 "const_int_operand" "")			;; mod_s
+   (match_operand:SI 7 "const_int_operand" "")			;; mod_f
    (clobber (match_scratch:SI 8 "=&d"))]
   ""
   {
-    output_asm_insn ("addc \tr0,r0,r0", operands);
-    output_asm_insn ("lwx  \t%1,%y2,r0", operands);
-    output_asm_insn ("addic\t%8,r0,0", operands);
-    output_asm_insn ("bnei \t%8,.-8", operands);
-    output_asm_insn ("cmp  \t%0,%1,%3", operands);
-    output_asm_insn ("bnei \t%0,.+16", operands);
-    output_asm_insn ("swx  \t%4,%y2,r0", operands);
-    output_asm_insn ("addic\t%8,r0,0", operands);
-    output_asm_insn ("bnei \t%8,.-28", operands);
-    return "";
+    return "add  \t%0,r0,r0\n\t"
+      "lwx  \t%1,%y2,r0\n\t"
+      "addic\t%8,r0,0\n\t"
+      "bnei \t%8,.-8\n\t"
+      "cmp  \t%8,%1,%3\n\t"
+      "bnei \t%8,.+20\n\t"
+      "swx  \t%4,%y2,r0\n\t"
+      "addic\t%8,r0,0\n\t"
+      "bnei \t%8,.-28\n\t"
+      "addi \t%0,r0,1";
   }
+  [(set_attr "type"	"atomic")
+  (set_attr "mode"	"SI")
+  (set_attr "length"	"40")]
 )
+
+;;
+;;
+;;
+;;
+(define_insn "atomic_fetch_<atomic_optab>si"
+  [(set (match_operand:SI 0 "register_operand" "=&d")
+	(match_operand:SI 1 "memory_operand" "+Q"))
+   (set (match_dup 1)
+	(unspec_volatile:SI
+	  [(any_atomic:SI (match_dup 1)
+		   (match_operand:SI 2 "register_operand" "d"))
+	   (match_operand:SI 3 "const_int_operand")] ;; model
+	 UNSPECV_ATOMIC_FETCH_OP))
+   (clobber (match_scratch:SI 4 "=&d"))]	  ;; tmp_1
+  ""
+  {
+    return
+      "lwx  \t%0,%y1,r0\n\t"
+      "addic\t%4,r0,0\n\t"
+      "bnei \t%4,.-8\n\t"
+      "<atomic_optab>\t%4,%0,%2\n\t"
+      "swx  \t%4,%y1,r0\n\t"
+      "addic\t%4,r0,0\n\t"
+      "bnei \t%4,.-24";
+  }
+  [(set_attr "type"	"atomic")
+  (set_attr "mode"	"SI")
+  (set_attr "length"	"28")])
+
+;;
+;; MicroBlaze only supports lx/sx instructions for word mode only
+;;
+;; Use shift|mask magic to implement atomic_test_and_set using lwx/swx
+;;
+(define_expand "atomic_test_and_set"
+  [(match_operand:QI 0 "register_operand" "")    ;; bool output
+   (match_operand:QI 1 "memory_operand" "m")    ;; memory
+   (match_operand:SI 2 "const_int_operand" "")]  ;; model
+  ""
+{
+  rtx old = gen_reg_rtx (SImode);
+  rtx mem = operands[1];
+  rtx model = operands[2];
+  rtx set = gen_reg_rtx (SImode);
+  rtx aligned_mem = gen_reg_rtx (SImode);
+  rtx shift = gen_reg_rtx (SImode);
+
+  microblaze_subword_address (mem, &aligned_mem, &shift);
+
+  emit_move_insn (set, GEN_INT (1));
+  rtx shifted_set = gen_reg_rtx (SImode);
+
+  emit_move_insn (shifted_set, gen_rtx_ASHIFT (SImode, set, shift));
+
+  emit_insn (gen_atomic_fetch_orsi (old, aligned_mem, shifted_set, model));
+
+  emit_move_insn (old, gen_rtx_ASHIFTRT (SImode, old, shift));
+
+  emit_move_insn (operands[0], gen_lowpart (QImode, old));
+
+  DONE;
+})
--- a/src/gcc/config/rs6000/aix.h
+++ b/src/gcc/config/rs6000/aix.h
@@ -281,4 +281,6 @@
 #undef SUBTARGET_DRIVER_SELF_SPECS
 #define SUBTARGET_DRIVER_SELF_SPECS	\
 "%{m64:-maix64} %<m64",			\
-"%{m32:-maix32} %<m32"
+"%{m32:-maix32} %<m32",			\
+"%{fstack-protector*: %<fstack-protector* \
+   %estack-protector not supported on AIX}"
--- a/src/gcc/config/rs6000/altivec.md
+++ b/src/gcc/config/rs6000/altivec.md
@@ -3576,10 +3576,7 @@ (define_expand "convert_4f32_8f16"
 
   emit_insn (gen_vsx_xvcvsphp (rtx_tmp_hi, operands[1]));
   emit_insn (gen_vsx_xvcvsphp (rtx_tmp_lo, operands[2]));
-  if (!BYTES_BIG_ENDIAN)
-    emit_insn (gen_altivec_vpkuwum (operands[0], rtx_tmp_hi, rtx_tmp_lo));
-  else
-    emit_insn (gen_altivec_vpkuwum (operands[0], rtx_tmp_lo, rtx_tmp_hi));
+  emit_insn (gen_altivec_vpkuwum (operands[0], rtx_tmp_hi, rtx_tmp_lo));
   DONE;
 })
 
--- a/src/gcc/config/rs6000/rs6000.md
+++ b/src/gcc/config/rs6000/rs6000.md
@@ -6897,7 +6897,7 @@ (define_insn "floatdidf2"
 (define_insn "floatti<mode>2"
   [(set (match_operand:IEEE128 0 "vsx_register_operand" "=v")
 	(float:IEEE128 (match_operand:TI 1 "vsx_register_operand" "v")))]
-  "TARGET_POWER10"
+  "TARGET_POWER10 && TARGET_FLOAT128_HW"
 {
   return  "xscvsqqp %0,%1";
 }
@@ -6906,7 +6906,7 @@ (define_insn "floatti<mode>2"
 (define_insn "floatunsti<mode>2"
   [(set (match_operand:IEEE128 0 "vsx_register_operand" "=v")
 	(unsigned_float:IEEE128 (match_operand:TI 1 "vsx_register_operand" "v")))]
-  "TARGET_POWER10"
+  "TARGET_POWER10 && TARGET_FLOAT128_HW"
 {
   return  "xscvuqqp %0,%1";
 }
@@ -6915,7 +6915,7 @@ (define_insn "floatunsti<mode>2"
 (define_insn "fix_trunc<mode>ti2"
   [(set (match_operand:TI 0 "vsx_register_operand" "=v")
 	(fix:TI (match_operand:IEEE128 1 "vsx_register_operand" "v")))]
-  "TARGET_POWER10"
+  "TARGET_POWER10 && TARGET_FLOAT128_HW"
 {
   return  "xscvqpsqz %0,%1";
 }
--- a/src/gcc/config/rs6000/vsx.md
+++ b/src/gcc/config/rs6000/vsx.md
@@ -5132,7 +5132,7 @@ (define_insn "xsxexpqp_<IEEE128:mode>_<V2DI_DI:mode>"
 	(unspec:V2DI_DI
 	  [(match_operand:IEEE128 1 "altivec_register_operand" "v")]
 	 UNSPEC_VSX_SXEXPDP))]
-  "TARGET_P9_VECTOR"
+  "TARGET_FLOAT128_HW"
   "xsxexpqp %0,%1"
   [(set_attr "type" "vecmove")])
 
@@ -5151,7 +5151,7 @@ (define_insn "xsxsigqp_<IEEE128:mode>_<VEC_TI:mode>"
 	(unspec:VEC_TI [(match_operand:IEEE128 1
 			    "altivec_register_operand" "v")]
 	 UNSPEC_VSX_SXSIG))]
-  "TARGET_P9_VECTOR"
+  "TARGET_FLOAT128_HW"
   "xsxsigqp %0,%1"
   [(set_attr "type" "vecmove")])
 
@@ -5171,7 +5171,7 @@ (define_insn "xsiexpqpf_<mode>"
 	 [(match_operand:IEEE128 1 "altivec_register_operand" "v")
 	  (match_operand:DI 2 "altivec_register_operand" "v")]
 	 UNSPEC_VSX_SIEXPQP))]
-  "TARGET_P9_VECTOR"
+  "TARGET_FLOAT128_HW"
   "xsiexpqp %0,%1,%2"
   [(set_attr "type" "vecmove")])
 
@@ -5183,7 +5183,7 @@ (define_insn "xsiexpqp_<IEEE128:mode>_<V2DI_DI:mode>"
 			 (match_operand:V2DI_DI 2
 			  "altivec_register_operand" "v")]
 	 UNSPEC_VSX_SIEXPQP))]
-  "TARGET_P9_VECTOR"
+  "TARGET_FLOAT128_HW"
   "xsiexpqp %0,%1,%2"
   [(set_attr "type" "vecmove")])
 
@@ -5253,7 +5253,7 @@ (define_expand "xscmpexpqp_<code>_<mode>"
    (set (match_operand:SI 0 "register_operand" "=r")
 	(CMP_TEST:SI (match_dup 3)
 		     (const_int 0)))]
-  "TARGET_P9_VECTOR"
+  "TARGET_FLOAT128_HW"
 {
   if (<CODE> == UNORDERED && !HONOR_NANS (<MODE>mode))
     {
@@ -5271,7 +5271,7 @@ (define_insn "*xscmpexpqp"
 		          (match_operand:IEEE128 2 "altivec_register_operand" "v")]
 	  UNSPEC_VSX_SCMPEXPQP)
 	 (match_operand:SI 3 "zero_constant" "j")))]
-  "TARGET_P9_VECTOR"
+  "TARGET_FLOAT128_HW"
   "xscmpexpqp %0,%1,%2"
   [(set_attr "type" "fpcompare")])
 
@@ -5329,7 +5329,7 @@ (define_expand "xststdcnegqp_<mode>"
    (set (match_operand:SI 0 "register_operand" "=r")
 	(lt:SI (match_dup 2)
 	       (const_int 0)))]
-  "TARGET_P9_VECTOR"
+  "TARGET_FLOAT128_HW"
 {
   operands[2] = gen_reg_rtx (CCFPmode);
 })
--- a/src/gcc/config/s390/s390.md
+++ b/src/gcc/config/s390/s390.md
@@ -3392,7 +3392,7 @@ (define_split
         (match_operand:BLK 1 "memory_operand" ""))
    (use (match_operand 2 "const_int_operand" ""))
    (use (match_operand 3 "immediate_operand" ""))
-   (clobber (scratch))]
+   (clobber (match_scratch 4))]
   "reload_completed"
   [(parallel
     [(set (match_dup 0) (match_dup 1))
@@ -3404,7 +3404,7 @@ (define_split
         (match_operand:BLK 1 "memory_operand" ""))
    (use (match_operand 2 "register_operand" ""))
    (use (match_operand 3 "memory_operand" ""))
-   (clobber (scratch))]
+   (clobber (match_scratch 4))]
   "reload_completed"
   [(parallel
     [(unspec [(match_dup 2) (match_dup 3)
@@ -3418,14 +3418,14 @@ (define_split
         (match_operand:BLK 1 "memory_operand" ""))
    (use (match_operand 2 "register_operand" ""))
    (use (const:BLK (unspec:BLK [(const_int 0)] UNSPEC_INSN)))
-   (clobber (scratch))]
+   (clobber (match_scratch 3))]
   "TARGET_Z10 && reload_completed"
   [(parallel
     [(unspec [(match_dup 2) (const_int 0)
-              (label_ref (match_dup 3))] UNSPEC_EXECUTE)
+	      (label_ref (match_dup 4))] UNSPEC_EXECUTE)
      (set (match_dup 0) (match_dup 1))
      (use (const_int 1))])]
-  "operands[3] = gen_label_rtx ();")
+  "operands[4] = gen_label_rtx ();")
 
 (define_split
   [(set (match_operand:BLK 0 "memory_operand" "")
@@ -3644,7 +3644,7 @@ (define_split
         (const_int 0))
    (use (match_operand 1 "const_int_operand" ""))
    (use (match_operand 2 "immediate_operand" ""))
-   (clobber (scratch))
+   (clobber (match_scratch 3))
    (clobber (reg:CC CC_REGNUM))]
   "reload_completed"
   [(parallel
@@ -3658,7 +3658,7 @@ (define_split
         (const_int 0))
    (use (match_operand 1 "register_operand" ""))
    (use (match_operand 2 "memory_operand" ""))
-   (clobber (scratch))
+   (clobber (match_scratch 3))
    (clobber (reg:CC CC_REGNUM))]
   "reload_completed"
   [(parallel
@@ -3674,7 +3674,7 @@ (define_split
         (const_int 0))
    (use (match_operand 1 "register_operand" ""))
    (use (const:BLK (unspec:BLK [(const_int 0)] UNSPEC_INSN)))
-   (clobber (scratch))
+   (clobber (match_scratch 2))
    (clobber (reg:CC CC_REGNUM))]
   "TARGET_Z10 && reload_completed"
   [(parallel
@@ -3839,7 +3839,7 @@ (define_split
                      (match_operand:BLK 1 "memory_operand" "")))
    (use (match_operand 2 "const_int_operand" ""))
    (use (match_operand 3 "immediate_operand" ""))
-   (clobber (scratch))]
+   (clobber (match_scratch 4))]
   "reload_completed"
   [(parallel
     [(set (reg:CCU CC_REGNUM) (compare:CCU (match_dup 0) (match_dup 1)))
@@ -3852,7 +3852,7 @@ (define_split
                      (match_operand:BLK 1 "memory_operand" "")))
    (use (match_operand 2 "register_operand" ""))
    (use (match_operand 3 "memory_operand" ""))
-   (clobber (scratch))]
+   (clobber (match_scratch 4))]
   "reload_completed"
   [(parallel
     [(unspec [(match_dup 2) (match_dup 3)
@@ -3867,7 +3867,7 @@ (define_split
                      (match_operand:BLK 1 "memory_operand" "")))
    (use (match_operand 2 "register_operand" ""))
    (use (const:BLK (unspec:BLK [(const_int 0)] UNSPEC_INSN)))
-   (clobber (scratch))]
+   (clobber (match_scratch 3))]
   "TARGET_Z10 && reload_completed"
   [(parallel
     [(unspec [(match_dup 2) (const_int 0)
--- a/src/gcc/config/s390/vector.md
+++ b/src/gcc/config/s390/vector.md
@@ -30,7 +30,7 @@ (define_mode_iterator VT
 ; V_HW2 is for having two iterators expanding independently e.g. vcond.
 ; It's similar to V_HW, but not fully identical: V1TI is not included, because
 ; there are no 128-bit compares.
-(define_mode_iterator V_HW  [V16QI V8HI V4SI V2DI (V1TI "TARGET_VXE") V2DF
+(define_mode_iterator V_HW  [V16QI V8HI V4SI V2DI V1TI TI V2DF
 			     (V4SF "TARGET_VXE") (V1TF "TARGET_VXE")
 			     (TF "TARGET_VXE")])
 (define_mode_iterator V_HW2 [V16QI V8HI V4SI V2DI V2DF (V4SF "TARGET_VXE")
@@ -50,6 +50,7 @@ (define_mode_iterator VI_HW_HSD [V8HI  V4SI V2DI])
 (define_mode_iterator VI_HW_HSDT [V8HI V4SI V2DI V1TI TI])
 (define_mode_iterator VI_HW_HS  [V8HI  V4SI])
 (define_mode_iterator VI_HW_QH  [V16QI V8HI])
+(define_mode_iterator VI_HW_T   [V1TI TI])
 
 ; Directly supported vector modes with a certain number of elements
 (define_mode_iterator V_HW_2   [V2DI V2DF])
@@ -149,7 +150,7 @@ (define_mode_attr TOINTVEC [(V1QI "V1QI") (V2QI "V2QI") (V4QI "V4QI") (V8QI "V8Q
 			    (V1HI "V1HI") (V2HI "V2HI") (V4HI "V4HI") (V8HI "V8HI")
 			    (V1SI "V1SI") (V2SI "V2SI") (V4SI "V4SI")
 			    (V1DI "V1DI") (V2DI "V2DI")
-			    (V1TI "V1TI")
+			    (V1TI "V1TI") (TI "V1TI")
 			    (V1SF "V1SI") (V2SF "V2SI") (V4SF "V4SI")
 			    (V1DF "V1DI") (V2DF "V2DI")
 			    (V1TF "V1TI") (TF "V1TI")])
@@ -158,7 +159,7 @@ (define_mode_attr tointvec [(V1QI "v1qi") (V2QI "v2qi") (V4QI "v4qi") (V8QI "v8q
 			    (V1HI "v1hi") (V2HI "v2hi") (V4HI "v4hi") (V8HI "v8hi")
 			    (V1SI "v1si") (V2SI "v2si") (V4SI "v4si")
 			    (V1DI "v1di") (V2DI "v2di")
-			    (V1TI "v1ti")
+			    (V1TI "v1ti") (TI "v1ti")
 			    (V1SF "v1si") (V2SF "v2si") (V4SF "v4si")
 			    (V1DF "v1di") (V2DF "v2di")
 			    (V1TF "v1ti") (TF   "v1ti")])
@@ -938,7 +939,7 @@ (define_insn "tf_to_fprx2"
       else
 	{
 	  reg_pair += 2;  // get rid of prefix %f
-	  snprintf (buf, sizeof (buf), "ldr\t%%f0,%%f1;vpdi\t%%%%v%s,%%v1,%%%%v%s,5", reg_pair, reg_pair);
+	  snprintf (buf, sizeof (buf), "vlr\t%%v0,%%v1;vpdi\t%%%%v%s,%%v1,%%%%v%s,5", reg_pair, reg_pair);
 	  output_asm_insn (buf, operands);
 	  return "";
 	}
@@ -1945,11 +1946,11 @@ (define_expand "vec_cmp<mode><tointvec>"
   DONE;
 })
 
-(define_expand "vec_cmpu<VI_HW:mode><VI_HW:mode>"
-  [(set (match_operand:VI_HW    0 "register_operand" "")
-	(match_operator:VI_HW   1 ""
-	  [(match_operand:VI_HW 2 "register_operand" "")
-	   (match_operand:VI_HW 3 "register_operand" "")]))]
+(define_expand "vec_cmpu<VIT_HW:mode><VIT_HW:mode>"
+  [(set (match_operand:VIT_HW    0 "register_operand" "")
+	(match_operator:VIT_HW   1 ""
+	  [(match_operand:VIT_HW 2 "register_operand" "")
+	   (match_operand:VIT_HW 3 "register_operand" "")]))]
   "TARGET_VX"
 {
   s390_expand_vec_compare (operands[0], GET_CODE(operands[1]), operands[2], operands[3]);
@@ -1964,6 +1965,94 @@ (define_insn "*vec_cmp<VICMP_HW_OP:code><VI:mode><VI:mode>_nocc"
   "vc<VICMP_HW_OP:insn_cmp_op><VI:bhfgq>\t%v2,%v0,%v1"
   [(set_attr "op_type" "VRR")])
 
+(define_insn_and_split "*vec_cmpeq<mode><mode>_nocc_emu"
+  [(set (match_operand:VI_HW_T             0 "register_operand" "=v")
+	(eq:VI_HW_T (match_operand:VI_HW_T 1 "register_operand"  "v")
+		    (match_operand:VI_HW_T 2 "register_operand"  "v")))]
+  "TARGET_VX"
+  "#"
+  "&& can_create_pseudo_p ()"
+  [(set (match_dup 3)
+	(eq:V2DI (match_dup 1) (match_dup 2)))
+   (set (match_dup 4)
+	(vec_select:V2DI (match_dup 3) (parallel [(const_int 1) (const_int 0)])))
+   (set (match_dup 3)
+	(and:V2DI (match_dup 3) (match_dup 4)))
+   (set (match_dup 0)
+	(subreg:<MODE> (match_dup 3) 0))]
+{
+  operands[1] = simplify_gen_subreg (V2DImode, operands[1], <MODE>mode, 0);
+  operands[2] = simplify_gen_subreg (V2DImode, operands[2], <MODE>mode, 0);
+  operands[3] = gen_reg_rtx (V2DImode);
+  operands[4] = gen_reg_rtx (V2DImode);
+})
+
+(define_insn_and_split "*vec_cmpgt<mode><mode>_nocc_emu"
+  [(set (match_operand:VI_HW_T             0 "register_operand" "=v")
+	(gt:VI_HW_T (match_operand:VI_HW_T 1 "register_operand"  "v")
+		    (match_operand:VI_HW_T 2 "register_operand"  "v")))]
+  "TARGET_VX"
+  "#"
+  "&& can_create_pseudo_p ()"
+  [(set (match_dup 3)
+	(gt:V2DI (match_dup 1) (match_dup 2)))
+   (set (match_dup 4)
+	(eq:V2DI (match_dup 1) (match_dup 2)))
+   (set (match_dup 5)
+	(gtu:V2DI (match_dup 1) (match_dup 2)))
+   (set (match_dup 5)
+	(vec_select:V2DI (match_dup 5) (parallel [(const_int 1) (const_int 0)])))
+   (set (match_dup 4)
+	(and:V2DI (match_dup 4) (match_dup 5)))
+   (set (match_dup 4)
+	(ior:V2DI (match_dup 3) (match_dup 4)))
+   (set (match_dup 4)
+	(vec_duplicate:V2DI
+	 (vec_select:DI
+	  (match_dup 4)
+	  (parallel [(const_int 1)]))))
+   (set (match_dup 0)
+	(subreg:<MODE> (match_dup 4) 0))]
+{
+  operands[1] = simplify_gen_subreg (V2DImode, operands[1], <MODE>mode, 0);
+  operands[2] = simplify_gen_subreg (V2DImode, operands[2], <MODE>mode, 0);
+  operands[3] = gen_reg_rtx (V2DImode);
+  operands[4] = gen_reg_rtx (V2DImode);
+  operands[5] = gen_reg_rtx (V2DImode);
+})
+
+(define_insn_and_split "*vec_cmpgtu<mode><mode>_nocc_emu"
+  [(set (match_operand:VI_HW_T              0 "register_operand" "=v")
+	(gtu:VI_HW_T (match_operand:VI_HW_T 1 "register_operand"  "v")
+		     (match_operand:VI_HW_T 2 "register_operand"  "v")))]
+  "TARGET_VX"
+  "#"
+  "&& can_create_pseudo_p ()"
+  [(set (match_dup 3)
+	(gtu:V2DI (match_dup 1) (match_dup 2)))
+   (set (match_dup 4)
+	(eq:V2DI (match_dup 1) (match_dup 2)))
+   (set (match_dup 5)
+	(vec_select:V2DI (match_dup 3) (parallel [(const_int 1) (const_int 0)])))
+   (set (match_dup 4)
+	(and:V2DI (match_dup 4) (match_dup 5)))
+   (set (match_dup 4)
+	(ior:V2DI (match_dup 3) (match_dup 4)))
+   (set (match_dup 4)
+	(vec_duplicate:V2DI
+	 (vec_select:DI
+	  (match_dup 4)
+	  (parallel [(const_int 1)]))))
+   (set (match_dup 0)
+	(subreg:<MODE> (match_dup 4) 0))]
+{
+  operands[1] = simplify_gen_subreg (V2DImode, operands[1], <MODE>mode, 0);
+  operands[2] = simplify_gen_subreg (V2DImode, operands[2], <MODE>mode, 0);
+  operands[3] = gen_reg_rtx (V2DImode);
+  operands[4] = gen_reg_rtx (V2DImode);
+  operands[5] = gen_reg_rtx (V2DImode);
+})
+
 
 ;;
 ;; Floating point compares
@@ -2300,12 +2389,12 @@ (define_split
 
 ; op0 = op3 == 0 ? op1 : op2
 (define_insn "*vec_sel0<mode>"
-  [(set (match_operand:V 0 "register_operand" "=v")
-	(if_then_else:V
+  [(set (match_operand:VT 0 "register_operand" "=v")
+	(if_then_else:VT
 	 (eq (match_operand:<TOINTVEC> 3 "register_operand" "v")
 	     (match_operand:<TOINTVEC> 4 "const0_operand" ""))
-	 (match_operand:V 1 "register_operand" "v")
-	 (match_operand:V 2 "register_operand" "v")))]
+	 (match_operand:VT 1 "register_operand" "v")
+	 (match_operand:VT 2 "register_operand" "v")))]
   "TARGET_VX"
   "vsel\t%v0,%2,%1,%3"
   [(set_attr "op_type" "VRR")])
--- a/src/gcc/config/vax/vax.md
+++ b/src/gcc/config/vax/vax.md
@@ -2909,7 +2909,7 @@ (define_insn_and_split "casesi1"
   "#"
   "reload_completed"
   [(parallel
-     [(match_dup 1)
+     [(use (match_dup 1))
       (set (pc)
 	   (plus:SI (sign_extend:SI
 		      (mem:HI (plus:SI
@@ -2922,7 +2922,7 @@ (define_insn_and_split "casesi1"
   "")
 
 (define_insn "*casesi1"
-  [(match_operand:SI 1 "const_int_operand" "n")
+  [(use (match_operand:SI 1 "const_int_operand" "n"))
    (set (pc)
 	(plus:SI (sign_extend:SI
 		   (mem:HI (plus:SI
--- a/src/gcc/cp/ChangeLog
+++ b/src/gcc/cp/ChangeLog
@@ -1,3 +1,244 @@
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-03-12  Jakub Jelinek  <jakub@redhat.com>
+
+	* parser.cc (cp_parser_omp_taskwait): Set TREE_TYPE of OMP_TASK
+	to void_type_node rather than void_node.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-02-17  Jakub Jelinek  <jakub@redhat.com>
+
+	PR c++/120685
+	* typeck2.cc (build_functional_cast_1): For C++23 auto(x)
+	without tf_warning or tf_error return error_mark_node instead of
+	emitting pedwarn and handling it.
+	* semantics.cc (finish_compound_literal): Similarly for C++26
+	auto{x}.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-02-09  Jakub Jelinek  <jakub@redhat.com>
+
+	PR c++/123889
+	* constexpr.cc (explain_invalid_constexpr_fn): Diagnose
+	NULL or error_mark_node massaged on non-constructor.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-01-27  Jakub Jelinek  <jakub@redhat.com>
+
+	PR c++/123578
+	* tree.cc (cxx_printable_name_internal): Call lang_decl_name before
+	finding the slot to cache it in and repeat search in the cache
+	after the call.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-01-24  Jakub Jelinek  <jakub@redhat.com>
+
+	PR c++/123667
+	* semantics.cc (finish_decltype_type): Allow a structured binding
+	for ptds.saved to have DECL_HAS_VALUE_EXPR_P cleared, if it is
+	not within current_function_decl, but in that case assert that
+	lookup_decomp_type succeeded.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-01-24  Jakub Jelinek  <jakub@redhat.com>
+
+	PR c++/123684
+	* name-lookup.cc (handle_namespace_attrs): Only handle visibility and
+	abi_tag attributes in the gnu namespace and deprecated attribute in
+	the standard or gnu namespaces.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-01-23  Jakub Jelinek  <jakub@redhat.com>
+
+	PR c++/123597
+	* parser.cc (substitute_in_tree_walker, substitute_in_tree): Don't
+	consider BIND_EXPRs with !BIND_EXPR_VARS redundant if
+	processing_template_decl.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-12-19  Jakub Jelinek  <jakub@redhat.com>
+
+	PR c++/91388
+	* semantics.cc (finish_static_assert): Suppress -Wreturn-type warnings
+	in functions with failed assertions.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-12-19  Jakub Jelinek  <jakub@redhat.com>
+
+	PR c++/122772
+	* tree.cc (cp_stabilize_bitfield_reference): New function.
+	(cp_stabilize_reference): Use it for stabilization of
+	clk_bitfield or clk_packed lvalues.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-12-19  Jakub Jelinek  <jakub@redhat.com>
+
+	PR c++/122834
+	* typeck.cc (cp_compare_floating_point_conversion_ranks): Return
+	3 if fmt2->b is 10 except for _Float16 vs. _Decimal128, in that
+	case return -2.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-11-21  Jakub Jelinek  <jakub@redhat.com>
+
+	PR c++/121445
+	* constexpr.cc (build_data_member_initialization): Just return
+	false if member is COMPONENT_REF of COMPONENT_REF with
+	VAR_P get_base_address.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-11-20  Jakub Jelinek  <jakub@redhat.com>
+
+	PR c++/120876
+	* pt.cc (tsubst_baselink): Move maybe_incomplete handling after
+	!baselink handling.
+
+2026-03-13  Patrick Palka  <ppalka@redhat.com>
+
+	Backported from master:
+	2026-01-30  Patrick Palka  <ppalka@redhat.com>
+
+	PR c++/123845
+	PR libstdc++/114865
+	* constexpr.cc (build_data_member_initialization): Remove
+	C++11-specific recognition of MODIFY_EXPR.
+	(check_constexpr_ctor_body): Relax error diagnostic to a
+	pedwarn and don't clear DECL_DECLARED_CONSTEXPR_P upon
+	error.  Return true if complaining.
+
+2026-01-27  Patrick Palka  <ppalka@redhat.com>
+
+	Backported from master:
+	2026-01-27  Patrick Palka  <ppalka@redhat.com>
+
+	PR c++/123676
+	* pt.cc (tsubst_pack_expansion): Relax unsubsituted_packs
+	assert to allow !processing_template_decl when args is
+	NULL_TREE.
+
+2026-01-27  Patrick Palka  <ppalka@redhat.com>
+
+	Backported from master:
+	2026-01-27  Patrick Palka  <ppalka@redhat.com>
+
+	PR c++/122494
+	PR c++/123814
+	* constexpr.cc (cxx_eval_outermost_constant_expr): Clear
+	uid_sensitive_constexpr_evaluation_value when mce_true.
+
+2025-10-14  Jason Merrill  <jason@redhat.com>
+
+	Backported from master:
+	2025-08-21  Jason Merrill  <jason@redhat.com>
+
+	PR c++/120757
+	* pt.cc (tsubst_expr) [OFFSET_REF]: Don't tsubst the type.
+
+2025-10-07  Patrick Palka  <ppalka@redhat.com>
+
+	Backported from master:
+	2025-09-20  Patrick Palka  <ppalka@redhat.com>
+
+	PR c++/121981
+	* pt.cc (any_template_parm_r) <case TEMPLATE_TYPE_PARM>:
+	Don't walk TREE_TYPE.
+
+2025-09-15  Matthias Kretz  <m.kretz@gsi.de>
+
+	Backported from master:
+	2025-09-09  Matthias Kretz  <m.kretz@gsi.de>
+
+	PR c++/121801
+	* mangle.cc (write_real_cst): Handle 16-bit real and assert
+	that reals have 16 bits or a multiple of 32 bits.
+
+2025-08-08  Patrick Palka  <ppalka@redhat.com>
+
+	Backported from master:
+	2025-08-04  Patrick Palka  <ppalka@redhat.com>
+
+	PR c++/120620
+	* constexpr.cc (cxx_dynamic_cast_fn_p): Return true only
+	for synthesized __dynamic_cast.
+
+2025-08-01  Jason Merrill  <jason@redhat.com>
+
+	Backported from master:
+	2025-07-31  Jason Merrill  <jason@redhat.com>
+
+	PR c++/120800
+	* constexpr.cc (cxx_eval_vec_init_1): Suppress access control.
+
+2025-07-26  Jason Merrill  <jason@redhat.com>
+
+	Backported from master:
+	2025-07-15  Jason Merrill  <jason@redhat.com>
+
+	PR c++/120577
+	* constexpr.cc (cxx_eval_call_expression): Set
+	CONSTRUCTOR_NO_CLEARING on initial value for ctor.
+	(cxx_eval_component_reference): Make value-initialization
+	of an aggregate member explicit.
+
+2025-07-03  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-07-03  Jakub Jelinek  <jakub@redhat.com>
+
+	PR c++/120940
+	* typeck.cc (cp_build_array_ref): Fix a pasto.
+
+2025-07-03  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-07-01  Jakub Jelinek  <jakub@redhat.com>
+
+	PR c++/120471
+	* typeck.cc (cp_build_array_ref) <case COND_EXPR>: If idx is not
+	INTEGER_CST, don't optimize the case (but cp_default_conversion on
+	array early if it has ARRAY_TYPE) or use
+	SAVE_EXPR <op0>, SAVE_EXPR <idx>, SAVE_EXPR <op0> as new op0 depending
+	on flag_strong_eval_order and whether op1 and op2 are arrays with
+	invariant address or tree invariant pointers.  Formatting fixes.
+
+2025-06-02  Jason Merrill  <jason@redhat.com>
+
+	PR c++/120123
+	* lambda.cc (nonlambda_method_basetype): Look through lambdas
+	even when current_class_ref is null.
+
+2025-05-27  Patrick Palka  <ppalka@redhat.com>
+
+	Backported from master:
+	2025-05-15  Patrick Palka  <ppalka@redhat.com>
+
+	PR c++/120161
+	* pt.cc (unify) <case RECORD_TYPE>: When comparing specializations
+	of a non-primary template, still perform a type comparison.
+
 2025-05-23  Release Manager
 
 	* GCC 14.3.0 released.
--- a/src/gcc/cp/constexpr.cc
+++ b/src/gcc/cp/constexpr.cc
@@ -399,11 +399,7 @@ build_data_member_initialization (tree t, vec<constructor_elt, va_gc> **vec)
     }
   if (TREE_CODE (t) == CONVERT_EXPR)
     t = TREE_OPERAND (t, 0);
-  if (TREE_CODE (t) == INIT_EXPR
-      /* vptr initialization shows up as a MODIFY_EXPR.  In C++14 we only
-	 use what this function builds for cx_check_missing_mem_inits, and
-	 assignment in the ctor body doesn't count.  */
-      || (cxx_dialect < cxx14 && TREE_CODE (t) == MODIFY_EXPR))
+  if (TREE_CODE (t) == INIT_EXPR)
     {
       member = TREE_OPERAND (t, 0);
       init = break_out_target_exprs (TREE_OPERAND (t, 1));
@@ -464,6 +460,9 @@ build_data_member_initialization (tree t, vec<constructor_elt, va_gc> **vec)
       if (TREE_CODE (aggr) != COMPONENT_REF)
 	/* Normal member initialization.  */
 	member = TREE_OPERAND (member, 1);
+      else if (VAR_P (get_base_address (aggr)))
+	/* Initializing a local variable, don't add anything.  */
+	return true;
       else if (ANON_AGGR_TYPE_P (TREE_TYPE (aggr)))
 	/* Initializing a member of an anonymous union.  */
 	return build_anon_member_initialization (member, init, vec);
@@ -562,11 +561,11 @@ check_constexpr_ctor_body (tree last, tree list, bool complain)
   else if (list != last
 	   && !check_constexpr_ctor_body_1 (last, list))
     ok = false;
-  if (!ok)
+  if (!ok && complain)
     {
-      if (complain)
-	error ("%<constexpr%> constructor does not have empty body");
-      DECL_DECLARED_CONSTEXPR_P (current_function_decl) = false;
+      pedwarn (input_location, OPT_Wc__14_extensions,
+	       "%<constexpr%> constructor does not have empty body");
+      ok = true;
     }
   return ok;
 }
@@ -1102,6 +1101,9 @@ explain_invalid_constexpr_fn (tree fun)
 		  require_potential_rvalue_constant_expression (body);
 		}
 	    }
+	  else if (body == NULL_TREE || body == error_mark_node)
+	    error ("body of %<constexpr%> function %qD not a return-statement",
+		   fun);
 	}
     }
 }
@@ -2440,7 +2442,11 @@ cxx_dynamic_cast_fn_p (tree fndecl)
 {
   return (cxx_dialect >= cxx20
 	  && id_equal (DECL_NAME (fndecl), "__dynamic_cast")
-	  && CP_DECL_CONTEXT (fndecl) == abi_node);
+	  && CP_DECL_CONTEXT (fndecl) == abi_node
+	  /* Only consider implementation-detail __dynamic_cast calls that
+	     correspond to a dynamic_cast, and ignore direct calls to
+	     abi::__dynamic_cast.  */
+	  && DECL_ARTIFICIAL (fndecl));
 }
 
 /* Often, we have an expression in the form of address + offset, e.g.
@@ -3337,10 +3343,10 @@ cxx_eval_call_expression (const constexpr_ctx *ctx, tree t,
 	      && TREE_CODE (new_obj) == COMPONENT_REF
 	      && TREE_CODE (TREE_TYPE (TREE_OPERAND (new_obj, 0))) == UNION_TYPE)
 	    {
+	      tree ctor = build_constructor (TREE_TYPE (new_obj), NULL);
+	      CONSTRUCTOR_NO_CLEARING (ctor) = true;
 	      tree activate = build2 (INIT_EXPR, TREE_TYPE (new_obj),
-				      new_obj,
-				      build_constructor (TREE_TYPE (new_obj),
-							 NULL));
+				      new_obj, ctor);
 	      cxx_eval_constant_expression (ctx, activate,
 					    lval, non_constant_p, overflow_p);
 	      ggc_free (activate);
@@ -4731,6 +4737,16 @@ cxx_eval_component_reference (const constexpr_ctx *ctx, tree t,
     }
 
   /* If there's no explicit init for this field, it's value-initialized.  */
+
+  if (AGGREGATE_TYPE_P (TREE_TYPE (t)))
+    {
+      /* As in cxx_eval_store_expression, insert an empty CONSTRUCTOR
+	 and copy the flags.  */
+      constructor_elt *e = get_or_insert_ctor_field (whole, part);
+      e->value = value = build_constructor (TREE_TYPE (part), NULL);
+      return value;
+    }
+
   value = build_value_init (TREE_TYPE (t), tf_warning_or_error);
   return cxx_eval_constant_expression (ctx, value,
 				       lval,
@@ -5497,6 +5513,9 @@ cxx_eval_vec_init_1 (const constexpr_ctx *ctx, tree atype, tree init,
     return cxx_eval_bare_aggregate (ctx, init, lval,
 				    non_constant_p, overflow_p);
 
+  /* We already checked access when building the VEC_INIT_EXPR.  */
+  deferring_access_check_sentinel acs (dk_deferred);
+
   /* For the default constructor, build up a call to the default
      constructor of the element type.  We only need to handle class types
      here, as for a constructor to be constexpr, all members must be
@@ -9062,6 +9081,17 @@ cxx_eval_outermost_constant_expr (tree t, bool allow_non_constant,
 	r = TARGET_EXPR_INITIAL (r);
     }
 
+  /* uid_sensitive_constexpr_evaluation_value restricts warning-dependent
+     constexpr evaluation to avoid unnecessary template instantiation, and is
+     always done with mce_unknown.  But due to gaps in the restriction logic
+     we may still end up taking an evaluation path that in turn requires
+     manifestly constant evaluation, and such evaluation must not be
+     restricted since it likely has semantic consequences.
+     TODO: Remove/replace the mechanism in GCC 17.  */
+  auto uids = make_temp_override (uid_sensitive_constexpr_evaluation_value);
+  if (ctx.manifestly_const_eval == mce_true)
+    uid_sensitive_constexpr_evaluation_value = false;
+
   auto_vec<tree, 16> cleanups;
   global_ctx.cleanups = &cleanups;
 
--- a/src/gcc/cp/lambda.cc
+++ b/src/gcc/cp/lambda.cc
@@ -1002,12 +1002,9 @@ current_nonlambda_function (void)
 tree
 nonlambda_method_basetype (void)
 {
-  if (!current_class_ref)
-    return NULL_TREE;
-
   tree type = current_class_type;
   if (!type || !LAMBDA_TYPE_P (type))
-    return type;
+    return current_class_ref ? type : NULL_TREE;
 
   while (true)
     {
--- a/src/gcc/cp/mangle.cc
+++ b/src/gcc/cp/mangle.cc
@@ -2160,11 +2160,24 @@ write_real_cst (const tree value)
   int i, limit, dir;
 
   tree type = TREE_TYPE (value);
-  int words = GET_MODE_BITSIZE (SCALAR_FLOAT_TYPE_MODE (type)) / 32;
+  int bits = GET_MODE_BITSIZE (SCALAR_FLOAT_TYPE_MODE (type));
+  int words = bits / 32;
 
   real_to_target (target_real, &TREE_REAL_CST (value),
 		  TYPE_MODE (type));
 
+  if (words == 0)
+    {
+      /* _Float16 and std::bfloat16_t are the only supported types smaller than
+	 32 bits.  */
+      gcc_assert (bits == 16);
+      sprintf (buffer, "%04lx", (unsigned long) target_real[0]);
+      write_chars (buffer, 4);
+      return;
+    }
+
+  gcc_assert (bits % 32 == 0);
+
   /* The value in target_real is in the target word order,
      so we must write it out backward if that happens to be
      little-endian.  write_number cannot be used, it will
--- a/src/gcc/cp/name-lookup.cc
+++ b/src/gcc/cp/name-lookup.cc
@@ -6411,7 +6411,8 @@ handle_namespace_attrs (tree ns, tree attributes)
       tree name = get_attribute_name (d);
       tree args = TREE_VALUE (d);
 
-      if (is_attribute_p ("visibility", name))
+      if (is_attribute_p ("visibility", name)
+	  && args != error_mark_node)
 	{
 	  /* attribute visibility is a property of the syntactic block
 	     rather than the namespace as a whole, so we don't touch the
@@ -6433,7 +6434,8 @@ handle_namespace_attrs (tree ns, tree attributes)
 	  push_visibility (TREE_STRING_POINTER (x), 1);
 	  saw_vis = true;
 	}
-      else if (is_attribute_p ("abi_tag", name))
+      else if (is_attribute_p ("abi_tag", name)
+	       && args != error_mark_node)
 	{
 	  if (!DECL_NAME (ns))
 	    {
@@ -6460,7 +6462,8 @@ handle_namespace_attrs (tree ns, tree attributes)
 	    DECL_ATTRIBUTES (ns) = tree_cons (name, args,
 					      DECL_ATTRIBUTES (ns));
 	}
-      else if (is_attribute_p ("deprecated", name))
+      else if (is_attribute_p ("deprecated", name)
+	       && args != error_mark_node)
 	{
 	  if (!DECL_NAME (ns))
 	    {
--- a/src/gcc/cp/parser.cc
+++ b/src/gcc/cp/parser.cc
@@ -45290,6 +45290,9 @@ substitute_in_tree_walker (tree *tp, int *walk_subtrees ATTRIBUTE_UNUSED,
   else if (TREE_CODE (*tp) == BIND_EXPR
 	   && BIND_EXPR_BODY (*tp) == sit->orig
 	   && !BIND_EXPR_VARS (*tp)
+	   /* BIND_EXPRs in templates likely have NULL BIND_EXPR_VARS,
+	      are created by begin_compound_stmt and are not redundant.  */
+	   && !processing_template_decl
 	   && (sit->flatten || TREE_CODE (sit->repl) == BIND_EXPR))
     {
       *tp = sit->repl;
@@ -45334,7 +45337,12 @@ substitute_in_tree (tree *context, tree orig, tree repl, bool flatten)
   struct sit_data data;
 
   gcc_assert (*context && orig && repl);
-  if (TREE_CODE (repl) == BIND_EXPR && !BIND_EXPR_VARS (repl))
+  /* Look through redundant BIND_EXPR.  BIND_EXPRs in templates likely have
+     NULL BIND_EXPR_VARS, are created by begin_compound_stmt and are not
+     redundant.  */
+  if (TREE_CODE (repl) == BIND_EXPR
+      && !BIND_EXPR_VARS (repl)
+      && !processing_template_decl)
     repl = BIND_EXPR_BODY (repl);
   data.orig = orig;
   data.repl = repl;
@@ -46383,7 +46391,7 @@ cp_parser_omp_taskwait (cp_parser *parser, cp_token *pragma_tok)
   if (clauses)
     {
       tree stmt = make_node (OMP_TASK);
-      TREE_TYPE (stmt) = void_node;
+      TREE_TYPE (stmt) = void_type_node;
       OMP_TASK_CLAUSES (stmt) = clauses;
       OMP_TASK_BODY (stmt) = NULL_TREE;
       SET_EXPR_LOCATION (stmt, pragma_tok->location);
--- a/src/gcc/cp/pt.cc
+++ b/src/gcc/cp/pt.cc
@@ -10990,7 +10990,10 @@ any_template_parm_r (tree t, void *data)
       break;
 
     case TEMPLATE_PARM_INDEX:
-      WALK_SUBTREE (TREE_TYPE (t));
+      /* No need to consider template parameters within the type of an NTTP:
+	 substitution into an NTTP is done directly with the corresponding
+	 template argument, and its type only comes into play earlier during
+	 coercion.  */
       break;
 
     case TEMPLATE_DECL:
@@ -13701,7 +13704,8 @@ tsubst_pack_expansion (tree t, tree args, tsubst_flags_t complain,
 	  /* We can't substitute for this parameter pack.  We use a flag as
 	     well as the missing_level counter because function parameter
 	     packs don't have a level.  */
-	  gcc_assert (processing_template_decl || is_auto (parm_pack));
+	  gcc_assert (processing_template_decl || is_auto (parm_pack)
+		      || args == NULL_TREE);
 	  unsubstituted_packs = true;
 	}
     }
@@ -17227,6 +17231,15 @@ tsubst_baselink (tree baselink, tree object_type,
       bool maybe_incomplete = BASELINK_FUNCTIONS_MAYBE_INCOMPLETE_P (baselink);
       baselink = lookup_fnfields (qualifying_scope, name, /*protect=*/1,
 				  complain);
+      if (!baselink)
+	{
+	  if ((complain & tf_error)
+	      && constructor_name_p (name, qualifying_scope))
+	    error ("cannot call constructor %<%T::%D%> directly",
+		   qualifying_scope, name);
+	  return error_mark_node;
+	}
+
       if (maybe_incomplete)
 	{
 	  /* Filter out from the new lookup set those functions which didn't
@@ -17240,15 +17253,6 @@ tsubst_baselink (tree baselink, tree object_type,
 	  BASELINK_FUNCTIONS_MAYBE_INCOMPLETE_P (baselink) = true;
 	}
 
-      if (!baselink)
-	{
-	  if ((complain & tf_error)
-	      && constructor_name_p (name, qualifying_scope))
-	    error ("cannot call constructor %<%T::%D%> directly",
-		   qualifying_scope, name);
-	  return error_mark_node;
-	}
-
       fns = BASELINK_FUNCTIONS (baselink);
     }
   else
@@ -21714,12 +21718,16 @@ tsubst_expr (tree t, tree args, tsubst_flags_t complain, tree in_decl)
 
     case OFFSET_REF:
       {
-	tree type = tsubst (TREE_TYPE (t), args, complain, in_decl);
+	/* We should only get here for an OFFSET_REF like A::m; a .* in a
+	   template is represented as a DOTSTAR_EXPR.  */
+	gcc_checking_assert
+	  (same_type_p (TREE_TYPE (t), TREE_TYPE (TREE_OPERAND (t, 1))));
 	tree op0 = RECUR (TREE_OPERAND (t, 0));
 	tree op1 = RECUR (TREE_OPERAND (t, 1));
+	tree type = TREE_TYPE (op1);
 	r = build2 (OFFSET_REF, type, op0, op1);
 	PTRMEM_OK_P (r) = PTRMEM_OK_P (t);
-	if (!mark_used (TREE_OPERAND (r, 1), complain)
+	if (!mark_used (op1, complain)
 	    && !(complain & tf_error))
 	  RETURN (error_mark_node);
 	RETURN (r);
@@ -25299,10 +25307,10 @@ unify (tree tparms, tree targs, tree parm, tree arg, int strict,
 			  INNERMOST_TEMPLATE_ARGS (CLASSTYPE_TI_ARGS (parm)),
 			  INNERMOST_TEMPLATE_ARGS (CLASSTYPE_TI_ARGS (t)),
 			  UNIFY_ALLOW_NONE, explain_p);
-	  else
-	    return unify_success (explain_p);
+	  gcc_checking_assert (t == arg);
 	}
-      else if (!same_type_ignoring_top_level_qualifiers_p (parm, arg))
+
+      if (!same_type_ignoring_top_level_qualifiers_p (parm, arg))
 	return unify_type_mismatch (explain_p, parm, arg);
       return unify_success (explain_p);
 
--- a/src/gcc/cp/semantics.cc
+++ b/src/gcc/cp/semantics.cc
@@ -3562,9 +3562,12 @@ finish_compound_literal (tree type, tree compound_literal,
 	  return error_mark_node;
 	}
       else if (cxx_dialect < cxx23)
-	pedwarn (input_location, OPT_Wc__23_extensions,
-		 "%<auto{x}%> only available with "
-		 "%<-std=c++2b%> or %<-std=gnu++2b%>");
+	{
+	  if ((complain & tf_warning_or_error) != 0)
+	    pedwarn (input_location, OPT_Wc__23_extensions,
+		     "%<auto{x}%> only available with "
+		     "%<-std=c++2b%> or %<-std=gnu++2b%>");
+	}
       type = do_auto_deduction (type, compound_literal, type, complain,
 				adc_variable_type);
       if (type == error_mark_node)
@@ -11857,6 +11860,16 @@ finish_static_assert (tree condition, tree message, location_t location,
 	  XDELETEVEC (buf);
 
 	  diagnose_failing_condition (bad, cloc, show_expr_p);
+
+	  /* Suppress -Wreturn-type for functions with failed static_asserts.
+	     Otherwise templates like:
+	     if constexpr (whatever)
+	       return something (args);
+	     else
+	       static_assert (false, "explanation");
+	     get a useless extra -Wreturn-type warning.  */
+	  if (current_function_decl)
+	    suppress_warning (current_function_decl, OPT_Wreturn_type);
 	}
       else if (condition && condition != error_mark_node)
 	{
@@ -11974,12 +11987,16 @@ finish_decltype_type (tree expr, bool id_expression_or_member_access_p,
 	{
 	  if (ptds.saved)
 	    {
-	      gcc_checking_assert (DECL_HAS_VALUE_EXPR_P (expr));
+	      gcc_checking_assert (DECL_HAS_VALUE_EXPR_P (expr)
+				   || (DECL_CONTEXT (expr)
+				       != current_function_decl));
 	      /* DECL_HAS_VALUE_EXPR_P is always set if
-		 processing_template_decl.  If lookup_decomp_type
+		 processing_template_decl at least for structured bindings
+		 within the template.  If lookup_decomp_type
 		 returns non-NULL, it is the tuple case.  */
 	      if (tree ret = lookup_decomp_type (expr))
 		return ret;
+	      gcc_checking_assert (DECL_HAS_VALUE_EXPR_P (expr));
 	    }
 	  if (DECL_HAS_VALUE_EXPR_P (expr))
 	    /* Expr is an array or struct subobject proxy, handle
--- a/src/gcc/cp/tree.cc
+++ b/src/gcc/cp/tree.cc
@@ -424,6 +424,83 @@ non_mergeable_glvalue_p (const_tree ref)
 	  && !(kind & (clk_class|clk_mergeable)));
 }
 
+/* C++-specific version of stabilize_reference for bit-fields and
+   DECL_PACKED fields.  We can't bind a reference to those.  */
+
+static tree
+cp_stabilize_bitfield_reference (tree ref)
+{
+  tree op1, op2, op3;
+  STRIP_ANY_LOCATION_WRAPPER (ref);
+  switch (TREE_CODE (ref))
+    {
+    case VAR_DECL:
+    case PARM_DECL:
+    case RESULT_DECL:
+    CASE_CONVERT:
+    case FLOAT_EXPR:
+    case FIX_TRUNC_EXPR:
+    case INDIRECT_REF:
+    case COMPONENT_REF:
+    case BIT_FIELD_REF:
+    case ARRAY_REF:
+    case ARRAY_RANGE_REF:
+    case ERROR_MARK:
+    case REALPART_EXPR:
+    case IMAGPART_EXPR:
+    default:
+      break;
+    case COMPOUND_EXPR:
+      op2 = cp_stabilize_bitfield_reference (TREE_OPERAND (ref, 1));
+      if (op2 == TREE_OPERAND (ref, 1))
+	return ref;
+      op1 = TREE_OPERAND (ref, 0);
+      if (TREE_SIDE_EFFECTS (op1))
+	{
+	  if (VOID_TYPE_P (TREE_TYPE (op1)))
+	    op1 = save_expr (op1);
+	  else
+	    {
+	      op1 = build2 (COMPOUND_EXPR, void_type_node, op1,
+			    void_node);
+	      op1 = save_expr (op1);
+	    }
+	}
+      return build2 (COMPOUND_EXPR, TREE_TYPE (op2), op1, op2);
+    case COND_EXPR:
+      op1 = TREE_OPERAND (ref, 0);
+      op2 = TREE_OPERAND (ref, 1);
+      op3 = TREE_OPERAND (ref, 2);
+      if (op2 && TREE_CODE (op2) != THROW_EXPR)
+	op2 = cp_stabilize_bitfield_reference (op2);
+      if (TREE_CODE (op3) != THROW_EXPR)
+	op3 = cp_stabilize_bitfield_reference (op3);
+      if (op2 == NULL_TREE)
+	op1 = cp_stabilize_bitfield_reference (op1);
+      if (op1 == TREE_OPERAND (ref, 0)
+	  && op2 == TREE_OPERAND (ref, 1)
+	  && op3 == TREE_OPERAND (ref, 2))
+	return ref;
+      if (op2 != NULL_TREE && TREE_SIDE_EFFECTS (op1))
+	op1 = save_expr (op1);
+      return build3 (COND_EXPR, TREE_TYPE (ref), op1, op2, op3);
+    case PREINCREMENT_EXPR:
+    case PREDECREMENT_EXPR:
+      op1 = cp_stabilize_bitfield_reference (TREE_OPERAND (ref, 0));
+      if (op1 == TREE_OPERAND (ref, 0))
+	return ref;
+      return build2 (COMPOUND_EXPR, TREE_TYPE (ref),
+		     build2 (TREE_CODE (ref), TREE_TYPE (ref), op1,
+			     TREE_OPERAND (ref, 0)), op1);
+    case PAREN_EXPR:
+      op1 = cp_stabilize_bitfield_reference (TREE_OPERAND (ref, 0));
+      if (op1 == TREE_OPERAND (ref, 0))
+	return ref;
+      return build1 (PAREN_EXPR, TREE_TYPE (ref), op1);
+    }
+  return stabilize_reference (ref);
+}
+
 /* C++-specific version of stabilize_reference.  */
 
 tree
@@ -455,6 +532,8 @@ cp_stabilize_reference (tree ref)
       cp_lvalue_kind kind = lvalue_kind (ref);
       if ((kind & ~clk_class) != clk_none)
 	{
+	  if (kind & (clk_bitfield | clk_packed))
+	    return cp_stabilize_bitfield_reference (ref);
 	  tree type = unlowered_expr_type (ref);
 	  bool rval = !!(kind & clk_rvalueref);
 	  type = cp_build_reference_type (type, rval);
@@ -2717,6 +2796,15 @@ cxx_printable_name_internal (tree decl, int v, bool translate)
       /* yes, so return it.  */
       return print_ring[i];
 
+  const char *ret = lang_decl_name (decl, v, translate);
+
+  /* The lang_decl_name call could have called this function recursively,
+     so check again.  */
+  for (i = 0; i < PRINT_RING_SIZE; i++)
+    if (uid_ring[i] == DECL_UID (decl) && translate == trans_ring[i])
+      /* yes, so return it.  */
+      return print_ring[i];
+
   if (++ring_counter == PRINT_RING_SIZE)
     ring_counter = 0;
 
@@ -2736,7 +2824,7 @@ cxx_printable_name_internal (tree decl, int v, bool translate)
 
   free (print_ring[ring_counter]);
 
-  print_ring[ring_counter] = xstrdup (lang_decl_name (decl, v, translate));
+  print_ring[ring_counter] = xstrdup (ret);
   uid_ring[ring_counter] = DECL_UID (decl);
   trans_ring[ring_counter] = translate;
   return print_ring[ring_counter];
--- a/src/gcc/cp/typeck.cc
+++ b/src/gcc/cp/typeck.cc
@@ -305,7 +305,30 @@ cp_compare_floating_point_conversion_ranks (tree t1, tree t2)
 
   const struct real_format *fmt1 = REAL_MODE_FORMAT (TYPE_MODE (t1));
   const struct real_format *fmt2 = REAL_MODE_FORMAT (TYPE_MODE (t2));
-  gcc_assert (fmt1->b == 2 && fmt2->b == 2);
+  /* Currently, extended floating point types are only binary, and
+     they never have a proper subset or superset of values with
+     decimal floating point types except for the _Float16 vs. _Decimal128
+     pair, so return 3 for unordered conversion ranks.  */
+  gcc_assert (fmt1->b == 2);
+  if (fmt2->b == 10)
+    {
+      /* _Float16 needs at most 21 decimal digits (e.g.
+	 0x1.a3cp-14f16 is exactly 0.000100076198577880859375DL),
+	 so it is not a proper subset of _Decimal64 but is subset
+	 of _Decimal128.  While std::bfloat16_t needs at most 96
+	 decimal digits, so even _Decimal128 doesn't cover it.
+	 _Float32 has at least one value which needs 112 decimal
+	 digits, _Float64 at least 767 decimal digits.  */
+      if (fmt1->emin == -13
+	  && fmt1->emax == 16
+	  && fmt1->p == 11
+	  && fmt2->emin == -6142
+	  && fmt2->emax == 6145
+	  && fmt2->p == 34)
+	return -2;
+      return 3;
+    }
+  gcc_assert (fmt2->b == 2);
   /* For {ibm,mips}_extended_format formats, the type has variable
      precision up to ~2150 bits when the first double is around maximum
      representable double and second double is subnormal minimum.
@@ -3967,13 +3990,129 @@ cp_build_array_ref (location_t loc, tree array, tree idx,
       }
 
     case COND_EXPR:
-      ret = build_conditional_expr
-	       (loc, TREE_OPERAND (array, 0),
-	       cp_build_array_ref (loc, TREE_OPERAND (array, 1), idx,
-				   complain),
-	       cp_build_array_ref (loc, TREE_OPERAND (array, 2), idx,
-				   complain),
-	       complain);
+      tree op0, op1, op2;
+      op0 = TREE_OPERAND (array, 0);
+      op1 = TREE_OPERAND (array, 1);
+      op2 = TREE_OPERAND (array, 2);
+      if (TREE_SIDE_EFFECTS (idx) || !tree_invariant_p (idx))
+	{
+	  /* If idx could possibly have some SAVE_EXPRs, turning
+	     (op0 ? op1 : op2)[idx] into
+	     op0 ? op1[idx] : op2[idx] can lead into temporaries
+	     initialized in one conditional path and uninitialized
+	     uses of them in the other path.
+	     And if idx is a really large expression, evaluating it
+	     twice is also not optimal.
+	     On the other side, op0 must be sequenced before evaluation
+	     of op1 and op2 and for C++17 op0, op1 and op2 must be
+	     sequenced before idx.
+	     If idx is INTEGER_CST, we can just do the optimization
+	     without any SAVE_EXPRs, if op1 and op2 are both ARRAY_TYPE
+	     VAR_DECLs or COMPONENT_REFs thereof (so their address
+	     is constant or relative to frame), optimize into
+	     (SAVE_EXPR <op0>, SAVE_EXPR <idx>, SAVE_EXPR <op0>)
+	     ? op1[SAVE_EXPR <idx>] : op2[SAVE_EXPR <idx>]
+	     Otherwise avoid this optimization.  */
+	  if (flag_strong_eval_order == 2)
+	    {
+	      if (TREE_CODE (TREE_TYPE (array)) == ARRAY_TYPE)
+		{
+		  tree xop1 = op1;
+		  tree xop2 = op2;
+		  while (xop1 && handled_component_p (xop1))
+		    {
+		      switch (TREE_CODE (xop1))
+			{
+			case ARRAY_REF:
+			case ARRAY_RANGE_REF:
+			  if (!tree_invariant_p (TREE_OPERAND (xop1, 1))
+			      || TREE_OPERAND (xop1, 2) != NULL_TREE
+			      || TREE_OPERAND (xop1, 3) != NULL_TREE)
+			    {
+			      xop1 = NULL_TREE;
+			      continue;
+			    }
+			  break;
+
+			case COMPONENT_REF:
+			  if (TREE_OPERAND (xop1, 2) != NULL_TREE)
+			    {
+			      xop1 = NULL_TREE;
+			      continue;
+			    }
+			  break;
+
+			default:
+			  break;
+			}
+		      xop1 = TREE_OPERAND (xop1, 0);
+		    }
+		  if (xop1)
+		    STRIP_ANY_LOCATION_WRAPPER (xop1);
+		  while (xop2 && handled_component_p (xop2))
+		    {
+		      switch (TREE_CODE (xop2))
+			{
+			case ARRAY_REF:
+			case ARRAY_RANGE_REF:
+			  if (!tree_invariant_p (TREE_OPERAND (xop2, 1))
+			      || TREE_OPERAND (xop2, 2) != NULL_TREE
+			      || TREE_OPERAND (xop2, 3) != NULL_TREE)
+			    {
+			      xop2 = NULL_TREE;
+			      continue;
+			    }
+			  break;
+
+			case COMPONENT_REF:
+			  if (TREE_OPERAND (xop2, 2) != NULL_TREE)
+			    {
+			      xop2 = NULL_TREE;
+			      continue;
+			    }
+			  break;
+
+			default:
+			  break;
+			}
+		      xop2 = TREE_OPERAND (xop2, 0);
+		    }
+		  if (xop2)
+		    STRIP_ANY_LOCATION_WRAPPER (xop2);
+
+		  if (!xop1
+		      || !xop2
+		      || !(CONSTANT_CLASS_P (xop1)
+			   || decl_address_invariant_p (xop1))
+		      || !(CONSTANT_CLASS_P (xop2)
+			   || decl_address_invariant_p (xop2)))
+		    {
+		      /* Force default conversion on array if
+			 we can't optimize this and array is ARRAY_TYPE
+			 COND_EXPR, we can't leave COND_EXPRs with
+			 ARRAY_TYPE in the IL.  */
+		      array = cp_default_conversion (array, complain);
+		      if (error_operand_p (array))
+			return error_mark_node;
+		      break;
+		    }
+		}
+	      else if (!POINTER_TYPE_P (TREE_TYPE (array))
+		       || !tree_invariant_p (op1)
+		       || !tree_invariant_p (op2))
+		break;
+	    }
+	  if (TREE_SIDE_EFFECTS (idx))
+	    {
+	      idx = save_expr (idx);
+	      op0 = save_expr (op0);
+	      tree tem = build_compound_expr (loc, op0, idx);
+	      op0 = build_compound_expr (loc, tem, op0);
+	    }
+	}
+      op1 = cp_build_array_ref (loc, op1, idx, complain);
+      op2 = cp_build_array_ref (loc, op2, idx, complain);
+      ret = build_conditional_expr (loc, op0, op1, op2, complain);
       protected_set_expr_location (ret, loc);
       return ret;
 
--- a/src/gcc/cp/typeck2.cc
+++ b/src/gcc/cp/typeck2.cc
@@ -2469,9 +2469,12 @@ build_functional_cast_1 (location_t loc, tree exp, tree parms,
 	      return error_mark_node;
 	    }
 	  else if (cxx_dialect < cxx23)
-	    pedwarn (loc, OPT_Wc__23_extensions,
-		     "%<auto(x)%> only available with "
-		     "%<-std=c++2b%> or %<-std=gnu++2b%>");
+	    {
+	      if ((complain & tf_warning_or_error) != 0)
+		pedwarn (loc, OPT_Wc__23_extensions,
+			 "%<auto(x)%> only available with "
+			 "%<-std=c++2b%> or %<-std=gnu++2b%>");
+	    }
 	}
       else
 	{
--- a/src/gcc/cselib.cc
+++ b/src/gcc/cselib.cc
@@ -33,6 +33,7 @@ along with GCC; see the file COPYING3.  If not see
 #include "cselib.h"
 #include "function-abi.h"
 #include "alias.h"
+#include "predict.h"
 
 /* A list of cselib_val structures.  */
 struct elt_list
@@ -248,8 +249,9 @@ static unsigned int *used_regs;
 static unsigned int n_used_regs;
 
 /* We pass this to cselib_invalidate_mem to invalidate all of
-   memory for a non-const call instruction.  */
-static GTY(()) rtx callmem;
+   memory for a non-const call instruction and memory below stack pointer
+   for const/pure calls.  */
+static GTY(()) rtx callmem[2];
 
 /* Set by discard_useless_locs if it deleted the last location of any
    value.  */
@@ -808,7 +810,7 @@ cselib_preserve_only_values (void)
   for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
     cselib_invalidate_regno (i, reg_raw_mode[i]);
 
-  cselib_invalidate_mem (callmem);
+  cselib_invalidate_mem (callmem[0]);
 
   remove_useless_values ();
 
@@ -2600,6 +2602,8 @@ cselib_invalidate_mem (rtx mem_rtx)
       struct elt_loc_list **p = &v->locs;
       bool had_locs = v->locs != NULL;
       rtx_insn *setting_insn = v->locs ? v->locs->setting_insn : NULL;
+      rtx sp_base = NULL_RTX;
+      HOST_WIDE_INT sp_off = 0;
 
       while (*p)
 	{
@@ -2614,6 +2618,114 @@ cselib_invalidate_mem (rtx mem_rtx)
 	      p = &(*p)->next;
 	      continue;
 	    }
+
+	  /* When invalidating memory below the stack pointer for const/pure
+	     calls and alloca/VLAs aren't used, attempt to optimize.  Values
+	     stored into area sometimes below the stack pointer shouldn't be
+	     addressable and should be stored just through stack pointer
+	     derived expressions, so don't invalidate MEMs not using stack
+	     derived addresses, or if the MEMs clearly aren't below the stack
+	     pointer.  This isn't a fully conservative approach, the hope is
+	     that invalidating more MEMs than this isn't actually needed.  */
+	  if (mem_rtx == callmem[1]
+	      && num_mems < param_max_cselib_memory_locations
+	      && GET_CODE (XEXP (x, 0)) == VALUE
+	      && !cfun->calls_alloca)
+	    {
+	      cselib_val *v2 = CSELIB_VAL_PTR (XEXP (x, 0));
+	      rtx x_base = NULL_RTX;
+	      HOST_WIDE_INT x_off = 0;
+	      if (SP_DERIVED_VALUE_P (v2->val_rtx))
+		x_base = v2->val_rtx;
+	      else
+		for (struct elt_loc_list *l = v2->locs; l; l = l->next)
+		  if (GET_CODE (l->loc) == PLUS
+		      && GET_CODE (XEXP (l->loc, 0)) == VALUE
+		      && SP_DERIVED_VALUE_P (XEXP (l->loc, 0))
+		      && CONST_INT_P (XEXP (l->loc, 1)))
+		    {
+		      x_base = XEXP (l->loc, 0);
+		      x_off = INTVAL (XEXP (l->loc, 1));
+		      break;
+		    }
+	      /* If x_base is NULL here, don't invalidate x as its address
+		 isn't derived from sp such that it could be in outgoing
+		 argument area of some call in !ACCUMULATE_OUTGOING_ARGS
+		 function.  */
+	      if (x_base)
+		{
+		  if (sp_base == NULL_RTX)
+		    {
+		      if (cselib_val *v3
+			  = cselib_lookup_1 (stack_pointer_rtx, Pmode, 0,
+					     VOIDmode))
+			{
+			  if (SP_DERIVED_VALUE_P (v3->val_rtx))
+			    sp_base = v3->val_rtx;
+			  else
+			    for (struct elt_loc_list *l = v3->locs;
+				 l; l = l->next)
+			      if (GET_CODE (l->loc) == PLUS
+				  && GET_CODE (XEXP (l->loc, 0)) == VALUE
+				  && SP_DERIVED_VALUE_P (XEXP (l->loc, 0))
+				  && CONST_INT_P (XEXP (l->loc, 1)))
+				{
+				  sp_base = XEXP (l->loc, 0);
+				  sp_off = INTVAL (XEXP (l->loc, 1));
+				  break;
+				}
+			}
+		      if (sp_base == NULL_RTX)
+			sp_base = pc_rtx;
+		    }
+		  /* Otherwise, if x_base and sp_base are the same,
+		     we know that x_base + x_off is the x's address and
+		     sp_base + sp_off is current value of stack pointer,
+		     so try to determine if x is certainly not below stack
+		     pointer.  */
+		  if (sp_base == x_base)
+		    {
+		      if (STACK_GROWS_DOWNWARD)
+			{
+			  HOST_WIDE_INT off = sp_off;
+#ifdef STACK_ADDRESS_OFFSET
+			  /* On SPARC take stack pointer bias into account as
+			     well.  */
+			  off += (STACK_ADDRESS_OFFSET
+				  - FIRST_PARM_OFFSET (current_function_decl));
+#endif
+			  if (x_off >= off)
+			    /* x is at or above the current stack pointer,
+			       no need to invalidate it.  */
+			    x_base = NULL_RTX;
+			}
+		      else
+			{
+			  HOST_WIDE_INT sz;
+			  enum machine_mode mode = GET_MODE (x);
+			  if ((MEM_SIZE_KNOWN_P (x)
+			       && MEM_SIZE (x).is_constant (&sz))
+			      || (mode != BLKmode
+				  && GET_MODE_SIZE (mode).is_constant (&sz)))
+			    if (x_off < sp_off
+				&& ((HOST_WIDE_INT) ((unsigned HOST_WIDE_INT)
+						     x_off + sz) <= sp_off))
+			      /* x's end is below or at the current stack
+				 pointer in !STACK_GROWS_DOWNWARD target,
+				 no need to invalidate it.  */
+			      x_base = NULL_RTX;
+			 }
+		    }
+		}
+	      if (x_base == NULL_RTX)
+		{
+		  has_mem = true;
+		  num_mems++;
+		  p = &(*p)->next;
+		  continue;
+		}
+	    }
+
 	  if (num_mems < param_max_cselib_memory_locations
 	      && ! canon_anti_dependence (x, false, mem_rtx,
 					  GET_MODE (mem_rtx), mem_addr))
@@ -3166,14 +3278,24 @@ cselib_process_insn (rtx_insn *insn)
 	 as if they were regular functions.  */
       if (RTL_LOOPING_CONST_OR_PURE_CALL_P (insn)
 	  || !(RTL_CONST_OR_PURE_CALL_P (insn)))
-	cselib_invalidate_mem (callmem);
+	cselib_invalidate_mem (callmem[0]);
       else
-	/* For const/pure calls, invalidate any argument slots because
-	   they are owned by the callee.  */
-	for (x = CALL_INSN_FUNCTION_USAGE (insn); x; x = XEXP (x, 1))
-	  if (GET_CODE (XEXP (x, 0)) == USE
-	      && MEM_P (XEXP (XEXP (x, 0), 0)))
-	    cselib_invalidate_mem (XEXP (XEXP (x, 0), 0));
+	{
+	  /* For const/pure calls, invalidate any argument slots because
+	     they are owned by the callee.  */
+	  for (x = CALL_INSN_FUNCTION_USAGE (insn); x; x = XEXP (x, 1))
+	    if (GET_CODE (XEXP (x, 0)) == USE
+		&& MEM_P (XEXP (XEXP (x, 0), 0)))
+	      cselib_invalidate_mem (XEXP (XEXP (x, 0), 0));
+	  /* And invalidate memory below the stack (or above for
+	     !STACK_GROWS_DOWNWARD), as even const/pure call can invalidate
+	     that.  Do this only if !ACCUMULATE_OUTGOING_ARGS or if
+	     cfun->calls_alloca, otherwise the stack pointer shouldn't be
+	     changing in the middle of the function and nothing should be
+	     stored below the stack pointer.  */
+	  if (!ACCUMULATE_OUTGOING_ARGS || cfun->calls_alloca)
+	    cselib_invalidate_mem (callmem[1]);
+	}
     }
 
   cselib_record_sets (insn);
@@ -3226,8 +3348,31 @@ cselib_init (int record_what)
 
   /* (mem:BLK (scratch)) is a special mechanism to conflict with everything,
      see canon_true_dependence.  This is only created once.  */
-  if (! callmem)
-    callmem = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (VOIDmode));
+  if (! callmem[0])
+    callmem[0] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (VOIDmode));
+  /* Similarly create a MEM representing roughly everything below
+     the stack for STACK_GROWS_DOWNWARD targets or everything above
+     it otherwise.  Do this only when !ACCUMULATE_OUTGOING_ARGS or
+     if cfun->calls_alloca, otherwise the stack pointer shouldn't be
+     changing in the middle of the function and nothing should be stored
+     below the stack pointer.  */
+  if (!callmem[1] && (!ACCUMULATE_OUTGOING_ARGS || cfun->calls_alloca))
+    {
+      if (STACK_GROWS_DOWNWARD)
+	{
+	  unsigned HOST_WIDE_INT off = -(GET_MODE_MASK (Pmode) >> 1);
+#ifdef STACK_ADDRESS_OFFSET
+	  /* On SPARC take stack pointer bias into account as well.  */
+	  off += (STACK_ADDRESS_OFFSET
+		  - FIRST_PARM_OFFSET (current_function_decl));
+#endif
+	  callmem[1] = plus_constant (Pmode, stack_pointer_rtx, off);
+	}
+      else
+	callmem[1] = stack_pointer_rtx;
+      callmem[1] = gen_rtx_MEM (BLKmode, callmem[1]);
+      set_mem_size (callmem[1], GET_MODE_MASK (Pmode) >> 1);
+    }
 
   cselib_nregs = max_reg_num ();
 
--- a/src/gcc/d/ChangeLog
+++ b/src/gcc/d/ChangeLog
@@ -1,3 +1,109 @@
+2026-02-08  Iain Buclaw  <ibuclaw@gdcproject.org>
+
+	Backported from master:
+	2026-02-08  Iain Buclaw  <ibuclaw@gdcproject.org>
+
+	PR d/124026
+	* expr.cc (ExprVisitor::visit (FuncExp *)): Always convert function
+	literal to a delegate if the expression expects one.
+
+2026-01-30  Iain Buclaw  <ibuclaw@gdcproject.org>
+
+	Backported from master:
+	2026-01-30  Iain Buclaw  <ibuclaw@gdcproject.org>
+
+	PR d/123264
+	* types.cc (finish_aggregate_type): Propagate struct TYPE_NAME to all
+	TYPE_NEXT_VARIANT types.
+
+2026-01-29  Iain Buclaw  <ibuclaw@gdcproject.org>
+
+	Backported from master:
+	2026-01-29  Iain Buclaw  <ibuclaw@gdcproject.org>
+
+	PR d/123407
+	* decl.cc (get_symbol_decl): Handle declarations with matching
+	assembler names, but different TREE_CODE.
+
+2026-01-29  Iain Buclaw  <ibuclaw@gdcproject.org>
+
+	Backported from master:
+	2026-01-29  Iain Buclaw  <ibuclaw@gdcproject.org>
+
+	PR d/123046
+	* d-codegen.cc (build_address): Return `null' when generating the
+	address of a `noreturn' declaration.
+	(d_build_call): Compare TYPE_MAIN_VARIANT of type with `noreturn'.
+	* decl.cc (get_fndecl_arguments): Likewise.
+	* types.cc (finish_aggregate_mode): Likewise.
+	(TypeVisitor::visit (TypeFunction *)): Likewise.
+
+2026-01-29  Iain Buclaw  <ibuclaw@gdcproject.org>
+
+	Backported from master:
+	2026-01-29  Iain Buclaw  <ibuclaw@gdcproject.org>
+
+	PR d/123349
+	* d-spec.cc (lang_specific_driver): Use xstrdup to copy -defaultlib
+	and -debuglib argument, and unconditionally free the old value.
+
+2026-01-28  Iain Buclaw  <ibuclaw@gdcproject.org>
+
+	Backported from master:
+	2025-04-15  Iain Buclaw  <ibuclaw@gdcproject.org>
+
+	PR d/119799
+	* decl.cc (DeclVisitor::visit (VarDeclaration *)): Check front-end
+	type size before building the VAR_DECL.  Allow C symbols to have a
+	size of `0'.
+
+2026-01-28  Iain Buclaw  <ibuclaw@gdcproject.org>
+
+	Backported from master:
+	2026-01-28  Iain Buclaw  <ibuclaw@gdcproject.org>
+
+	PR d/123419
+	* expr.cc (ExprVisitor::visit (VarExp *)): Adjust assertion.
+
+2026-01-28  Iain Buclaw  <ibuclaw@gdcproject.org>
+
+	Backported from master:
+	2026-01-28  Iain Buclaw  <ibuclaw@gdcproject.org>
+
+	PR d/123798
+	* types.cc (insert_aggregate_bitfield): Set DECL_NONADDRESSABLE_P and
+	DECL_PADDING_P on bit-field decls.
+	(finish_aggregate_type): Pass the aligned bit offset to layout_decl.
+
+2026-01-28  Iain Buclaw  <ibuclaw@gdcproject.org>
+
+	Backported from master:
+	2026-01-28  Iain Buclaw  <ibuclaw@gdcproject.org>
+
+	PR d/121477
+	* d-codegen.cc (d_mark_addressable): Give an error if taking the
+	address of a DECL_BIT_FIELD.
+
+2026-01-28  Iain Buclaw  <ibuclaw@gdcproject.org>
+
+	Backported from master:
+	2026-01-28  Iain Buclaw  <ibuclaw@gdcproject.org>
+
+	PR d/123422
+	* expr.cc (ExprVisitor::visit (ArrayLiteralExp *)): Don't add
+	TARGET_EXPR around constructor.
+	* toir.cc (IRVisitor::visit (ReturnStatement *)): Recognize more
+	patterns for return value optimization.
+
+2026-01-27  Iain Buclaw  <ibuclaw@gdcproject.org>
+
+	Backported from master:
+	2026-01-27  Iain Buclaw  <ibuclaw@gdcproject.org>
+
+	PR d/120096
+	* expr.cc (ExprVisitor::visit (ArrayLiteralExp *)): Include saved side
+	effects in expression result.
+
 2025-05-23  Release Manager
 
 	* GCC 14.3.0 released.
--- a/src/gcc/d/d-codegen.cc
+++ b/src/gcc/d/d-codegen.cc
@@ -665,6 +665,11 @@ build_address (tree exp)
   if (TREE_CODE (exp) == CONST_DECL)
     exp = DECL_INITIAL (exp);
 
+  /* Type `noreturn' has no storage, return `null' for the expression.  */
+  if (DECL_P (exp) && TREE_CODE (exp) != FIELD_DECL
+      && TYPE_MAIN_VARIANT (TREE_TYPE (exp)) == noreturn_type_node)
+    return compound_expr (init, null_pointer_node);
+
   /* Some expression lowering may request an address of a compile-time constant,
      or other non-lvalue expression.  Make sure it is assigned to a location we
      can reference.  */
@@ -704,8 +709,12 @@ d_mark_addressable (tree exp, bool complain)
 {
   switch (TREE_CODE (exp))
     {
-    case ADDR_EXPR:
     case COMPONENT_REF:
+      if (complain && DECL_BIT_FIELD (TREE_OPERAND (exp, 1)))
+	error ("cannot take address of bit-field %qD", TREE_OPERAND (exp, 1));
+
+      /* Fall through.  */
+    case ADDR_EXPR:
     case ARRAY_REF:
     case REALPART_EXPR:
     case IMAGPART_EXPR:
@@ -2298,7 +2307,7 @@ d_build_call (TypeFunction *tf, tree callable, tree object,
 
 	  /* Type `noreturn` is a terminator, as no other arguments can possibly
 	     be evaluated after it.  */
-	  if (TREE_TYPE (targ) == noreturn_type_node)
+	  if (TYPE_MAIN_VARIANT (TREE_TYPE (targ)) == noreturn_type_node)
 	    noreturn_call = true;
 
 	  vec_safe_push (args, targ);
@@ -2318,7 +2327,12 @@ d_build_call (TypeFunction *tf, tree callable, tree object,
       unsigned int ix;
 
       FOR_EACH_VEC_SAFE_ELT (args, ix, arg)
-	saved_args = compound_expr (saved_args, arg);
+	{
+	  saved_args = compound_expr (saved_args, arg);
+
+	  if (TYPE_MAIN_VARIANT (TREE_TYPE (arg)) == noreturn_type_node)
+	    break;
+	}
 
       /* Add a stub result type for the expression.  */
       tree result = build_zero_cst (TREE_TYPE (ctype));
--- a/src/gcc/d/d-spec.cc
+++ b/src/gcc/d/d-spec.cc
@@ -162,24 +162,20 @@ lang_specific_driver (cl_decoded_option **in_decoded_options,
 	  break;
 
 	case OPT_defaultlib_:
-	  if (defaultlib != NULL)
-	    free (CONST_CAST (char *, defaultlib));
+	  free (CONST_CAST (char *, defaultlib));
 	  if (arg != NULL)
 	    {
 	      args[i] |= SKIPOPT;
-	      defaultlib = XNEWVEC (char, strlen (arg));
-	      strcpy (CONST_CAST (char *, defaultlib), arg);
+	      defaultlib = xstrdup (arg);
 	    }
 	  break;
 
 	case OPT_debuglib_:
-	  if (debuglib != NULL)
-	    free (CONST_CAST (char *, debuglib));
+	  free (CONST_CAST (char *, debuglib));
 	  if (arg != NULL)
 	    {
 	      args[i] |= SKIPOPT;
-	      debuglib = XNEWVEC (char, strlen (arg));
-	      strcpy (CONST_CAST (char *, debuglib), arg);
+	      debuglib = xstrdup (arg);
 	    }
 	  break;
 
--- a/src/gcc/d/decl.cc
+++ b/src/gcc/d/decl.cc
@@ -183,7 +183,7 @@ get_fndecl_arguments (FuncDeclaration *decl)
 
 	  /* Type `noreturn` is a terminator, as no other arguments can possibly
 	     be evaluated after it.  */
-	  if (TREE_TYPE (parm_decl) == noreturn_type_node)
+	  if (TYPE_MAIN_VARIANT (TREE_TYPE (parm_decl)) == noreturn_type_node)
 	    break;
 
 	  /* Chain them in the correct order.  */
@@ -792,6 +792,12 @@ public:
       }
     else if (d->isDataseg ())
       {
+	/* When the front-end type size is invalid, an error has already been
+	   given for the declaration or type.  */
+	dinteger_t size = d->type->size (d->loc);
+	if (size == SIZE_INVALID)
+	  return;
+
 	tree decl = get_symbol_decl (d);
 
 	/* Only need to build the VAR_DECL for extern declarations.  */
@@ -805,9 +811,7 @@ public:
 	  return;
 
 	/* How big a symbol can be should depend on back-end.  */
-	tree size = build_integer_cst (d->type->size (d->loc),
-				       build_ctype (Type::tsize_t));
-	if (!valid_constant_size_p (size))
+	if (!valid_constant_size_p (build_integer_cst (size, size_type_node)))
 	  {
 	    error_at (make_location_t (d->loc), "size is too large");
 	    return;
@@ -836,8 +840,9 @@ public:
 	  }
 
 	/* Frontend should have already caught this.  */
-	gcc_assert (!integer_zerop (size)
-		    || d->type->toBasetype ()->isTypeSArray ());
+	gcc_assert ((size != 0 && size != SIZE_INVALID)
+		    || d->type->toBasetype ()->isTypeSArray ()
+		    || d->isCsymbol ());
 
 	d_finish_decl (decl);
 
@@ -1209,8 +1214,7 @@ get_symbol_decl (Declaration *decl)
 
   /* Deal with placeholder symbols immediately:
      SymbolDeclaration is used as a shell around an initializer symbol.  */
-  SymbolDeclaration *sd = decl->isSymbolDeclaration ();
-  if (sd)
+  if (SymbolDeclaration *sd = decl->isSymbolDeclaration ())
     {
       decl->csym = aggregate_initializer_decl (sd->dsym);
       return decl->csym;
@@ -1221,8 +1225,7 @@ get_symbol_decl (Declaration *decl)
     return get_typeinfo_decl ((TypeInfoDeclaration *) decl);
 
   /* FuncAliasDeclaration is used to import functions from another scope.  */
-  FuncAliasDeclaration *fad = decl->isFuncAliasDeclaration ();
-  if (fad)
+  if (FuncAliasDeclaration *fad = decl->isFuncAliasDeclaration ())
     {
       decl->csym = get_symbol_decl (fad->funcalias);
       return decl->csym;
@@ -1257,8 +1260,7 @@ get_symbol_decl (Declaration *decl)
     }
 
   /* Build the tree for the symbol.  */
-  FuncDeclaration *fd = decl->isFuncDeclaration ();
-  if (fd)
+  if (FuncDeclaration *fd = decl->isFuncDeclaration ())
     {
       /* Run full semantic on functions we need to know about.  */
       if (!dmd::functionSemantic (fd))
@@ -1350,29 +1352,38 @@ get_symbol_decl (Declaration *decl)
       if (IDENTIFIER_DSYMBOL (mangled_name))
 	{
 	  Declaration *other = IDENTIFIER_DSYMBOL (mangled_name);
-	  tree olddecl = decl->csym;
-	  decl->csym = get_symbol_decl (other);
-
-	  /* Update the symbol location to the current definition.  */
-	  if (DECL_EXTERNAL (decl->csym) && !DECL_INITIAL (decl->csym))
-	    DECL_SOURCE_LOCATION (decl->csym) = DECL_SOURCE_LOCATION (olddecl);
+	  tree newdecl = decl->csym;
+	  tree olddecl = get_symbol_decl (other);
 
-	  /* The current declaration is a prototype or marked extern, merge
-	     applied user attributes and return.  */
-	  if (DECL_EXTERNAL (olddecl) && !DECL_INITIAL (olddecl))
+	  if (TREE_CODE (olddecl) == TREE_CODE (newdecl))
 	    {
-	      apply_user_attributes (decl, decl->csym);
-	      return decl->csym;
-	    }
-	  /* The previous declaration is a prototype or marked extern, set the
-	     current declaration as the main reference of the symbol.  */
-	  else if (DECL_EXTERNAL (decl->csym) && !DECL_INITIAL (decl->csym))
-	    {
-	      IDENTIFIER_DSYMBOL (mangled_name) = decl;
-	      DECL_EXTERNAL (decl->csym) = 0;
+	      /* Update the symbol location to the current definition.  */
+	      if (DECL_EXTERNAL (olddecl) && !DECL_INITIAL (olddecl))
+		DECL_SOURCE_LOCATION (olddecl) = DECL_SOURCE_LOCATION (newdecl);
+
+	      /* The current declaration is a prototype or marked extern, merge
+		 applied user attributes and return.  */
+	      if (DECL_EXTERNAL (newdecl) && !DECL_INITIAL (newdecl))
+		{
+		  apply_user_attributes (decl, olddecl);
+		  decl->csym = olddecl;
+		  return decl->csym;
+		}
+	      /* The previous declaration is a prototype or marked extern, set
+		 the current declaration as the main reference of the symbol.
+	       */
+	      else if (DECL_EXTERNAL (olddecl) && !DECL_INITIAL (olddecl))
+		{
+		  IDENTIFIER_DSYMBOL (mangled_name) = decl;
+		  decl->csym = olddecl;
+		  DECL_EXTERNAL (decl->csym) = 0;
+		}
+	      /* Non-extern, non-templated decls shouldn't be defined twice.  */
+	      else if (!decl->isInstantiated ())
+		ScopeDsymbol::multiplyDefined (decl->loc, decl, other);
 	    }
-	  /* Non-extern, non-templated decls shouldn't be defined twice.  */
-	  else if (!decl->isInstantiated ())
+	  /* Declarations are for conflicting kinds of symbol.  */
+	  else
 	    ScopeDsymbol::multiplyDefined (decl->loc, decl, other);
 	}
       else
@@ -1414,6 +1425,9 @@ get_symbol_decl (Declaration *decl)
     }
   else if (TREE_CODE (decl->csym) == FUNCTION_DECL)
     {
+      FuncDeclaration *fd = decl->isFuncDeclaration ();
+      gcc_assert (fd != NULL);
+
       /* Dual-context functions require the code generation to build an array
 	 for the context pointer of the function, making the delicate task of
 	 tracking which context to follow when encountering a non-local symbol,
@@ -1567,6 +1581,7 @@ get_symbol_decl (Declaration *decl)
   if (decl->isDataseg () || decl->isCodeseg () || decl->isThreadlocal ())
     {
       /* Set TREE_PUBLIC by default, but allow private template to override.  */
+      FuncDeclaration *fd = decl->isFuncDeclaration ();
       if (!fd || !fd->isNested ())
 	TREE_PUBLIC (decl->csym) = 1;
 
--- a/src/gcc/d/expr.cc
+++ b/src/gcc/d/expr.cc
@@ -2032,27 +2032,31 @@ public:
     /* Compile the declaration.  */
     build_lambda_tree (e->fd, e->type->toBasetype ());
 
-    /* If nested, this will be a trampoline.  */
-    if (e->fd->isNested ())
-      {
-	tree func = build_address (get_symbol_decl (e->fd));
-	tree object;
+    tree func = build_address (get_symbol_decl (e->fd));
+    Type *tb = e->type->toBasetype ();
 
-	if (this->constp_)
+    /* If a delegate is expected, the literal will be inferred as a delegate
+       even if it accesses no variables from an enclosing function.  */
+    if (tb->ty == TY::Tdelegate)
+      {
+	/* Static delegate variables have no context pointer.  */
+	if (this->constp_ || !e->fd->isNested ())
 	  {
-	    /* Static delegate variables have no context pointer.  */
-	    object = null_pointer_node;
-	    this->result_ = build_method_call (func, object, e->fd->type);
+	    this->result_ = build_method_call (func, null_pointer_node,
+					       e->fd->type);
 	    TREE_CONSTANT (this->result_) = 1;
 	  }
 	else
 	  {
-	    object = get_frame_for_symbol (e->fd);
+	    gcc_assert (e->fd->isNested ());
+	    tree object = get_frame_for_symbol (e->fd);
 	    this->result_ = build_method_call (func, object, e->fd->type);
 	  }
       }
     else
       {
+	/* The function literal is a function pointer.  */
+	gcc_assert (tb->ty == TY::Tpointer);
 	this->result_ = build_nop (build_ctype (e->type),
 				   build_address (get_symbol_decl (e->fd)));
       }
@@ -2172,7 +2176,7 @@ public:
 	      {
 		/* Generate a slice for non-zero initialized aggregates,
 		   otherwise create an empty array.  */
-		gcc_assert (e->type->isConst ()
+		gcc_assert (e->type->nextOf ()->isConst ()
 			    && e->type->nextOf ()->ty == TY::Tvoid);
 
 		tree type = build_ctype (e->type);
@@ -2680,8 +2684,9 @@ public:
 	/* Array literal for a `scope' dynamic array.  */
 	gcc_assert (tb->ty == TY::Tarray);
 	ctor = force_target_expr (ctor);
-	this->result_ = d_array_value (type, size_int (e->elements->length),
-				       build_address (ctor));
+	ctor = d_array_value (type, size_int (e->elements->length),
+			      build_address (ctor));
+	this->result_ = compound_expr (saved_elems, ctor);
       }
     else
       {
--- a/src/gcc/d/toir.cc
+++ b/src/gcc/d/toir.cc
@@ -1022,41 +1022,64 @@ public:
 	/* Detect a call to a constructor function, or if returning a struct
 	   literal, write result directly into the return value.  */
 	StructLiteralExp *sle = NULL;
+	DeclarationExp *de = NULL;
+	VarExp *ve = NULL;
 	bool using_rvo_p = false;
 
 	if (DotVarExp *dve = (s->exp->isCallExp ()
 			      ? s->exp->isCallExp ()->e1->isDotVarExp ()
 			      : NULL))
 	  {
+	    /* Look for `var.__ctor(copytmp = {}, &copytmp)'  */
 	    if (dve->var->isCtorDeclaration ())
 	      {
 		if (CommaExp *ce = dve->e1->isCommaExp ())
 		  {
-		    /* Temporary initialized inside a return expression, and
-		       used as the return value.  Replace it with the hidden
-			reference to allow RVO return.  */
-		    DeclarationExp *de = ce->e1->isDeclarationExp ();
-		    VarExp *ve = ce->e2->isVarExp ();
-		    if (de != NULL && ve != NULL
-			&& ve->var == de->declaration
-			&& ve->var->storage_class & STCtemp)
-		      {
-			tree var = get_symbol_decl (ve->var);
-			TREE_ADDRESSABLE (var) = 1;
-			SET_DECL_VALUE_EXPR (var, decl);
-			DECL_HAS_VALUE_EXPR_P (var) = 1;
-			SET_DECL_LANG_NRVO (var, this->func_->shidden);
-			using_rvo_p = true;
-		      }
+		    de = ce->e1->isDeclarationExp ();
+		    ve = ce->e2->isVarExp ();
 		  }
 		else
 		  sle = dve->e1->isStructLiteralExp ();
 	      }
 	  }
+	else if (CommaExp *ce1 = s->exp->isCommaExp ())
+	  {
+	    /* Look for `copytmp = {}, copytmp.__ctor(), copytmp'  */
+	    if (CommaExp *ce2 = ce1->e2->isCommaExp ())
+	      {
+		DotVarExp *dve = ce2->e1->isCallExp ()
+		  ? ce2->e1->isCallExp ()->e1->isDotVarExp () : NULL;
+
+		if (dve && dve->var->isCtorDeclaration ())
+		  {
+		    de = ce1->e1->isDeclarationExp ();
+		    ve = ce2->e2->isVarExp ();
+		  }
+	      }
+	    else
+	      {
+		de = ce1->e1->isDeclarationExp ();
+		ve = ce1->e2->isVarExp ();
+	      }
+	  }
 	else
 	  sle = s->exp->isStructLiteralExp ();
 
-	if (sle != NULL)
+	if (de != NULL && ve != NULL
+	    && ve->var == de->declaration
+	    && ve->var->storage_class & STCtemp)
+	  {
+	    /* Temporary initialized inside a return expression, and
+	       used as the return value.  Replace it with the hidden
+	       reference to allow RVO return.  */
+	    tree var = get_symbol_decl (ve->var);
+	    TREE_ADDRESSABLE (var) = 1;
+	    SET_DECL_VALUE_EXPR (var, decl);
+	    DECL_HAS_VALUE_EXPR_P (var) = 1;
+	    SET_DECL_LANG_NRVO (var, this->func_->shidden);
+	    using_rvo_p = true;
+	  }
+	else if (sle != NULL)
 	  {
 	    StructDeclaration *sd = type->baseElemOf ()->isTypeStruct ()->sym;
 	    sle->sym = build_address (this->func_->shidden);
--- a/src/gcc/d/types.cc
+++ b/src/gcc/d/types.cc
@@ -324,6 +324,10 @@ insert_aggregate_bitfield (tree type, tree bitfield, size_t width,
   DECL_BIT_FIELD (bitfield) = 1;
   DECL_BIT_FIELD_TYPE (bitfield) = TREE_TYPE (bitfield);
 
+  DECL_NONADDRESSABLE_P (bitfield) = 1;
+  if (DECL_NAME (bitfield) == NULL_TREE)
+    DECL_PADDING_P (bitfield) = 1;
+
   TYPE_FIELDS (type) = chainon (TYPE_FIELDS (type), bitfield);
 }
 
@@ -671,7 +675,11 @@ finish_aggregate_type (unsigned structsize, unsigned alignsize, tree type)
 	  continue;
 	}
 
-      layout_decl (field, 0);
+      /* Layout the field decl using its known alignment.  */
+      unsigned int known_align =
+	least_bit_hwi (tree_to_uhwi (DECL_FIELD_BIT_OFFSET (field)));
+
+      layout_decl (field, known_align);
 
       /* Give bit-field its proper type after layout_decl.  */
       if (DECL_BIT_FIELD (field))
@@ -699,6 +707,7 @@ finish_aggregate_type (unsigned structsize, unsigned alignsize, tree type)
       if (t == type)
 	continue;
 
+      TYPE_NAME (t) = TYPE_NAME (type);
       TYPE_FIELDS (t) = TYPE_FIELDS (type);
       TYPE_LANG_SPECIFIC (t) = TYPE_LANG_SPECIFIC (type);
       TYPE_SIZE (t) = TYPE_SIZE (type);
@@ -955,7 +964,7 @@ public:
 
 	/* Type `noreturn` is a terminator, as no other arguments can possibly
 	   be evaluated after it.  */
-	if (type == noreturn_type_node)
+	if (TYPE_MAIN_VARIANT (type) == noreturn_type_node)
 	  break;
 
 	fnparams = chainon (fnparams, build_tree_list (0, type));
@@ -981,7 +990,7 @@ public:
     d_keep (t->ctype);
 
     /* Qualify function types that have the type `noreturn` as volatile.  */
-    if (fntype == noreturn_type_node)
+    if (TYPE_MAIN_VARIANT (fntype) == noreturn_type_node)
       t->ctype = build_qualified_type (t->ctype, TYPE_QUAL_VOLATILE);
 
     /* Handle any special support for calling conventions.  */
--- a/src/gcc/dfp.cc
+++ b/src/gcc/dfp.cc
@@ -619,11 +619,21 @@ decimal_real_to_integer (const REAL_VALUE_TYPE *r, bool *fail, int precision)
   decNumber dn, dn2, dn3;
   REAL_VALUE_TYPE to;
   char string[256];
+  int scale = 0;
 
   decContextDefault (&set, DEC_INIT_DECIMAL128);
   set.traps = 0;
   set.round = DEC_ROUND_DOWN;
   decimal128ToNumber ((const decimal128 *) r->sig, &dn);
+  if (precision > 64 && decNumberIsFinite (&dn) && dn.exponent > 0)
+    {
+      /* libdecNumber doesn't really handle too large integers.
+	 So when precision is large and exponent as well, trim the
+	 exponent and adjust the resulting wide_int by multiplying
+	 it multiple times with powers of ten.  */
+      scale = dn.exponent;
+      dn.exponent = 0;
+    }
 
   decNumberToIntegralValue (&dn2, &dn, &set);
   decNumberZero (&dn3);
@@ -633,7 +643,74 @@ decimal_real_to_integer (const REAL_VALUE_TYPE *r, bool *fail, int precision)
      function.  */
   decNumberToString (&dn, string);
   real_from_string (&to, string);
-  return real_to_integer (&to, fail, precision);
+  bool failp = false;
+  wide_int w = real_to_integer (&to, &failp, precision);
+  if (failp)
+    *fail = true;
+  if (scale && !failp)
+    {
+      bool isneg = wi::neg_p (w);
+      if (isneg)
+	w = -w;
+      enum wi::overflow_type ovf = wi::OVF_NONE;
+      unsigned HOST_WIDE_INT pow10s[] = {
+	HOST_WIDE_INT_UC (10),
+	HOST_WIDE_INT_UC (100),
+	HOST_WIDE_INT_UC (1000),
+	HOST_WIDE_INT_UC (10000),
+	HOST_WIDE_INT_UC (100000),
+	HOST_WIDE_INT_UC (1000000),
+	HOST_WIDE_INT_UC (10000000),
+	HOST_WIDE_INT_UC (100000000),
+	HOST_WIDE_INT_UC (1000000000),
+	HOST_WIDE_INT_UC (10000000000),
+	HOST_WIDE_INT_UC (100000000000),
+	HOST_WIDE_INT_UC (1000000000000),
+	HOST_WIDE_INT_UC (10000000000000),
+	HOST_WIDE_INT_UC (100000000000000),
+	HOST_WIDE_INT_UC (1000000000000000),
+	HOST_WIDE_INT_UC (10000000000000000),
+	HOST_WIDE_INT_UC (100000000000000000),
+	HOST_WIDE_INT_UC (1000000000000000000),
+	HOST_WIDE_INT_UC (10000000000000000000),
+      };
+      int s = scale % 19;
+      if (s)
+	{
+	  wide_int wm = wi::uhwi (pow10s[s - 1], w.get_precision ());
+	  w = wi::umul (w, wm, &ovf);
+	  if (ovf)
+	    scale = 0;
+	}
+      scale /= 19;
+      wide_int wm = wi::uhwi (pow10s[18], w.get_precision ());
+      while (scale)
+	{
+	  if (scale & 1)
+	    {
+	      w = wi::umul (w, wm, &ovf);
+	      if (ovf)
+		break;
+	    }
+	  scale >>= 1;
+	  if (!scale)
+	    break;
+	  wm = wi::umul (wm, wm, &ovf);
+	  if (ovf)
+	    break;
+	}
+      if (ovf)
+	{
+	  *fail = true;
+	  if (isneg)
+	    return wi::set_bit_in_zero (precision - 1, precision);
+	  else
+	    return ~wi::set_bit_in_zero (precision - 1, precision);
+	}
+      if (isneg)
+	w = -w;
+    }
+  return w;
 }
 
 /* Perform the decimal floating point operation described by CODE.
--- a/src/gcc/dwarf2out.cc
+++ b/src/gcc/dwarf2out.cc
@@ -22666,6 +22666,28 @@ gen_array_type_die (tree type, dw_die_ref context_die)
 		      && TYPE_REVERSE_STORAGE_ORDER (type),
 		      context_die);
 
+  /* Add bit stride information to boolean vectors of single bits so that
+     elements can be correctly read and displayed by a debugger.  */
+  if (VECTOR_BOOLEAN_TYPE_P (type))
+    {
+      enum machine_mode tmode = TYPE_MODE_RAW (type);
+      if (GET_MODE_CLASS (tmode) == MODE_VECTOR_BOOL)
+	{
+	  /* Calculate bit-size of element based on mnode.  */
+	  poly_uint16 bit_size = exact_div (GET_MODE_BITSIZE (tmode),
+					    GET_MODE_NUNITS (tmode));
+	  /* Set bit stride in the array type DIE.  */
+	  add_AT_unsigned (array_die, DW_AT_bit_stride, bit_size.coeffs[0]);
+	  /* Find DIE corresponding to the element type so that we could
+	     add DW_AT_bit_size to it.  */
+	  dw_die_ref elem_die = get_AT_ref (array_die, DW_AT_type);
+	  /* Avoid adding DW_AT_bit_size twice.  */
+	  if (get_AT (elem_die, DW_AT_bit_size) == NULL)
+	    add_AT_unsigned (elem_die, DW_AT_bit_size,
+			     TYPE_PRECISION (element_type));
+	}
+    }
+
   add_gnat_descriptive_type_attribute (array_die, type, context_die);
   if (TYPE_ARTIFICIAL (type))
     add_AT_flag (array_die, DW_AT_artificial, 1);
--- a/src/gcc/fortran/ChangeLog
+++ b/src/gcc/fortran/ChangeLog
@@ -1,3 +1,117 @@
+2026-03-15  Jerry DeLisle  <jvdelisle@gcc.gnu.org>
+
+	Backported from master:
+	2026-03-15  Jerry DeLisle  <jvdelisle@gcc.gnu.org>
+
+	PR fortran/106946
+	PR fortran/124482
+	* decl.cc (gfc_match_data_decl): Defer CLASS container cleanup
+	until after all failed components are unlinked.  Check remaining
+	component list before freeing a shared container.
+	* gfortran.h (gfc_free_component): Declare.
+	(gfc_delete_symtree): Declare.
+	* symbol.cc (gfc_free_component): New function.
+	(free_components): Use it.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-03-12  Jakub Jelinek  <jakub@redhat.com>
+
+	PR fortran/124450
+	* trans-io.cc (transfer_expr): If code is NULL, call
+	transfer_array_component with NULL where argument rather than
+	&code->loc.
+
+2025-10-25  Harald Anlauf  <anlauf@gmx.de>
+
+	Backported from master:
+	2025-10-04  Harald Anlauf  <anlauf@gmx.de>
+
+	PR fortran/107968
+	* trans-io.cc (gfc_trans_transfer): Also scalarize I/O of section
+	of an array pointer.
+
+2025-10-25  Harald Anlauf  <anlauf@gmx.de>
+
+	Backported from master:
+	2025-10-09  Harald Anlauf  <anlauf@gmx.de>
+
+	PR fortran/122206
+	* trans-types.cc (gfc_get_function_type): Do not clobber an
+	existing procedure interface.
+
+2025-10-05  Harald Anlauf  <anlauf@gmx.de>
+
+	Backported from master:
+	2025-09-03  Harald Anlauf  <anlauf@gmx.de>
+
+	PR fortran/121263
+	* trans-intrinsic.cc (gfc_conv_intrinsic_transfer): For an
+	unlimited polymorphic SOURCE to TRANSFER use saved descriptor
+	if possible.
+
+2025-09-23  Paul Thomas  <pault@gcc.gnu.org>
+
+	Backported from master:
+	2025-08-13  Paul Thomas  <pault@gcc.gnu.org>
+
+	PR fortran/89092
+	* resolve.cc (was_declared): Add subroutine attribute.
+
+2025-08-22  Harald Anlauf  <anlauf@gmx.de>
+
+	Backported from master:
+	2025-07-18  Harald Anlauf  <anlauf@gmx.de>
+
+	PR fortran/121145
+	* trans-expr.cc (gfc_conv_procedure_call): Do not create pointer
+	check for proc-pointer actual passed to optional dummy.
+
+2025-08-22  Harald Anlauf  <anlauf@gmx.de>
+
+	Backported from master:
+	2025-06-27  Harald Anlauf  <anlauf@gmx.de>
+
+	PR fortran/120784
+	* interface.cc (gfc_match_end_interface): Detect empty local_name.
+
+2025-08-22  Harald Anlauf  <anlauf@gmx.de>
+
+	Backported from master:
+	2025-06-23  Harald Anlauf  <anlauf@gmx.de>
+
+	PR fortran/120784
+	* interface.cc (gfc_match_end_interface): If a use-associated
+	symbol is renamed, use the local_name for checking.
+
+2025-07-16  Paul Thomas  <pault@gcc.gnu.org>
+
+	Backported from master:
+	2025-07-16  Paul Thomas  <pault@gcc.gnu.org>
+
+	PR fortran/121060
+	* interface.cc (matching_typebound_op): Defer determination of
+	specific procedure until resolution by returning NULL.
+
+2025-05-25  Harald Anlauf  <anlauf@gmx.de>
+
+	Backported from master:
+	2025-05-15  Harald Anlauf  <anlauf@gmx.de>
+
+	PR fortran/85750
+	* resolve.cc (resolve_symbol): Reorder conditions when to apply
+	default-initializers.
+
+2025-05-25  Harald Anlauf  <anlauf@gmx.de>
+
+	Backported from master:
+	2024-08-30  Harald Anlauf  <anlauf@gmx.de>
+
+	PR fortran/98454
+	* resolve.cc (resolve_symbol): Add default-initialization of
+	non-allocatable, non-pointer derived-type function results.
+
 2025-05-23  Release Manager
 
 	* GCC 14.3.0 released.
--- a/src/gcc/fortran/decl.cc
+++ b/src/gcc/fortran/decl.cc
@@ -6311,12 +6311,28 @@ gfc_match_data_decl (void)
   gfc_symbol *sym;
   match m;
   int elem;
+  gfc_component *comp_tail = NULL;
 
   type_param_spec_list = NULL;
   decl_type_param_list = NULL;
 
   num_idents_on_line = 0;
 
+  /* Record the last component before we start, so that we can roll back
+     any components added during this statement on error.  PR106946.
+     Must be set before any 'goto cleanup' with m == MATCH_ERROR.  */
+  if (gfc_comp_struct (gfc_current_state ()))
+    {
+      gfc_symbol *block = gfc_current_block ();
+      if (block)
+	{
+	  comp_tail = block->components;
+	  if (comp_tail)
+	    while (comp_tail->next)
+	      comp_tail = comp_tail->next;
+	}
+    }
+
   m = gfc_match_decl_type_spec (&current_ts, 0);
   if (m != MATCH_YES)
     return m;
@@ -6436,6 +6452,80 @@ ok:
   gfc_free_data_all (gfc_current_ns);
 
 cleanup:
+  /* If we failed inside a derived type definition, remove any CLASS
+     components that were added during this failed statement.  For CLASS
+     components, gfc_build_class_symbol creates an extra container symbol in
+     the namespace outside the normal undo machinery.  When reject_statement
+     later calls gfc_undo_symbols, the declaration state is rolled back but
+     that helper symbol survives and leaves the component dangling.  Ordinary
+     components do not create that extra helper symbol, so leave them in
+     place for the usual follow-up diagnostics.  PR106946.
+
+     CLASS containers are shared between components of the same class type
+     and attributes (gfc_build_class_symbol reuses existing containers).
+     We must not free a container that is still referenced by a previously
+     committed component.  Unlink and free the components first, then clean
+     up only orphaned containers.  PR124482.  */
+  if (m == MATCH_ERROR && gfc_comp_struct (gfc_current_state ()))
+    {
+      gfc_symbol *block = gfc_current_block ();
+      if (block)
+	{
+	  gfc_component **prev;
+	  if (comp_tail)
+	    prev = &comp_tail->next;
+	  else
+	    prev = &block->components;
+
+	  /* Record the CLASS container from the removed components.
+	     Normally all components in one declaration share a single
+	     container, but per-variable array specs can produce
+	     additional ones; any beyond the first are harmlessly
+	     leaked until namespace destruction.  */
+	  gfc_symbol *fclass_container = NULL;
+
+	  while (*prev)
+	    {
+	      gfc_component *c = *prev;
+	      if (c->ts.type == BT_CLASS && c->ts.u.derived
+		  && c->ts.u.derived->attr.is_class)
+		{
+		  *prev = c->next;
+		  if (!fclass_container)
+		    fclass_container = c->ts.u.derived;
+		  c->ts.u.derived = NULL;
+		  gfc_free_component (c);
+		}
+	      else
+		prev = &c->next;
+	    }
+
+	  /* Free the container only if no remaining component still
+	     references it.  CLASS containers are shared between
+	     components of the same class type and attributes
+	     (gfc_build_class_symbol reuses existing ones).  */
+	  if (fclass_container)
+	    {
+	      bool shared = false;
+	      for (gfc_component *q = block->components; q; q = q->next)
+		if (q->ts.type == BT_CLASS
+		    && q->ts.u.derived == fclass_container)
+		  {
+		    shared = true;
+		    break;
+		  }
+	      if (!shared)
+		{
+		  if (gfc_find_symtree (fclass_container->ns->sym_root,
+					fclass_container->name))
+		    gfc_delete_symtree (&fclass_container->ns->sym_root,
+					fclass_container->name);
+		  gfc_release_symbol (fclass_container);
+		}
+	    }
+	}
+    }
+
   if (saved_kind_expr)
     gfc_free_expr (saved_kind_expr);
   if (type_param_spec_list)
--- a/src/gcc/fortran/gfortran.h
+++ b/src/gcc/fortran/gfortran.h
@@ -3543,6 +3543,7 @@ bool gfc_missing_attr (symbol_attribute *, locus *);
 bool gfc_copy_attr (symbol_attribute *, symbol_attribute *, locus *);
 int gfc_copy_dummy_sym (gfc_symbol **, gfc_symbol *, int);
 bool gfc_add_component (gfc_symbol *, const char *, gfc_component **);
+void gfc_free_component (gfc_component *);
 gfc_symbol *gfc_use_derived (gfc_symbol *);
 gfc_component *gfc_find_component (gfc_symbol *, const char *, bool, bool,
                                    gfc_ref **);
@@ -3556,6 +3557,7 @@ bool gfc_reference_st_label (gfc_st_label *, gfc_sl_type);
 
 gfc_namespace *gfc_get_namespace (gfc_namespace *, int);
 gfc_symtree *gfc_new_symtree (gfc_symtree **, const char *);
+void gfc_delete_symtree (gfc_symtree **, const char *);
 gfc_symtree *gfc_find_symtree (gfc_symtree *, const char *);
 gfc_symtree *gfc_get_unique_symtree (gfc_namespace *);
 gfc_user_op *gfc_get_uop (const char *);
--- a/src/gcc/fortran/interface.cc
+++ b/src/gcc/fortran/interface.cc
@@ -452,11 +452,20 @@ gfc_match_end_interface (void)
 
     case INTERFACE_DTIO:
     case INTERFACE_GENERIC:
+      /* If a use-associated symbol is renamed, check the local_name.   */
+      const char *local_name = current_interface.sym->name;
+
+      if (current_interface.sym->attr.use_assoc
+	  && current_interface.sym->attr.use_rename
+	  && current_interface.sym->ns->use_stmts->rename
+	  && (current_interface.sym->ns->use_stmts->rename->local_name[0]
+	      != '\0'))
+	local_name = current_interface.sym->ns->use_stmts->rename->local_name;
+
       if (type != current_interface.type
-	  || strcmp (current_interface.sym->name, name) != 0)
+	  || strcmp (local_name, name) != 0)
 	{
-	  gfc_error ("Expecting %<END INTERFACE %s%> at %C",
-		     current_interface.sym->name);
+	  gfc_error ("Expecting %<END INTERFACE %s%> at %C", local_name);
 	  m = MATCH_ERROR;
 	}
 
@@ -4622,6 +4631,13 @@ matching_typebound_op (gfc_expr** tb_base,
 		gfc_actual_arglist* argcopy;
 		bool matches;
 
+		/* If expression matching comes here during parsing, eg. when
+		   parsing ASSOCIATE, generic TBPs have not yet been resolved
+		   and g->specific will not have been set. Wait for expression
+		   resolution by returning NULL.  */
+		if (!g->specific && !gfc_current_ns->resolved)
+		  return NULL;
+
 		gcc_assert (g->specific);
 		if (g->specific->error)
 		  continue;
--- a/src/gcc/fortran/resolve.cc
+++ b/src/gcc/fortran/resolve.cc
@@ -1611,7 +1611,7 @@ was_declared (gfc_symbol *sym)
   if (a.allocatable || a.dimension || a.dummy || a.external || a.intrinsic
       || a.optional || a.pointer || a.save || a.target || a.volatile_
       || a.value || a.access != ACCESS_UNKNOWN || a.intent != INTENT_UNKNOWN
-      || a.asynchronous || a.codimension)
+      || a.asynchronous || a.codimension || a.subroutine)
     return 1;
 
   return 0;
@@ -17134,6 +17134,10 @@ skip_interfaces:
 	  || (a->dummy && !a->pointer && a->intent == INTENT_OUT
 	      && sym->ns->proc_name->attr.if_source != IFSRC_IFBODY))
 	apply_default_init (sym);
+      else if (a->function && !a->pointer && !a->allocatable && !a->use_assoc
+	       && sym->result)
+	/* Default initialization for function results.  */
+	apply_default_init (sym->result);
       else if (a->function && sym->result && a->access != ACCESS_PRIVATE
 	       && (sym->ts.u.derived->attr.alloc_comp
 		   || sym->ts.u.derived->attr.pointer_comp))
--- a/src/gcc/fortran/symbol.cc
+++ b/src/gcc/fortran/symbol.cc
@@ -2667,6 +2667,21 @@ gfc_find_component (gfc_symbol *sym, const char *name,
 /* Given a symbol, free all of the component structures and everything
    they point to.  */
 
+void
+gfc_free_component (gfc_component *p)
+{
+  gfc_free_array_spec (p->as);
+  gfc_free_expr (p->initializer);
+  if (p->kind_expr)
+    gfc_free_expr (p->kind_expr);
+  if (p->param_list)
+    gfc_free_actual_arglist (p->param_list);
+  free (p->tb);
+  p->tb = NULL;
+  free (p);
+}
+
+
 static void
 free_components (gfc_component *p)
 {
@@ -2675,16 +2690,7 @@ free_components (gfc_component *p)
   for (; p; p = q)
     {
       q = p->next;
-
-      gfc_free_array_spec (p->as);
-      gfc_free_expr (p->initializer);
-      if (p->kind_expr)
-	gfc_free_expr (p->kind_expr);
-      if (p->param_list)
-	gfc_free_actual_arglist (p->param_list);
-      free (p->tb);
-      p->tb = NULL;
-      free (p);
+      gfc_free_component (p);
     }
 }
 
@@ -3015,7 +3021,7 @@ gfc_new_symtree (gfc_symtree **root, const char *name)
 
 /* Delete a symbol from the tree.  Does not free the symbol itself!  */
 
-static void
+void
 gfc_delete_symtree (gfc_symtree **root, const char *name)
 {
   gfc_symtree st, *st0;
--- a/src/gcc/fortran/trans-expr.cc
+++ b/src/gcc/fortran/trans-expr.cc
@@ -7717,7 +7717,8 @@ gfc_conv_procedure_call (gfc_se * se, gfc_symbol * sym,
 		msg = xasprintf ("Pointer actual argument '%s' is not "
 				 "associated", e->symtree->n.sym->name);
 	      else if (attr.proc_pointer && !e->value.function.actual
-		       && (fsym == NULL || !fsym_attr.proc_pointer))
+		       && (fsym == NULL
+			   || (!fsym_attr.proc_pointer && !fsym_attr.optional)))
 		msg = xasprintf ("Proc-pointer actual argument '%s' is not "
 				 "associated", e->symtree->n.sym->name);
 	      else
--- a/src/gcc/fortran/trans-intrinsic.cc
+++ b/src/gcc/fortran/trans-intrinsic.cc
@@ -8512,7 +8512,12 @@ gfc_conv_intrinsic_transfer (gfc_se * se, gfc_expr * expr)
 				       argse.string_length);
       else if (arg->expr->ts.type == BT_CLASS)
 	{
-	  class_ref = TREE_OPERAND (argse.expr, 0);
+	  if (UNLIMITED_POLY (source_expr)
+	      && DECL_LANG_SPECIFIC (source_expr->symtree->n.sym->backend_decl))
+	    class_ref = GFC_DECL_SAVED_DESCRIPTOR
+	      (source_expr->symtree->n.sym->backend_decl);
+	  else
+	    class_ref = TREE_OPERAND (argse.expr, 0);
 	  tmp = gfc_class_vtab_size_get (class_ref);
 	  if (UNLIMITED_POLY (arg->expr))
 	    tmp = gfc_resize_class_size_with_len (&argse.pre, class_ref, tmp);
--- a/src/gcc/fortran/trans-io.cc
+++ b/src/gcc/fortran/trans-io.cc
@@ -2496,7 +2496,9 @@ transfer_expr (gfc_se * se, gfc_typespec * ts, tree addr_expr,
 
 		  if (c->attr.dimension)
 		    {
-		      tmp = transfer_array_component (tmp, c, & code->loc);
+		      tmp = transfer_array_component (tmp, c,
+						      code ? &code->loc
+						      : NULL);
 		      gfc_add_expr_to_block (&se->pre, tmp);
 		    }
 		  else
@@ -2630,7 +2632,9 @@ gfc_trans_transfer (gfc_code * code)
 	 && ((expr->symtree->n.sym->ts.type == BT_DERIVED && expr->ts.deferred)
 	     || (expr->symtree->n.sym->assoc
 		 && expr->symtree->n.sym->assoc->variable)
-	     || gfc_expr_attr (expr).pointer))
+	     || gfc_expr_attr (expr).pointer
+	     || (expr->symtree->n.sym->attr.pointer
+		 && gfc_expr_attr (expr).target)))
 	goto scalarize;
 
       /* With array-bounds checking enabled, force scalarization in some
--- a/src/gcc/fortran/trans-types.cc
+++ b/src/gcc/fortran/trans-types.cc
@@ -3171,6 +3171,7 @@ gfc_get_function_type (gfc_symbol * sym, gfc_actual_arglist *actual_args,
 	}
     }
   if (sym->backend_decl == error_mark_node && actual_args != NULL
+      && sym->ts.interface == NULL
       && sym->formal == NULL && (sym->attr.proc == PROC_EXTERNAL
 				 || sym->attr.proc == PROC_UNKNOWN))
     gfc_get_formal_from_actual_arglist (sym, actual_args);
--- a/src/gcc/fwprop.cc
+++ b/src/gcc/fwprop.cc
@@ -842,6 +842,20 @@ forward_propagate_into (use_info *use, bool reg_prop_only = false)
   if (def_insn->is_artificial ())
     return false;
 
+  /* Do not propagate asms.  The only kind of propagation that would
+     succeed is propagation into a register move.  Such a propagation
+     is neutral if the destination of the move is a pseudo and unnecessarily
+     restricts the register allocator if the destination of the move is
+     a hard register.
+
+     Furthermore, unlike for a normal instruction, we cannot take a SET from an
+     asm and try dropping the CLOBBERs.  The recog process does not (and should
+     not try to) second-guess whether what the user wrote can be changed and
+     so it has to assume that any asm given to it is a fair reflection of
+     what the user wrote.  */
+  if (def_insn->is_asm ())
+    return false;
+
   rtx_insn *def_rtl = def_insn->rtl ();
   if (!NONJUMP_INSN_P (def_rtl))
     return false;
--- a/src/gcc/generic-match-head.cc
+++ b/src/gcc/generic-match-head.cc
@@ -105,6 +105,18 @@ optimize_successive_divisions_p (tree, tree)
   return false;
 }
 
+/* Returns true if the expression T has no side effects
+   including not trapping. */
+static inline bool
+expr_no_side_effects_p (tree t)
+{
+  if (TREE_SIDE_EFFECTS (t))
+    return false;
+  if (generic_expr_could_trap_p (t))
+    return false;
+  return true;
+}
+
 /* Return true if EXPR1 and EXPR2 have the same value, but not necessarily
    same type.  The types can differ through nop conversions.  */
 
--- a/src/gcc/gimple-fold.cc
+++ b/src/gcc/gimple-fold.cc
@@ -936,6 +936,8 @@ gimple_fold_builtin_memory_op (gimple_stmt_iterator *gsi,
 	}
       goto done;
     }
+  else if (!gimple_vdef (stmt) && gimple_in_ssa_p (cfun))
+    return false;
   else
     {
       /* We cannot (easily) change the type of the copy if it is a storage
@@ -1377,6 +1379,8 @@ gimple_fold_builtin_bcmp (gimple_stmt_iterator *gsi)
   /* Transform bcmp (a, b, len) into memcmp (a, b, len).  */
 
   gimple *stmt = gsi_stmt (*gsi);
+  if (!gimple_vuse (stmt) && gimple_in_ssa_p (cfun))
+    return false;
   tree a = gimple_call_arg (stmt, 0);
   tree b = gimple_call_arg (stmt, 1);
   tree len = gimple_call_arg (stmt, 2);
@@ -1403,6 +1407,8 @@ gimple_fold_builtin_bcopy (gimple_stmt_iterator *gsi)
      len) into memmove (dest, src, len).  */
 
   gimple *stmt = gsi_stmt (*gsi);
+  if (!gimple_vdef (stmt) && gimple_in_ssa_p (cfun))
+    return false;
   tree src = gimple_call_arg (stmt, 0);
   tree dest = gimple_call_arg (stmt, 1);
   tree len = gimple_call_arg (stmt, 2);
@@ -1428,6 +1434,8 @@ gimple_fold_builtin_bzero (gimple_stmt_iterator *gsi)
   /* Transform bzero (dest, len) into memset (dest, 0, len).  */
 
   gimple *stmt = gsi_stmt (*gsi);
+  if (!gimple_vdef (stmt) && gimple_in_ssa_p (cfun))
+    return false;
   tree dest = gimple_call_arg (stmt, 0);
   tree len = gimple_call_arg (stmt, 1);
 
@@ -1457,6 +1465,9 @@ gimple_fold_builtin_memset (gimple_stmt_iterator *gsi, tree c, tree len)
       return true;
     }
 
+  if (!gimple_vdef (stmt) && gimple_in_ssa_p (cfun))
+    return false;
+
   if (! tree_fits_uhwi_p (len))
     return false;
 
@@ -1479,20 +1490,20 @@ gimple_fold_builtin_memset (gimple_stmt_iterator *gsi, tree c, tree len)
   if ((!INTEGRAL_TYPE_P (etype)
        && !POINTER_TYPE_P (etype))
       || TREE_CODE (etype) == BITINT_TYPE)
-    return NULL_TREE;
+    return false;
 
   if (! var_decl_component_p (var))
-    return NULL_TREE;
+    return false;
 
   length = tree_to_uhwi (len);
   if (GET_MODE_SIZE (SCALAR_INT_TYPE_MODE (etype)) != length
       || (GET_MODE_PRECISION (SCALAR_INT_TYPE_MODE (etype))
 	  != GET_MODE_BITSIZE (SCALAR_INT_TYPE_MODE (etype)))
       || get_pointer_alignment (dest) / BITS_PER_UNIT < length)
-    return NULL_TREE;
+    return false;
 
   if (length > HOST_BITS_PER_WIDE_INT / BITS_PER_UNIT)
-    return NULL_TREE;
+    return false;
 
   if (!type_has_mode_precision_p (etype))
     etype = lang_hooks.types.type_for_mode (SCALAR_INT_TYPE_MODE (etype),
@@ -2106,7 +2117,7 @@ gimple_fold_builtin_strcpy (gimple_stmt_iterator *gsi,
       return false;
     }
 
-  if (!len)
+  if (!len || (!gimple_vdef (stmt) && gimple_in_ssa_p (cfun)))
     return false;
 
   len = fold_convert_loc (loc, size_type_node, len);
@@ -2181,7 +2192,7 @@ gimple_fold_builtin_strncpy (gimple_stmt_iterator *gsi,
 
   /* OK transform into builtin memcpy.  */
   tree fn = builtin_decl_implicit (BUILT_IN_MEMCPY);
-  if (!fn)
+  if (!fn || (!gimple_vdef (stmt) && gimple_in_ssa_p (cfun)))
     return false;
 
   len = fold_convert_loc (loc, size_type_node, len);
@@ -2235,7 +2246,7 @@ gimple_fold_builtin_strchr (gimple_stmt_iterator *gsi, bool is_strrchr)
       return true;
     }
 
-  if (!integer_zerop (c))
+  if (!integer_zerop (c) || (!gimple_vuse (stmt) && gimple_in_ssa_p (cfun)))
     return false;
 
   /* Transform strrchr (s, 0) to strchr (s, 0) when optimizing for size.  */
@@ -2333,6 +2344,9 @@ gimple_fold_builtin_strstr (gimple_stmt_iterator *gsi)
       return true;
     }
 
+  if (!gimple_vuse (stmt) && gimple_in_ssa_p (cfun))
+    return false;
+
   /* Transform strstr (x, "c") into strchr (x, 'c').  */
   if (q[1] == '\0')
     {
@@ -2385,6 +2399,9 @@ gimple_fold_builtin_strcat (gimple_stmt_iterator *gsi, tree dst, tree src)
   if (!optimize_bb_for_speed_p (gimple_bb (stmt)))
     return false;
 
+  if (!gimple_vdef (stmt) && gimple_in_ssa_p (cfun))
+    return false;
+
   /* See if we can store by pieces into (dst + strlen(dst)).  */
   tree newdst;
   tree strlen_fn = builtin_decl_implicit (BUILT_IN_STRLEN);
@@ -2454,7 +2471,6 @@ gimple_fold_builtin_strcat_chk (gimple_stmt_iterator *gsi)
   tree fn;
   const char *p;
 
-
   p = c_getstr (src);
   /* If the SRC parameter is "", return DEST.  */
   if (p && *p == '\0')
@@ -2466,6 +2482,9 @@ gimple_fold_builtin_strcat_chk (gimple_stmt_iterator *gsi)
   if (! tree_fits_uhwi_p (size) || ! integer_all_onesp (size))
     return false;
 
+  if (!gimple_vdef (stmt) && gimple_in_ssa_p (cfun))
+    return false;
+
   /* If __builtin_strcat_chk is used, assume strcat is available.  */
   fn = builtin_decl_explicit (BUILT_IN_STRCAT);
   if (!fn)
@@ -2556,7 +2575,7 @@ gimple_fold_builtin_strncat (gimple_stmt_iterator *gsi)
 
   /* If the replacement _DECL isn't initialized, don't do the
      transformation.  */
-  if (!fn)
+  if (!fn || (!gimple_vdef (stmt) && gimple_in_ssa_p (cfun)))
     return false;
 
   /* Otherwise, emit a call to strcat.  */
@@ -2588,6 +2607,9 @@ gimple_fold_builtin_strncat_chk (gimple_stmt_iterator *gsi)
       return true;
     }
 
+  if (!gimple_vdef (stmt) && gimple_in_ssa_p (cfun))
+    return false;
+
   if (! integer_all_onesp (size))
     {
       tree src_len = c_strlen (src, 1);
@@ -2678,6 +2700,9 @@ gimple_fold_builtin_string_compare (gimple_stmt_iterator *gsi)
       return true;
     }
 
+  if (!gimple_vuse (stmt) && gimple_in_ssa_p (cfun))
+    return false;
+
   /* Initially set to the number of characters, including the terminating
      nul if each array has one.   LENx == strnlen (Sx, LENx) implies that
      the array Sx is not terminated by a nul.
@@ -2970,7 +2995,7 @@ gimple_fold_builtin_fputs (gimple_stmt_iterator *gsi,
 	const char *p = c_getstr (arg0);
 	if (p != NULL)
 	  {
-	    if (!fn_fputc)
+	    if (!fn_fputc || (!gimple_vdef (stmt) && gimple_in_ssa_p (cfun)))
 	      return false;
 
 	    gimple *repl
@@ -2989,7 +3014,7 @@ gimple_fold_builtin_fputs (gimple_stmt_iterator *gsi,
 	  return false;
 	/* New argument list transforming fputs(string, stream) to
 	   fwrite(string, 1, len, stream).  */
-	if (!fn_fwrite)
+	if (!fn_fwrite || (!gimple_vdef (stmt) && gimple_in_ssa_p (cfun)))
 	  return false;
 
 	gimple *repl
@@ -3040,6 +3065,9 @@ gimple_fold_builtin_memory_chk (gimple_stmt_iterator *gsi,
 	}
     }
 
+  if (!gimple_vdef (stmt) && gimple_in_ssa_p (cfun))
+    return false;
+
   tree maxlen = get_maxval_strlen (len, SRK_INT_VALUE);
   if (! integer_all_onesp (size)
       && !known_lower (stmt, len, size)
@@ -3138,6 +3166,9 @@ gimple_fold_builtin_stxcpy_chk (gimple_stmt_iterator *gsi,
       return true;
     }
 
+  if (!gimple_vdef (stmt) && gimple_in_ssa_p (cfun))
+    return false;
+
   tree maxlen = get_maxval_strlen (src, SRK_STRLENMAX);
   if (! integer_all_onesp (size))
     {
@@ -3231,7 +3262,7 @@ gimple_fold_builtin_stxncpy_chk (gimple_stmt_iterator *gsi,
   /* If __builtin_st{r,p}ncpy_chk is used, assume st{r,p}ncpy is available.  */
   fn = builtin_decl_explicit (fcode == BUILT_IN_STPNCPY_CHK && !ignore
 			      ? BUILT_IN_STPNCPY : BUILT_IN_STRNCPY);
-  if (!fn)
+  if (!fn || (!gimple_vdef (stmt) && gimple_in_ssa_p (cfun)))
     return false;
 
   gcall *repl = gimple_build_call (fn, 3, dest, src, len);
@@ -3252,6 +3283,9 @@ gimple_fold_builtin_stpcpy (gimple_stmt_iterator *gsi)
   tree src = gimple_call_arg (stmt, 1);
   tree fn, lenp1;
 
+  if (!gimple_vdef (stmt) && gimple_in_ssa_p (cfun))
+    return false;
+
   /* If the result is unused, replace stpcpy with strcpy.  */
   if (gimple_call_lhs (stmt) == NULL_TREE)
     {
@@ -3369,7 +3403,7 @@ gimple_fold_builtin_snprintf_chk (gimple_stmt_iterator *gsi,
      available.  */
   fn = builtin_decl_explicit (fcode == BUILT_IN_VSNPRINTF_CHK
 			      ? BUILT_IN_VSNPRINTF : BUILT_IN_SNPRINTF);
-  if (!fn)
+  if (!fn || (!gimple_vdef (stmt) && gimple_in_ssa_p (cfun)))
     return false;
 
   /* Replace the called function and the first 5 argument by 3 retaining
@@ -3456,7 +3490,7 @@ gimple_fold_builtin_sprintf_chk (gimple_stmt_iterator *gsi,
   /* If __builtin_{,v}sprintf_chk is used, assume {,v}sprintf is available.  */
   fn = builtin_decl_explicit (fcode == BUILT_IN_VSPRINTF_CHK
 			      ? BUILT_IN_VSPRINTF : BUILT_IN_SPRINTF);
-  if (!fn)
+  if (!fn || (!gimple_vdef (stmt) && gimple_in_ssa_p (cfun)))
     return false;
 
   /* Replace the called function and the first 4 argument by 2 retaining
@@ -3505,7 +3539,7 @@ gimple_fold_builtin_sprintf (gimple_stmt_iterator *gsi)
     return false;
 
   tree fn = builtin_decl_implicit (BUILT_IN_STRCPY);
-  if (!fn)
+  if (!fn || (!gimple_vdef (stmt) && gimple_in_ssa_p (cfun)))
     return false;
 
   /* If the format doesn't contain % args or %%, use strcpy.  */
@@ -3618,7 +3652,8 @@ gimple_fold_builtin_snprintf (gimple_stmt_iterator *gsi)
   tree orig = NULL_TREE;
   const char *fmt_str = NULL;
 
-  if (gimple_call_num_args (stmt) > 4)
+  if (gimple_call_num_args (stmt) > 4
+      || (!gimple_vdef (stmt) && gimple_in_ssa_p (cfun)))
     return false;
 
   if (gimple_call_num_args (stmt) == 4)
@@ -3776,6 +3811,9 @@ gimple_fold_builtin_fprintf (gimple_stmt_iterator *gsi,
   if (!init_target_chars ())
     return false;
 
+  if (!gimple_vdef (stmt) && gimple_in_ssa_p (cfun))
+    return false;
+
   /* If the format doesn't contain % args or %%, use strcpy.  */
   if (strchr (fmt_str, target_percent) == NULL)
     {
@@ -3855,6 +3893,9 @@ gimple_fold_builtin_printf (gimple_stmt_iterator *gsi, tree fmt,
   if (gimple_call_lhs (stmt) != NULL_TREE)
     return false;
 
+  if (!gimple_vdef (stmt) && gimple_in_ssa_p (cfun))
+    return false;
+
   /* Check whether the format is a literal string constant.  */
   fmt_str = c_getstr (fmt);
   if (fmt_str == NULL)
@@ -4096,6 +4137,9 @@ gimple_fold_builtin_realloc (gimple_stmt_iterator *gsi)
   tree arg = gimple_call_arg (stmt, 0);
   tree size = gimple_call_arg (stmt, 1);
 
+  if (!gimple_vdef (stmt) && gimple_in_ssa_p (cfun))
+    return false;
+
   if (operand_equal_p (arg, null_pointer_node, 0))
     {
       tree fn_malloc = builtin_decl_implicit (BUILT_IN_MALLOC);
@@ -8199,10 +8243,17 @@ fold_nonarray_ctor_reference (tree type, tree ctor,
 	    {
 	      if (BYTES_BIG_ENDIAN != WORDS_BIG_ENDIAN)
 		return NULL_TREE;
-	      const unsigned int encoding_size
-		= GET_MODE_BITSIZE (SCALAR_INT_TYPE_MODE (TREE_TYPE (cfield)));
 	      if (BYTES_BIG_ENDIAN)
-		inner_offset += encoding_size - wi::to_offset (field_size);
+		{
+		  tree ctype = TREE_TYPE (cfield);
+		  unsigned int encoding_size;
+		  if (TYPE_MODE (ctype) != BLKmode)
+		    encoding_size
+		      = GET_MODE_BITSIZE (SCALAR_INT_TYPE_MODE (ctype));
+		  else
+		    encoding_size = TREE_INT_CST_LOW (TYPE_SIZE (ctype));
+		  inner_offset += encoding_size - wi::to_offset (field_size);
+		}
 	    }
 
 	  return fold_ctor_reference (type, cval,
@@ -8400,19 +8451,21 @@ fold_const_aggregate_ref_1 (tree t, tree (*valueize) (tree))
       base = get_ref_base_and_extent (t, &offset, &size, &max_size, &reverse);
       ctor = get_base_constructor (base, &offset, valueize);
 
+      /* We cannot determine ctor.  */
+      if (!ctor)
+	return NULL_TREE;
       /* Empty constructor.  Always fold to 0.  */
       if (ctor == error_mark_node)
 	return build_zero_cst (TREE_TYPE (t));
-      /* We do not know precise address.  */
+      /* We do not know precise access.  */
       if (!known_size_p (max_size) || maybe_ne (max_size, size))
 	return NULL_TREE;
-      /* We cannot determine ctor.  */
-      if (!ctor)
-	return NULL_TREE;
-
       /* Out of bound array access.  Value is undefined, but don't fold.  */
       if (maybe_lt (offset, 0))
 	return NULL_TREE;
+      /* Access with reverse storage order.  */
+      if (reverse)
+	return NULL_TREE;
 
       tem = fold_ctor_reference (TREE_TYPE (t), ctor, offset, size, base);
       if (tem)
@@ -8432,7 +8485,6 @@ fold_const_aggregate_ref_1 (tree t, tree (*valueize) (tree))
 	      && offset.is_constant (&coffset)
 	      && (coffset % BITS_PER_UNIT != 0
 		  || csize % BITS_PER_UNIT != 0)
-	      && !reverse
 	      && BYTES_BIG_ENDIAN == WORDS_BIG_ENDIAN)
 	    {
 	      poly_int64 bitoffset;
--- a/src/gcc/gimple-isel.cc
+++ b/src/gcc/gimple-isel.cc
@@ -101,6 +101,16 @@ gimple_expand_vec_set_extract_expr (struct function *fun,
       tree pos = TREE_OPERAND (ref, 1);
 
       tree view_op0 = TREE_OPERAND (op0, 0);
+
+      tree idx = TREE_OPERAND (ref, 1);
+      // if index is a constant, then check the bounds
+      poly_uint64 idx_poly;
+      if (poly_int_tree_p (idx, &idx_poly))
+	{
+	  poly_uint64 nelts = TYPE_VECTOR_SUBPARTS (TREE_TYPE (view_op0));
+	  if (known_gt (idx_poly, nelts))
+	    return false;
+	}
       machine_mode outermode = TYPE_MODE (TREE_TYPE (view_op0));
       machine_mode extract_mode = TYPE_MODE (TREE_TYPE (ref));
 
--- a/src/gcc/gimple-lower-bitint.cc
+++ b/src/gcc/gimple-lower-bitint.cc
@@ -76,7 +76,7 @@ enum bitint_prec_kind {
 /* Caches to speed up bitint_precision_kind.  */
 
 static int small_max_prec, mid_min_prec, large_min_prec, huge_min_prec;
-static int limb_prec;
+static int limb_prec, abi_limb_prec;
 
 /* Categorize _BitInt(PREC) as small, middle, large or huge.  */
 
@@ -106,6 +106,9 @@ bitint_precision_kind (int prec)
     large_min_prec = MAX_FIXED_MODE_SIZE + 1;
   if (!limb_prec)
     limb_prec = GET_MODE_PRECISION (limb_mode);
+  if (!abi_limb_prec)
+    abi_limb_prec
+      = GET_MODE_PRECISION (as_a <scalar_int_mode> (info.abi_limb_mode));
   if (!huge_min_prec)
     {
       if (4 * limb_prec >= MAX_FIXED_MODE_SIZE)
@@ -2213,7 +2216,7 @@ range_to_prec (tree op, gimple *stmt)
    from that precision, if it is negative, the operand is sign-extended
    from -*PREC.  If PREC_STORED is NULL, it is the toplevel call,
    otherwise *PREC_STORED is prec from the innermost call without
-   range optimizations.  */
+   range optimizations (0 for uninitialized SSA_NAME).  */
 
 tree
 bitint_large_huge::handle_operand_addr (tree op, gimple *stmt,
@@ -2318,7 +2321,7 @@ bitint_large_huge::handle_operand_addr (tree op, gimple *stmt,
 	    {
 	      *prec = TYPE_UNSIGNED (TREE_TYPE (op)) ? limb_prec : -limb_prec;
 	      if (prec_stored)
-		*prec_stored = *prec;
+		*prec_stored = 0;
 	      tree var = create_tmp_var (m_limb_type);
 	      TREE_ADDRESSABLE (var) = 1;
 	      ret = build_fold_addr_expr (var);
@@ -2346,6 +2349,8 @@ bitint_large_huge::handle_operand_addr (tree op, gimple *stmt,
 		  tree rhs_type = TREE_TYPE (rhs1);
 		  int prec_stored_val = 0;
 		  ret = handle_operand_addr (rhs1, g, &prec_stored_val, prec);
+		  if (prec_stored)
+		    *prec_stored = prec_stored_val;
 		  if (TYPE_PRECISION (lhs_type) > TYPE_PRECISION (rhs_type))
 		    {
 		      if (TYPE_UNSIGNED (lhs_type)
@@ -2354,7 +2359,9 @@ bitint_large_huge::handle_operand_addr (tree op, gimple *stmt,
 		    }
 		  else
 		    {
-		      if (*prec > 0 && *prec < TYPE_PRECISION (lhs_type))
+		      if (prec_stored_val == 0)
+			/* Non-widening cast of uninitialized value.  */;
+		      else if (*prec > 0 && *prec < TYPE_PRECISION (lhs_type))
 			;
 		      else if (TYPE_UNSIGNED (lhs_type))
 			{
@@ -6066,7 +6073,7 @@ static unsigned int
 gimple_lower_bitint (void)
 {
   small_max_prec = mid_min_prec = large_min_prec = huge_min_prec = 0;
-  limb_prec = 0;
+  limb_prec = abi_limb_prec = 0;
 
   unsigned int i;
   for (i = 0; i < num_ssa_names; ++i)
@@ -6586,15 +6593,62 @@ gimple_lower_bitint (void)
 	      if (is_gimple_assign (SSA_NAME_DEF_STMT (s)))
 		switch (gimple_assign_rhs_code (SSA_NAME_DEF_STMT (s)))
 		  {
+		  case REALPART_EXPR:
 		  case IMAGPART_EXPR:
 		    {
-		      tree rhs1 = gimple_assign_rhs1 (SSA_NAME_DEF_STMT (s));
+		      gimple *ds = SSA_NAME_DEF_STMT (s);
+		      tree rhs1 = gimple_assign_rhs1 (ds);
 		      rhs1 = TREE_OPERAND (rhs1, 0);
 		      if (TREE_CODE (rhs1) == SSA_NAME)
 			{
 			  gimple *g = SSA_NAME_DEF_STMT (rhs1);
 			  if (optimizable_arith_overflow (g))
-			    continue;
+			    {
+			      if (gimple_assign_rhs_code (ds) == IMAGPART_EXPR)
+				continue;
+			      if (gimple_store_p (use_stmt))
+				{
+				  /* Punt if the cast use of IMAGPART_EXPR stmt
+				     appears before the store use_stmt, because
+				     optimizable arith overflow can't be
+				     lowered at the store location in that case.
+				     See PR121828.  */
+				  gimple_stmt_iterator gsi
+				    = gsi_for_stmt (use_stmt);
+				  unsigned int cnt = 0;
+				  do
+				    {
+				      gsi_prev_nondebug (&gsi);
+				      if (gsi_end_p (gsi))
+					break;
+				      gimple *g2 = gsi_stmt (gsi);
+				      if (g2 == ds)
+					break;
+				      if (++cnt == 64)
+					break;
+				      if (!gimple_assign_cast_p (g2))
+					continue;
+				      tree rhs2 = gimple_assign_rhs1 (g2);
+				      if (TREE_CODE (rhs2) != SSA_NAME)
+					continue;
+				      gimple *g3 = SSA_NAME_DEF_STMT (rhs2);
+				      if (!is_gimple_assign (g3))
+					continue;
+				      if (gimple_assign_rhs_code (g3)
+					  != IMAGPART_EXPR)
+					continue;
+				      rhs2 = gimple_assign_rhs1 (g3);
+				      rhs2 = TREE_OPERAND (rhs2, 0);
+				      if (rhs2 != rhs1)
+					continue;
+				      cnt = 64;
+				      break;
+				    }
+				  while (1);
+				  if (cnt == 64)
+				    break;
+				}
+			    }
 			}
 		    }
 		    /* FALLTHRU */
@@ -6604,7 +6658,6 @@ gimple_lower_bitint (void)
 		  case TRUNC_DIV_EXPR:
 		  case TRUNC_MOD_EXPR:
 		  case FIX_TRUNC_EXPR:
-		  case REALPART_EXPR:
 		    if (gimple_store_p (use_stmt)
 			&& is_gimple_assign (use_stmt)
 			&& !gimple_has_volatile_ops (use_stmt)
@@ -7024,7 +7077,20 @@ gimple_lower_bitint (void)
 		       from smaller number.  */
 		    min_prec = prec;
 		  else
-		    min_prec = CEIL (min_prec, limb_prec) * limb_prec;
+		    {
+		      min_prec = CEIL (min_prec, limb_prec) * limb_prec;
+		      if (min_prec > (unsigned) limb_prec
+			  && abi_limb_prec > limb_prec)
+			{
+			  /* For targets with ABI limb precision higher than
+			     limb precision round to ABI limb precision,
+			     otherwise c can contain padding bits.  */
+			  min_prec
+			    = CEIL (min_prec, abi_limb_prec) * abi_limb_prec;
+			  if (min_prec > prec - rem - 2 * limb_prec)
+			    min_prec = prec;
+			}
+		    }
 		  if (min_prec == 0)
 		    c = NULL_TREE;
 		  else if (min_prec == prec)
@@ -7065,6 +7131,11 @@ gimple_lower_bitint (void)
 							   vtype, c));
 			}
 		      gsi_insert_on_edge (e, g);
+		      if (min_prec == prec)
+			{
+			  edge_insertions = true;
+			  break;
+			}
 		    }
 		  if (ext == 0)
 		    {
--- a/src/gcc/gimple-match-head.cc
+++ b/src/gcc/gimple-match-head.cc
@@ -135,6 +135,16 @@ optimize_vectors_before_lowering_p ()
   return !cfun || (cfun->curr_properties & PROP_gimple_lvec) == 0;
 }
 
+/* Returns true if the expression T has no side effects
+   including not trapping. */
+static inline bool
+expr_no_side_effects_p (tree t)
+{
+  /* For gimple, there should only be gimple val's here. */
+  gcc_assert (is_gimple_val (t));
+  return true;
+}
+
 /* Return true if pow(cst, x) should be optimized into exp(log(cst) * x).
    As a workaround for SPEC CPU2017 628.pop2_s, don't do it if arg0
    is an exact integer, arg1 = phi_res +/- cst1 and phi_res = PHI <cst2, ...>
--- a/src/gcc/gimple-range-gori.cc
+++ b/src/gcc/gimple-range-gori.cc
@@ -383,6 +383,28 @@ gori_map::exports (basic_block bb)
   return m_outgoing[bb->index];
 }
 
+// Return the bitmap vector of all exports AND their dependencies from BB
+// in TMPBIT.  Calculate if necessary.  Return TMPBIT.
+
+bitmap
+gori_map::exports_and_deps (basic_block bb, bitmap tmpbit)
+{
+  if (bb->index >= (signed int)m_outgoing.length () || !m_outgoing[bb->index])
+    calculate_gori (bb);
+  bitmap_copy (tmpbit, m_outgoing[bb->index]);
+  if (!bitmap_empty_p (tmpbit))
+    {
+      tree name;
+      FOR_EACH_GORI_EXPORT_NAME (*this, bb, name)
+	{
+	  bitmap dep = get_def_chain (name);
+	  if (dep)
+	    bitmap_ior_into (tmpbit, dep);
+	}
+    }
+  return tmpbit;
+}
+
 // Return the bitmap vector of all imports to BB.  Calculate if necessary.
 
 bitmap
--- a/src/gcc/gimple-range-gori.h
+++ b/src/gcc/gimple-range-gori.h
@@ -99,6 +99,7 @@ public:
   bool is_export_p (tree name, basic_block bb = NULL);
   bool is_import_p (tree name, basic_block bb);
   bitmap exports (basic_block bb);
+  bitmap exports_and_deps (basic_block bb, bitmap tmpbit);
   bitmap imports (basic_block bb);
   void set_range_invariant (tree name, bool invariant = true);
 
@@ -224,7 +225,7 @@ bool gori_on_edge (class ssa_cache &r, edge e,
 bool gori_name_on_edge (vrange &r, tree name, edge e, range_query *q = NULL);
 
 // For each name that is an import into BB's exports..
-#define FOR_EACH_GORI_IMPORT_NAME(gori, bb, name)			\
+#define FOR_EACH_GORI_IMPORT_NAME(gori, bb, name)		\
   for (gori_export_iterator iter ((gori).imports ((bb)));	\
        ((name) = iter.get_name ());				\
        iter.next ())
@@ -235,6 +236,12 @@ bool gori_name_on_edge (vrange &r, tree name, edge e, range_query *q = NULL);
        ((name) = iter.get_name ());				\
        iter.next ())
 
+// For each name and all their dependencies possibly exported from block BB.
+#define FOR_EACH_GORI_EXPORT_AND_DEP_NAME(gori, bb, name, bm)	   \
+  for (gori_export_iterator iter ((gori).exports_and_deps ((bb),(bm))); \
+       ((name) = iter.get_name ());					   \
+       iter.next ())
+
 // Used to assist with iterating over the GORI export list in various ways
 class gori_export_iterator {
 public:
--- a/src/gcc/gimple-range-op.cc
+++ b/src/gcc/gimple-range-op.cc
@@ -1164,37 +1164,31 @@ gimple_range_op_handler::maybe_non_standard ()
   gcc_checking_assert (signed_op);
   range_op_handler unsigned_op (OP_WIDEN_MULT_UNSIGNED);
   gcc_checking_assert (unsigned_op);
+  range_op_handler signed_unsigned_op (OP_WIDEN_MULT_SIGNED_UNSIGNED);
+  gcc_checking_assert (signed_unsigned_op);
+  bool signed1, signed2;
 
   if (gimple_code (m_stmt) == GIMPLE_ASSIGN)
     switch (gimple_assign_rhs_code (m_stmt))
       {
 	case WIDEN_MULT_EXPR:
-	{
 	  m_op1 = gimple_assign_rhs1 (m_stmt);
 	  m_op2 = gimple_assign_rhs2 (m_stmt);
-	  tree ret = gimple_assign_lhs (m_stmt);
-	  bool signed1 = TYPE_SIGN (TREE_TYPE (m_op1)) == SIGNED;
-	  bool signed2 = TYPE_SIGN (TREE_TYPE (m_op2)) == SIGNED;
-	  bool signed_ret = TYPE_SIGN (TREE_TYPE (ret)) == SIGNED;
-
-	  /* Normally these operands should all have the same sign, but
-	     some passes and violate this by taking mismatched sign args.  At
-	     the moment the only one that's possible is mismatch inputs and
-	     unsigned output.  Once ranger supports signs for the operands we
-	     can properly fix it,  for now only accept the case we can do
-	     correctly.  */
-	  if ((signed1 ^ signed2) && signed_ret)
-	    return;
+	  signed1 = TYPE_SIGN (TREE_TYPE (m_op1)) == SIGNED;
+	  signed2 = TYPE_SIGN (TREE_TYPE (m_op2)) == SIGNED;
 
-	  if (signed2 && !signed1)
-	    std::swap (m_op1, m_op2);
-
-	  if (signed1 || signed2)
+	  if (signed1 != signed2)
+	    {
+	      if (signed2 && !signed1)
+		std::swap (m_op1, m_op2);
+	      m_operator = signed_unsigned_op.range_op ();
+	    }
+	  else if (signed1)
 	    m_operator = signed_op.range_op ();
 	  else
 	    m_operator = unsigned_op.range_op ();
 	  break;
-	}
+
 	default:
 	  break;
       }
@@ -1220,6 +1214,8 @@ gimple_range_op_handler::maybe_builtin_call ()
   switch (func)
     {
     case CFN_BUILT_IN_CONSTANT_P:
+      if (gimple_call_num_args (call) != 1)
+	return;
       m_op1 = gimple_call_arg (call, 0);
       if (irange::supports_p (TREE_TYPE (m_op1)))
 	m_operator = &op_cfn_constant_p;
@@ -1228,6 +1224,8 @@ gimple_range_op_handler::maybe_builtin_call ()
       break;
 
     CASE_FLT_FN (CFN_BUILT_IN_SIGNBIT):
+      if (gimple_call_num_args (call) != 1)
+	return;
       m_op1 = gimple_call_arg (call, 0);
       m_operator = &op_cfn_signbit;
       break;
@@ -1358,7 +1356,9 @@ gimple_range_op_handler::maybe_builtin_call ()
     default:
       {
 	unsigned arg;
-	if (gimple_call_fnspec (call).returns_arg (&arg) && arg == 0)
+	if (gimple_call_fnspec (call).returns_arg (&arg)
+	    && arg == 0
+	    && gimple_call_num_args (call) > 0)
 	  {
 	    m_op1 = gimple_call_arg (call, 0);
 	    m_operator = &op_cfn_pass_through_arg1;
--- a/src/gcc/gimple-ssa-store-merging.cc
+++ b/src/gcc/gimple-ssa-store-merging.cc
@@ -1057,6 +1057,8 @@ find_bswap_or_nop (gimple *stmt, struct symbolic_number *n, bool *bswap,
 		      if (count <= range / BITS_PER_MARKER)
 			{
 			  count = (count + i) * BITS_PER_MARKER % range;
+			  if (!count)
+			    return NULL;
 			  break;
 			}
 		      else
--- a/src/gcc/gimple.h
+++ b/src/gcc/gimple.h
@@ -864,7 +864,7 @@ struct GTY((tag("GSS_ASSUME")))
    tell the runtime that it should begin the transaction in
    serial-irrevocable mode.  */
 #define GTMA_DOES_GO_IRREVOCABLE	(1u << 6)
-/* The transaction contains no instrumentation code whatsover, most
+/* The transaction contains no instrumentation code whatsoever, most
    likely because it is guaranteed to go irrevocable upon entry.  */
 #define GTMA_HAS_NO_INSTRUMENTATION	(1u << 7)
 
--- a/src/gcc/gimplify-me.cc
+++ b/src/gcc/gimplify-me.cc
@@ -232,9 +232,13 @@ gimple_regimplify_operands (gimple *stmt, gimple_stmt_iterator *gsi_p)
 	  else if (i == 2
 		   && gimple_assign_single_p (stmt)
 		   && num_ops == 2)
-	    gimplify_expr (&op, &pre, NULL,
-			   rhs_predicate_for (gimple_assign_lhs (stmt)),
-			   fb_rvalue);
+	    {
+	      if (gimple_clobber_p (stmt))
+		continue;
+	      gimplify_expr (&op, &pre, NULL,
+			     rhs_predicate_for (gimple_assign_lhs (stmt)),
+			     fb_rvalue);
+	    }
 	  else if (i == 2 && is_gimple_call (stmt))
 	    {
 	      if (TREE_CODE (op) == FUNCTION_DECL)
@@ -253,8 +257,9 @@ gimple_regimplify_operands (gimple *stmt, gimple_stmt_iterator *gsi_p)
 	{
 	  bool need_temp = false;
 
-	  if (gimple_assign_single_p (stmt)
-	      && num_ops == 2)
+	  if (gimple_clobber_p (stmt))
+	    ;
+	  else if (gimple_assign_single_p (stmt) && num_ops == 2)
 	    gimplify_expr (gimple_assign_rhs1_ptr (stmt), &pre, NULL,
 			   rhs_predicate_for (gimple_assign_lhs (stmt)),
 			   fb_rvalue);
--- a/src/gcc/gimplify.cc
+++ b/src/gcc/gimplify.cc
@@ -3874,6 +3874,26 @@ gimplify_call_expr (tree *expr_p, gimple_seq *pre_p, bool want_value)
 	  *expr_p = NULL_TREE;
 	  return GS_ALL_DONE;
 	}
+      else if (ifn == IFN_UBSAN_BOUNDS
+	       && nargs == 3
+	       && integer_onep (CALL_EXPR_ARG (*expr_p, 0)))
+	{
+	  /* If first argument is one, add TYPE_MAX_VALUE (TYPE_DOMAIN (t))
+	     to 3rd argument and change first argument to 0.  This is
+	     done by ubsan_instrument_bounds so that we can use the
+	     max value from gimplify_type_sizes here instead of original
+	     expression for VLAs.  */
+	  tree type = TREE_TYPE (CALL_EXPR_ARG (*expr_p, 0));
+	  CALL_EXPR_ARG (*expr_p, 0) = build_int_cst (type, 0);
+	  gcc_assert (TREE_CODE (type) == POINTER_TYPE);
+	  type = TREE_TYPE (type);
+	  gcc_assert (TREE_CODE (type) == ARRAY_TYPE);
+	  tree maxv = TYPE_MAX_VALUE (TYPE_DOMAIN (type));
+	  gcc_assert (maxv);
+	  tree arg3 = CALL_EXPR_ARG (*expr_p, 2);
+	  CALL_EXPR_ARG (*expr_p, 2)
+	    = fold_build2 (PLUS_EXPR, TREE_TYPE (arg3), maxv, arg3);
+	}
 
       for (i = 0; i < nargs; i++)
 	{
--- a/src/gcc/ifcvt.cc
+++ b/src/gcc/ifcvt.cc
@@ -890,6 +890,10 @@ noce_emit_store_flag (struct noce_if_info *if_info, rtx x, bool reversep,
   if (cond_complex || !SCALAR_INT_MODE_P (GET_MODE (x)))
     return NULL_RTX;
 
+  /* Don't try if mode of X is more than the max fixed mode size.  */
+  if (known_le (MAX_FIXED_MODE_SIZE, GET_MODE_BITSIZE (GET_MODE (x))))
+    return NULL_RTX;
+
   return emit_store_flag (x, code, XEXP (cond, 0),
 			  XEXP (cond, 1), VOIDmode,
 			  (code == LTU || code == LEU
--- a/src/gcc/input.cc
+++ b/src/gcc/input.cc
@@ -120,10 +120,8 @@ public:
   unsigned m_use_count;
 
   /* The file_path is the key for identifying a particular file in
-     the cache.
-     For libcpp-using code, the underlying buffer for this field is
-     owned by the corresponding _cpp_file within the cpp_reader.  */
-  const char *m_file_path;
+     the cache.  This copy is owned by the slot.  */
+  char *m_file_path;
 
   FILE *m_fp;
 
@@ -367,6 +365,7 @@ file_cache::missing_trailing_newline_p (const char *file_path)
 void
 file_cache_slot::evict ()
 {
+  free (m_file_path);
   m_file_path = NULL;
   if (m_fp)
     fclose (m_fp);
@@ -462,7 +461,7 @@ file_cache_slot::create (const file_cache::input_context &in_context,
 			 const char *file_path, FILE *fp,
 			 unsigned highest_use_count)
 {
-  m_file_path = file_path;
+  m_file_path = file_path ? xstrdup (file_path) : nullptr;
   if (m_fp)
     fclose (m_fp);
   m_fp = fp;
@@ -556,6 +555,7 @@ file_cache_slot::file_cache_slot ()
 
 file_cache_slot::~file_cache_slot ()
 {
+  free (m_file_path);
   if (m_fp)
     {
       fclose (m_fp);
--- a/src/gcc/ipa-cp.cc
+++ b/src/gcc/ipa-cp.cc
@@ -1323,10 +1323,14 @@ initialize_node_lattices (struct cgraph_node *node)
       int caller_count = 0;
       node->call_for_symbol_thunks_and_aliases (count_callers, &caller_count,
 						true);
-      gcc_checking_assert (caller_count > 0);
       if (caller_count == 1)
 	node->call_for_symbol_thunks_and_aliases (set_single_call_flag,
 						  NULL, true);
+      else if (caller_count == 0)
+	{
+	  gcc_checking_assert (!opt_for_fn (node->decl, flag_toplevel_reorder));
+	  variable = true;
+	}
     }
   else
     {
@@ -5276,9 +5280,9 @@ self_recursive_pass_through_p (cgraph_edge *cs, ipa_jump_func *jfunc, int i,
 			       bool simple = true)
 {
   enum availability availability;
-  if (cs->caller == cs->callee->function_symbol (&availability)
+  if (jfunc->type == IPA_JF_PASS_THROUGH
+      && cs->caller == cs->callee->function_symbol (&availability)
       && availability > AVAIL_INTERPOSABLE
-      && jfunc->type == IPA_JF_PASS_THROUGH
       && (!simple || ipa_get_jf_pass_through_operation (jfunc) == NOP_EXPR)
       && ipa_get_jf_pass_through_formal_id (jfunc) == i
       && ipa_node_params_sum->get (cs->caller)
@@ -5287,6 +5291,25 @@ self_recursive_pass_through_p (cgraph_edge *cs, ipa_jump_func *jfunc, int i,
   return false;
 }
 
+/* Return true if JFUNC, which describes the i-th parameter of call CS, is an
+   ancestor function with zero offset to itself when the cgraph_node involved
+   is not an IPA-CP clone.  */
+
+static bool
+self_recursive_ancestor_p (cgraph_edge *cs, ipa_jump_func *jfunc, int i)
+{
+  enum availability availability;
+  if (jfunc->type == IPA_JF_ANCESTOR
+      && cs->caller == cs->callee->function_symbol (&availability)
+      && availability > AVAIL_INTERPOSABLE
+      && ipa_get_jf_ancestor_offset (jfunc) == 0
+      && ipa_get_jf_ancestor_formal_id (jfunc) == i
+      && ipa_node_params_sum->get (cs->caller)
+      && !ipa_node_params_sum->get (cs->caller)->ipcp_orig_node)
+    return true;
+  return false;
+}
+
 /* Return true if JFUNC, which describes a part of an aggregate represented or
    pointed to by the i-th parameter of call CS, is a pass-through function to
    itself when the cgraph_node involved is not an IPA-CP clone..  When
@@ -5370,6 +5393,8 @@ find_more_scalar_values_for_callers_subset (struct cgraph_node *node,
 				ipa_get_jf_pass_through_operand (jump_func),
 				type);
 	    }
+	  else if (self_recursive_ancestor_p (cs, jump_func, i))
+	    continue;
 	  else
 	    t = ipa_value_from_jfunc (ipa_node_params_sum->get (cs->caller),
 				      jump_func, type);
@@ -5535,7 +5560,8 @@ push_agg_values_for_index_from_edge (struct cgraph_edge *cs, int index,
 	      && !src_plats->aggs_bottom
 	      && (agg_jf_preserved || !src_plats->aggs_by_ref))
 	    {
-	      if (interim && self_recursive_pass_through_p (cs, jfunc, index))
+	      if (interim && (self_recursive_pass_through_p (cs, jfunc, index)
+			      || self_recursive_ancestor_p (cs, jfunc, index)))
 		{
 		  interim->push_adjusted_values (src_idx, index, unit_delta,
 						 res);
--- a/src/gcc/ira-color.cc
+++ b/src/gcc/ira-color.cc
@@ -3320,6 +3320,9 @@ improve_allocation (void)
       for (j = 0; j < class_size; j++)
 	{
 	  hregno = ira_class_hard_regs[aclass][j];
+	  if (NUM_REGISTER_FILTERS
+	      && !test_register_filters (ALLOCNO_REGISTER_FILTERS (a), hregno))
+	    continue;
 	  if (check_hard_reg_p (a, hregno,
 				conflicting_regs, profitable_hard_regs)
 	      && min_cost > costs[hregno])
--- a/src/gcc/lra-constraints.cc
+++ b/src/gcc/lra-constraints.cc
@@ -538,6 +538,7 @@ get_equiv (rtx x)
   rtx res;
 
   if (! REG_P (x) || (regno = REGNO (x)) < FIRST_PSEUDO_REGISTER
+      || regno >= ira_reg_equiv_len
       || ! ira_reg_equiv[regno].defined_p
       || ! ira_reg_equiv[regno].profitable_p
       || lra_get_regno_hard_regno (regno) >= 0)
--- a/src/gcc/lra-remat.cc
+++ b/src/gcc/lra-remat.cc
@@ -81,8 +81,10 @@ typedef const struct cand *const_cand_t;
 
 /* Insn candidates for rematerialization.  The candidate insn should
    have the following properies:
-   o no any memory (as access to memory is non-profitable)
+   o no any memory (as access to memory is non-profitable) or
+     div/mod operations (as they are usually more expensive than loads)
    o no INOUT regs (it means no non-paradoxical subreg of output reg)
+   o no multiple output pseudos
    o one output spilled pseudo (or reload pseudo of a spilled pseudo)
    o all other pseudos are with assigned hard regs.  */
 struct cand
@@ -249,12 +251,12 @@ finish_cand_table (void)
 
 
 
-/* Return true if X contains memory or some UNSPEC.  We cannot just
-   check insn operands as memory or unspec might be not an operand
-   itself but contain an operand.  Insn with memory access is not
-   profitable for rematerialization.  Rematerialization of UNSPEC
-   might result in wrong code generation as the UNPEC effect is
-   unknown (e.g. generating a label).  */
+/* Return true if X contains memory, some UNSPEC, or expensive operations.  We
+   cannot just check insn operands as memory or unspec might be not an operand
+   itself but contain an operand.  Insns with memory access or expensive ones
+   are not profitable for rematerialization.  Rematerialization of UNSPEC might
+   result in wrong code generation as the UNPEC effect is unknown
+   (e.g. generating a label).  */
 static bool
 bad_for_rematerialization_p (rtx x)
 {
@@ -262,7 +264,11 @@ bad_for_rematerialization_p (rtx x)
   const char *fmt;
   enum rtx_code code;
 
-  if (MEM_P (x) || GET_CODE (x) == UNSPEC || GET_CODE (x) == UNSPEC_VOLATILE)
+  if (MEM_P (x) || GET_CODE (x) == UNSPEC || GET_CODE (x) == UNSPEC_VOLATILE
+      /* Usually the following operations are expensive and does not worth to
+	 rematerialize: */
+      || GET_CODE(x) == DIV || GET_CODE(x) == UDIV
+      || GET_CODE(x) == MOD || GET_CODE(x) == UMOD)
     return true;
   code = GET_CODE (x);
   fmt = GET_RTX_FORMAT (code);
@@ -308,8 +314,7 @@ operand_to_remat (rtx_insn *insn)
 	 cannot know sp offset at a rematerialization place.  */
       if (reg->regno == STACK_POINTER_REGNUM && frame_pointer_needed)
 	return -1;
-      else if (reg->type == OP_OUT && ! reg->subreg_p
-	       && find_regno_note (insn, REG_UNUSED, reg->regno) == NULL)
+      else if (reg->type == OP_OUT)
 	{
 	  /* We permits only one spilled reg.  */
 	  if (found_reg != NULL)
--- a/src/gcc/lto-wrapper.cc
+++ b/src/gcc/lto-wrapper.cc
@@ -1193,18 +1193,16 @@ debug_objcopy (const char *infile, bool rename)
 
   const char *p;
   const char *orig_infile = infile;
-  off_t inoff = 0;
-  long loffset;
+  int64_t inoff = 0;
   int consumed;
   if ((p = strrchr (infile, '@'))
       && p != infile
-      && sscanf (p, "@%li%n", &loffset, &consumed) >= 1
+      && sscanf (p, "@%" PRIi64 "%n", &inoff, &consumed) >= 1
       && strlen (p) == (unsigned int) consumed)
     {
       char *fname = xstrdup (infile);
       fname[p - infile] = '\0';
       infile = fname;
-      inoff = (off_t) loffset;
     }
   int infd = open (infile, O_RDONLY | O_BINARY);
   if (infd == -1)
@@ -1477,8 +1475,7 @@ run_gcc (unsigned argc, char *argv[])
     {
       char *p;
       int fd;
-      off_t file_offset = 0;
-      long loffset;
+      int64_t file_offset = 0;
       int consumed;
       char *filename = argv[i];
 
@@ -1491,14 +1488,13 @@ run_gcc (unsigned argc, char *argv[])
 	}
 
       if ((p = strrchr (argv[i], '@'))
-	  && p != argv[i] 
-	  && sscanf (p, "@%li%n", &loffset, &consumed) >= 1
+	  && p != argv[i]
+	  && sscanf (p, "@%" PRIi64 "%n", &file_offset, &consumed) >= 1
 	  && strlen (p) == (unsigned int) consumed)
 	{
 	  filename = XNEWVEC (char, p - argv[i] + 1);
 	  memcpy (filename, argv[i], p - argv[i]);
 	  filename[p - argv[i]] = '\0';
-	  file_offset = (off_t) loffset;
 	}
       fd = open (filename, O_RDONLY | O_BINARY);
       /* Linker plugin passes -fresolution and -flinker-output options.
@@ -1779,20 +1775,18 @@ cont1:
       for (i = 0; i < num_offload_files; i++)
 	{
 	  char *p;
-	  long loffset;
 	  int fd, consumed;
-	  off_t file_offset = 0;
+	  int64_t file_offset = 0;
 	  char *filename = offload_argv[i];
 
 	  if ((p = strrchr (offload_argv[i], '@'))
 	      && p != offload_argv[i]
-	      && sscanf (p, "@%li%n", &loffset, &consumed) >= 1
+	      && sscanf (p, "@%" PRIi64 "%n", &file_offset, &consumed) >= 1
 	      && strlen (p) == (unsigned int) consumed)
 	    {
 	      filename = XNEWVEC (char, p - offload_argv[i] + 1);
 	      memcpy (filename, offload_argv[i], p - offload_argv[i]);
 	      filename[p - offload_argv[i]] = '\0';
-	      file_offset = (off_t) loffset;
 	    }
 	  fd = open (filename, O_RDONLY | O_BINARY);
 	  if (fd == -1)
--- a/src/gcc/lto/ChangeLog
+++ b/src/gcc/lto/ChangeLog
@@ -1,3 +1,31 @@
+2026-02-26  Michal Jires  <mjires@suse.cz>
+
+	Backported from master:
+	2026-01-11  Michal Jires  <mjires@suse.cz>
+
+	PR lto/121588
+	* lto-symtab.cc (lto_symtab_merge_symbols): Set body_removed
+	for symbols resolved outside of IR.
+
+2025-12-03  Siddhesh Poyarekar  <siddhesh@gotplt.org>
+
+	Backported from master:
+	2025-11-25  Siddhesh Poyarekar  <siddhesh@gotplt.org>
+
+	PR lto/122515
+	* lto-common.cc (lto_read_section_data): Avoid using SSIZE_MAX.
+
+2025-11-18  Siddhesh Poyarekar  <siddhesh@gotplt.org>
+
+	Backported from master:
+	2025-11-04  Siddhesh Poyarekar  <siddhesh@gotplt.org>
+
+	PR lto/122515
+	* lto.h (lto_section_slot): Set type of START to off_t.
+	* lto-common.cc (lto_read_section_data): Adjust.
+	* lto-object.cc (lto_obj_file_open): Set type of OFFSET to
+	int64_t.
+
 2025-05-23  Release Manager
 
 	* GCC 14.3.0 released.
--- a/src/gcc/lto/lto-common.cc
+++ b/src/gcc/lto/lto-common.cc
@@ -2377,15 +2377,15 @@ static size_t page_mask;
 
 static char *
 lto_read_section_data (struct lto_file_decl_data *file_data,
-		       intptr_t offset, size_t len)
+		       off_t offset, size_t len)
 {
   char *result;
   static int fd = -1;
   static char *fd_name;
 #if LTO_MMAP_IO
-  intptr_t computed_len;
-  intptr_t computed_offset;
-  intptr_t diff;
+  size_t computed_len;
+  off_t computed_offset;
+  off_t diff;
 #endif
 
   /* Keep a single-entry file-descriptor cache.  The last file we
@@ -2418,9 +2418,15 @@ lto_read_section_data (struct lto_file_decl_data *file_data,
       page_mask = ~(page_size - 1);
     }
 
-  computed_offset = offset & page_mask;
+  computed_offset = offset & ((off_t) page_mask);
   diff = offset - computed_offset;
-  computed_len = len + diff;
+  if (len > (((size_t) -1) >> 1) - diff)
+    {
+      fatal_error (input_location, "Cannot map %s: section is too long",
+		   file_data->file_name);
+      return NULL;
+    }
+  computed_len = (size_t) diff + len;
 
   result = (char *) mmap (NULL, computed_len, PROT_READ, MAP_PRIVATE,
 			  fd, computed_offset);
--- a/src/gcc/lto/lto-object.cc
+++ b/src/gcc/lto/lto-object.cc
@@ -69,10 +69,9 @@ lto_file *
 lto_obj_file_open (const char *filename, bool writable)
 {
   const char *offset_p;
-  long loffset;
   int consumed;
   char *fname;
-  off_t offset;
+  int64_t offset;
   struct lto_simple_object *lo;
   const char *errmsg;
   int err;
@@ -80,13 +79,12 @@ lto_obj_file_open (const char *filename, bool writable)
   offset_p = strrchr (filename, '@');
   if (offset_p != NULL
       && offset_p != filename
-      && sscanf (offset_p, "@%li%n", &loffset, &consumed) >= 1
+      && sscanf (offset_p, "@%" PRIi64 "%n", &offset, &consumed) >= 1
       && strlen (offset_p) == (unsigned int) consumed)
     {
       fname = XNEWVEC (char, offset_p - filename + 1);
       memcpy (fname, filename, offset_p - filename);
       fname[offset_p - filename] = '\0';
-      offset = (off_t) loffset;
     }
   else
     {
--- a/src/gcc/lto/lto-symtab.cc
+++ b/src/gcc/lto/lto-symtab.cc
@@ -1040,6 +1040,7 @@ lto_symtab_merge_symbols (void)
 		      node->analyzed = node->definition = false;
 		      node->remove_all_references ();
 		    }
+		  node->body_removed = true;
 		}
 	      DECL_EXTERNAL (node->decl) = 1;
 	    }
--- a/src/gcc/lto/lto.h
+++ b/src/gcc/lto/lto.h
@@ -58,7 +58,7 @@ extern int lto_link_dump_id, decl_merge_dump_id, partition_dump_id;
 struct lto_section_slot
 {
   const char *name;
-  intptr_t start;
+  off_t start;
   size_t len;
   struct lto_section_slot *next;
 };
--- a/src/gcc/machmode.def
+++ b/src/gcc/machmode.def
@@ -148,12 +148,12 @@ along with GCC; see the file COPYING3.  If not see
 	mode, with smaller numbers indicating a higher priority.
 
      VECTOR_BOOL_MODE (NAME, COUNT, COMPONENT, BYTESIZE)
-        Create a vector mode called NAME that contains COUNT boolean
-        elements and occupies BYTESIZE bytes in total.  Each boolean
-        element is of COMPONENT type and occupies (COUNT * BITS_PER_UNIT) /
-        BYTESIZE bits, with the element at index 0 occupying the lsb of the
-        first byte in memory.  Only the lowest bit of each element is
-        significant.
+	Create a vector mode called NAME that contains COUNT boolean
+	elements and occupies BYTESIZE bytes in total.  Each boolean
+	element is of COMPONENT type and occupies ((BYTESIZE * BITS_PER_UNIT)
+	/ COUNT) bits, with the element at index 0 occupying the lsb of the
+	first byte in memory.  Only the lowest bit of each element is
+	significant.
 
      OPAQUE_MODE (NAME, BYTESIZE)
         Create an opaque mode called NAME that is BYTESIZE bytes wide.
--- a/src/gcc/match.pd
+++ b/src/gcc/match.pd
@@ -2906,7 +2906,7 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
 #if GENERIC
 (simplify
   (pointer_plus (convert:s (pointer_plus:s @0 @1)) @3)
-  (convert:type (pointer_plus @0 (plus @1 @3))))
+  (pointer_plus (convert:type @0) (plus @1 @3)))
 #endif
 
 /* Pattern match
@@ -4249,7 +4249,8 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
         (op:c @2 @1))
   (if (INTEGRAL_TYPE_P (type)
        && TYPE_PRECISION (type) > 1
-       && (INTEGRAL_TYPE_P (TREE_TYPE (@0))))
+       && INTEGRAL_TYPE_P (TREE_TYPE (@0))
+       && expr_no_side_effects_p (@2))
        (op (mult (convert:type @0) @2) @1))))
 
 /* (zero_one != 0) ? z <op> y : y -> ((typeof(y))zero_one * z) <op> y */
@@ -4261,7 +4262,8 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
         @1)
   (if (INTEGRAL_TYPE_P (type)
        && TYPE_PRECISION (type) > 1
-       && (INTEGRAL_TYPE_P (TREE_TYPE (@0))))
+       && INTEGRAL_TYPE_P (TREE_TYPE (@0))
+       && expr_no_side_effects_p (@2))
        (op (mult (convert:type @0) @2) @1))))
 
 /* ?: Value replacement. */
@@ -7468,7 +7470,7 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
    (if (TYPE_UNSIGNED (TREE_TYPE (@0)))
     (convert (gt @0 (trunc_div! { TYPE_MAX_VALUE (TREE_TYPE (@0)); } @1)))
     (if (TYPE_MIN_VALUE (TREE_TYPE (@0)))
-     (if (integer_minus_onep (@1))
+     (if (!TYPE_UNSIGNED (TREE_TYPE (@1)) && integer_minus_onep (@1))
       (convert (eq @0 { TYPE_MIN_VALUE (TREE_TYPE (@0)); }))
       (with
        {
@@ -9747,6 +9749,7 @@ and,
 			 ? gimple_assign_rhs1 (SSA_NAME_DEF_STMT (@0)) : @0);
 	    tree elt = ctor_single_nonzero_element (ctor); }
       (if (elt
+	   && types_match (type, TREE_TYPE (elt))
 	   && !HONOR_SNANS (type)
 	   && !HONOR_SIGNED_ZEROS (type))
 	{ elt; }))))
--- a/src/gcc/omp-expand.cc
+++ b/src/gcc/omp-expand.cc
@@ -1861,6 +1861,7 @@ expand_omp_for_init_counts (struct omp_for_data *fd, gimple_stmt_iterator *gsi,
 	}
     }
   bool rect_count_seen = false;
+  bool init_n2 = SSA_VAR_P (fd->loop.n2) && zero_iter1_bb;
   for (i = 0; i < (fd->ordered ? fd->ordered : fd->collapse); i++)
     {
       tree itype = TREE_TYPE (fd->loops[i].v);
@@ -1885,6 +1886,21 @@ expand_omp_for_init_counts (struct omp_for_data *fd, gimple_stmt_iterator *gsi,
 	{
 	  gcond *cond_stmt;
 	  tree n1, n2;
+	  if (init_n2 && i < fd->collapse && !rect_count_seen)
+	    {
+	      /* When called with non-NULL zero_iter1_bb, we won't clear
+		 fd->loop.n2 in the if (zero_iter_bb == NULL) code below
+		 and if it is prior to storing fd->loop.n2 where
+		 rect_count_seen is set, it could be used uninitialized.
+		 As zero_iter1_bb in that case can be reached also if there
+		 are non-zero iterations, the clearing can't be emitted
+		 to the zero_iter1_bb, but needs to be done before the
+		 condition.  */
+	      gassign *assign_stmt
+		= gimple_build_assign (fd->loop.n2, build_zero_cst (type));
+	      gsi_insert_before (gsi, assign_stmt, GSI_SAME_STMT);
+	      init_n2 = false;
+	    }
 	  n1 = fold_convert (itype, unshare_expr (fd->loops[i].n1));
 	  n1 = force_gimple_operand_gsi (gsi, n1, true, NULL_TREE,
 					 true, GSI_SAME_STMT);
@@ -3249,7 +3265,7 @@ extract_omp_for_update_vars (struct omp_for_data *fd, tree *nonrect_bounds,
 	  if (DECL_P (v) && TREE_ADDRESSABLE (v))
 	    v = force_gimple_operand_gsi (&gsi, v, true, NULL_TREE,
 					  false, GSI_CONTINUE_LINKING);
-	  t = fold_build2 (fd->loops[i].cond_code, boolean_type_node, v, t);
+	  t = build2 (fd->loops[i].cond_code, boolean_type_node, v, t);
 	  stmt = gimple_build_cond_empty (t);
 	  gsi_insert_after (&gsi, stmt, GSI_CONTINUE_LINKING);
 	  if (walk_tree (gimple_cond_lhs_ptr (as_a <gcond *> (stmt)),
--- a/src/gcc/omp-low.cc
+++ b/src/gcc/omp-low.cc
@@ -14270,6 +14270,8 @@ lower_omp_regimplify_operands_p (tree *tp, int *walk_subtrees,
       lower_omp_regimplify_operands_data *ldata
 	= (lower_omp_regimplify_operands_data *) wi->info;
       tree o = maybe_lookup_decl (t, ldata->ctx);
+      if (o == NULL_TREE)
+	o = maybe_lookup_decl_in_outer_ctx (t, ldata->ctx);
       if (o != t)
 	{
 	  ldata->decls->safe_push (DECL_VALUE_EXPR (*tp));
@@ -14934,6 +14936,19 @@ diagnose_sb_2 (gimple_stmt_iterator *gsi_p, bool *handled_ops_p,
       }
       break;
 
+    case GIMPLE_ASM:
+      {
+	gasm *asm_stmt = as_a <gasm *> (stmt);
+	for (unsigned i = 0; i < gimple_asm_nlabels (asm_stmt); ++i)
+	  {
+	    tree lab = TREE_VALUE (gimple_asm_label_op (asm_stmt, i));
+	    n = splay_tree_lookup (all_labels, (splay_tree_key) lab);
+	    if (n && diagnose_sb_0 (gsi_p, context, (gimple *) n->value))
+	      break;
+	  }
+      }
+      break;
+
     case GIMPLE_RETURN:
       diagnose_sb_0 (gsi_p, context, NULL);
       break;
--- a/src/gcc/optabs.cc
+++ b/src/gcc/optabs.cc
@@ -421,9 +421,9 @@ force_expand_binop (machine_mode mode, optab binoptab,
   return true;
 }
 
-/* Create a new vector value in VMODE with all elements set to OP.  The
-   mode of OP must be the element mode of VMODE.  If OP is a constant,
-   then the return value will be a constant.  */
+/* Create a new vector value in VMODE with all elements set to OP.  If OP
+   is not a constant, the mode of it must be the element mode of VMODE.
+   If OP is a constant, then the return value will be a constant.  */
 
 rtx
 expand_vector_broadcast (machine_mode vmode, rtx op)
@@ -1368,8 +1368,7 @@ avoid_expensive_constant (machine_mode mode, optab binoptab,
 static rtx
 expand_binop_directly (enum insn_code icode, machine_mode mode, optab binoptab,
 		       rtx op0, rtx op1,
-		       rtx target, int unsignedp, enum optab_methods methods,
-		       rtx_insn *last)
+		       rtx target, int unsignedp, enum optab_methods methods)
 {
   machine_mode xmode0 = insn_data[(int) icode].operand[1].mode;
   machine_mode xmode1 = insn_data[(int) icode].operand[2].mode;
@@ -1379,6 +1378,7 @@ expand_binop_directly (enum insn_code icode, machine_mode mode, optab binoptab,
   rtx_insn *pat;
   rtx xop0 = op0, xop1 = op1;
   bool canonicalize_op1 = false;
+  rtx_insn *last = get_last_insn ();
 
   /* If it is a commutative operator and the modes would match
      if we would swap the operands, we can save the conversions.  */
@@ -1443,10 +1443,7 @@ expand_binop_directly (enum insn_code icode, machine_mode mode, optab binoptab,
       tmp_mode = insn_data[(int) icode].operand[0].mode;
       if (VECTOR_MODE_P (mode)
 	  && maybe_ne (GET_MODE_NUNITS (tmp_mode), 2 * GET_MODE_NUNITS (mode)))
-	{
-	  delete_insns_since (last);
-	  return NULL_RTX;
-	}
+	return NULL_RTX;
     }
   else
     tmp_mode = mode;
@@ -1466,14 +1463,14 @@ expand_binop_directly (enum insn_code icode, machine_mode mode, optab binoptab,
 			       ops[1].value, ops[2].value, mode0))
 	{
 	  delete_insns_since (last);
-	  return expand_binop (mode, binoptab, op0, op1, NULL_RTX,
-			       unsignedp, methods);
+	  return expand_binop_directly (icode, mode, binoptab, op0, op1,
+					NULL_RTX, unsignedp, methods);
 	}
 
       emit_insn (pat);
       return ops[0].value;
     }
-  delete_insns_since (last);
+
   return NULL_RTX;
 }
 
@@ -1542,9 +1539,10 @@ expand_binop (machine_mode mode, optab binoptab, rtx op0, rtx op1,
       if (icode != CODE_FOR_nothing)
 	{
 	  temp = expand_binop_directly (icode, mode, binoptab, op0, op1,
-					target, unsignedp, methods, last);
+					target, unsignedp, methods);
 	  if (temp)
 	    return temp;
+	  delete_insns_since (last);
 	}
     }
 
@@ -1570,9 +1568,10 @@ expand_binop (machine_mode mode, optab binoptab, rtx op0, rtx op1,
 			       NULL_RTX, unsignedp, OPTAB_DIRECT);
 
       temp = expand_binop_directly (icode, int_mode, otheroptab, op0, newop1,
-				    target, unsignedp, methods, last);
+				    target, unsignedp, methods);
       if (temp)
 	return temp;
+      delete_insns_since (last);
     }
 
   /* If this is a multiply, see if we can do a widening operation that
@@ -1623,22 +1622,33 @@ expand_binop (machine_mode mode, optab binoptab, rtx op0, rtx op1,
       if (otheroptab
 	  && (icode = optab_handler (otheroptab, mode)) != CODE_FOR_nothing)
 	{
-	  /* The scalar may have been extended to be too wide.  Truncate
-	     it back to the proper size to fit in the broadcast vector.  */
+	  /* The scalar may be wider or narrower than the vector element.
+	     Truncate or extend it to the proper size to fit in the
+	     broadcast vector.  */
 	  scalar_mode inner_mode = GET_MODE_INNER (mode);
-	  if (!CONST_INT_P (op1)
-	      && (GET_MODE_BITSIZE (as_a <scalar_int_mode> (GET_MODE (op1)))
-		  > GET_MODE_BITSIZE (inner_mode)))
-	    op1 = force_reg (inner_mode,
-			     simplify_gen_unary (TRUNCATE, inner_mode, op1,
-						 GET_MODE (op1)));
+	  if (!CONST_INT_P (op1))
+	    {
+	      auto mode1 = as_a <scalar_int_mode> (GET_MODE (op1));
+	      int size1 = GET_MODE_BITSIZE (mode1);
+	      int inner_size = GET_MODE_BITSIZE (inner_mode);
+
+	      if (size1 != inner_size)
+		{
+		  auto unary = size1 > inner_size ? TRUNCATE : ZERO_EXTEND;
+		  op1 = force_reg (inner_mode,
+				   simplify_gen_unary (unary, inner_mode,
+						       op1, mode1));
+		}
+	    }
+
 	  rtx vop1 = expand_vector_broadcast (mode, op1);
 	  if (vop1)
 	    {
 	      temp = expand_binop_directly (icode, mode, otheroptab, op0, vop1,
-					    target, unsignedp, methods, last);
+					    target, unsignedp, methods);
 	      if (temp)
 		return temp;
+	      delete_insns_since (last);
 	    }
 	}
     }
--- a/src/gcc/range-op.cc
+++ b/src/gcc/range-op.cc
@@ -2280,12 +2280,10 @@ operator_widen_mult_signed::wi_fold (irange &r, tree type,
 				     const wide_int &rh_lb,
 				     const wide_int &rh_ub) const
 {
-  signop s = TYPE_SIGN (type);
-
-  wide_int lh_wlb = wide_int::from (lh_lb, wi::get_precision (lh_lb) * 2, SIGNED);
-  wide_int lh_wub = wide_int::from (lh_ub, wi::get_precision (lh_ub) * 2, SIGNED);
-  wide_int rh_wlb = wide_int::from (rh_lb, wi::get_precision (rh_lb) * 2, s);
-  wide_int rh_wub = wide_int::from (rh_ub, wi::get_precision (rh_ub) * 2, s);
+  wide_int lh_wlb = wide_int::from (lh_lb, TYPE_PRECISION (type), SIGNED);
+  wide_int lh_wub = wide_int::from (lh_ub, TYPE_PRECISION (type), SIGNED);
+  wide_int rh_wlb = wide_int::from (rh_lb, TYPE_PRECISION (type), SIGNED);
+  wide_int rh_wub = wide_int::from (rh_ub, TYPE_PRECISION (type), SIGNED);
 
   /* We don't expect a widening multiplication to be able to overflow but range
      calculations for multiplications are complicated.  After widening the
@@ -2293,7 +2291,6 @@ operator_widen_mult_signed::wi_fold (irange &r, tree type,
   return op_mult.wi_fold (r, type, lh_wlb, lh_wub, rh_wlb, rh_wub);
 }
 
-
 class operator_widen_mult_unsigned : public range_operator
 {
 public:
@@ -2312,12 +2309,39 @@ operator_widen_mult_unsigned::wi_fold (irange &r, tree type,
 				       const wide_int &rh_lb,
 				       const wide_int &rh_ub) const
 {
-  signop s = TYPE_SIGN (type);
+  wide_int lh_wlb = wide_int::from (lh_lb, TYPE_PRECISION (type), UNSIGNED);
+  wide_int lh_wub = wide_int::from (lh_ub, TYPE_PRECISION (type), UNSIGNED);
+  wide_int rh_wlb = wide_int::from (rh_lb, TYPE_PRECISION (type), UNSIGNED);
+  wide_int rh_wub = wide_int::from (rh_ub, TYPE_PRECISION (type), UNSIGNED);
 
-  wide_int lh_wlb = wide_int::from (lh_lb, wi::get_precision (lh_lb) * 2, UNSIGNED);
-  wide_int lh_wub = wide_int::from (lh_ub, wi::get_precision (lh_ub) * 2, UNSIGNED);
-  wide_int rh_wlb = wide_int::from (rh_lb, wi::get_precision (rh_lb) * 2, s);
-  wide_int rh_wub = wide_int::from (rh_ub, wi::get_precision (rh_ub) * 2, s);
+  /* We don't expect a widening multiplication to be able to overflow but range
+     calculations for multiplications are complicated.  After widening the
+     operands lets call the base class.  */
+  return op_mult.wi_fold (r, type, lh_wlb, lh_wub, rh_wlb, rh_wub);
+}
+
+class operator_widen_mult_signed_unsigned : public range_operator
+{
+public:
+  virtual void wi_fold (irange &r, tree type,
+			const wide_int &lh_lb,
+			const wide_int &lh_ub,
+			const wide_int &rh_lb,
+			const wide_int &rh_ub)
+    const;
+} op_widen_mult_signed_unsigned;
+
+void
+operator_widen_mult_signed_unsigned::wi_fold (irange &r, tree type,
+					      const wide_int &lh_lb,
+					      const wide_int &lh_ub,
+					      const wide_int &rh_lb,
+					      const wide_int &rh_ub) const
+{
+  wide_int lh_wlb = wide_int::from (lh_lb, TYPE_PRECISION (type), SIGNED);
+  wide_int lh_wub = wide_int::from (lh_ub, TYPE_PRECISION (type), SIGNED);
+  wide_int rh_wlb = wide_int::from (rh_lb, TYPE_PRECISION (type), UNSIGNED);
+  wide_int rh_wub = wide_int::from (rh_ub, TYPE_PRECISION (type), UNSIGNED);
 
   /* We don't expect a widening multiplication to be able to overflow but range
      calculations for multiplications are complicated.  After widening the
@@ -4452,6 +4476,7 @@ range_op_table::initialize_integral_ops ()
   set (ABSU_EXPR, op_absu);
   set (OP_WIDEN_MULT_SIGNED, op_widen_mult_signed);
   set (OP_WIDEN_MULT_UNSIGNED, op_widen_mult_unsigned);
+  set (OP_WIDEN_MULT_SIGNED_UNSIGNED, op_widen_mult_signed_unsigned);
   set (OP_WIDEN_PLUS_SIGNED, op_widen_plus_signed);
   set (OP_WIDEN_PLUS_UNSIGNED, op_widen_plus_unsigned);
 
--- a/src/gcc/range-op.h
+++ b/src/gcc/range-op.h
@@ -287,11 +287,12 @@ extern void wi_set_zero_nonzero_bits (tree type,
 // Add them to the end of the tree-code vector, and provide a name for
 // each allowing for easy access when required.
 
-#define OP_WIDEN_MULT_SIGNED	((unsigned) MAX_TREE_CODES)
-#define OP_WIDEN_MULT_UNSIGNED	((unsigned) MAX_TREE_CODES + 1)
-#define OP_WIDEN_PLUS_SIGNED	((unsigned) MAX_TREE_CODES + 2)
-#define OP_WIDEN_PLUS_UNSIGNED	((unsigned) MAX_TREE_CODES + 3)
-#define RANGE_OP_TABLE_SIZE	((unsigned) MAX_TREE_CODES + 4)
+#define OP_WIDEN_MULT_SIGNED		((unsigned) MAX_TREE_CODES)
+#define OP_WIDEN_MULT_UNSIGNED		((unsigned) MAX_TREE_CODES + 1)
+#define OP_WIDEN_MULT_SIGNED_UNSIGNED	((unsigned) MAX_TREE_CODES + 2)
+#define OP_WIDEN_PLUS_SIGNED		((unsigned) MAX_TREE_CODES + 3)
+#define OP_WIDEN_PLUS_UNSIGNED		((unsigned) MAX_TREE_CODES + 4)
+#define RANGE_OP_TABLE_SIZE		((unsigned) MAX_TREE_CODES + 5)
 
 // This implements the range operator tables as local objects.
 
--- a/src/gcc/real.cc
+++ b/src/gcc/real.cc
@@ -101,7 +101,7 @@ static int do_compare (const REAL_VALUE_TYPE *, const REAL_VALUE_TYPE *, int);
 static void do_fix_trunc (REAL_VALUE_TYPE *, const REAL_VALUE_TYPE *);
 
 static unsigned long rtd_divmod (REAL_VALUE_TYPE *, REAL_VALUE_TYPE *);
-static void decimal_from_integer (REAL_VALUE_TYPE *);
+static void decimal_from_integer (REAL_VALUE_TYPE *, int);
 static void decimal_integer_string (char *, const REAL_VALUE_TYPE *,
 				    size_t);
 
@@ -2230,7 +2230,6 @@ real_from_integer (REAL_VALUE_TYPE *r, format_helper fmt,
     {
       unsigned int len = val_in.get_precision ();
       int i, j, e = 0;
-      int maxbitlen = MAX_BITSIZE_MODE_ANY_INT + HOST_BITS_PER_WIDE_INT;
       const unsigned int realmax = (SIGNIFICAND_BITS / HOST_BITS_PER_WIDE_INT
 				    * HOST_BITS_PER_WIDE_INT);
 
@@ -2238,12 +2237,6 @@ real_from_integer (REAL_VALUE_TYPE *r, format_helper fmt,
       r->cl = rvc_normal;
       r->sign = wi::neg_p (val_in, sgn);
 
-      /* We have to ensure we can negate the largest negative number.  */
-      wide_int val = wide_int::from (val_in, maxbitlen, sgn);
-
-      if (r->sign)
-	val = -val;
-
       /* Ensure a multiple of HOST_BITS_PER_WIDE_INT, ceiling, as elt
 	 won't work with precisions that are not a multiple of
 	 HOST_BITS_PER_WIDE_INT.  */
@@ -2252,7 +2245,13 @@ real_from_integer (REAL_VALUE_TYPE *r, format_helper fmt,
       /* Ensure we can represent the largest negative number.  */
       len += 1;
 
-      len = len/HOST_BITS_PER_WIDE_INT * HOST_BITS_PER_WIDE_INT;
+      len = len / HOST_BITS_PER_WIDE_INT * HOST_BITS_PER_WIDE_INT;
+
+      /* We have to ensure we can negate the largest negative number.  */
+      wide_int val = wide_int::from (val_in, len, sgn);
+
+      if (r->sign)
+	val = -val;
 
       /* Cap the size to the size allowed by real.h.  */
       if (len > realmax)
@@ -2260,14 +2259,18 @@ real_from_integer (REAL_VALUE_TYPE *r, format_helper fmt,
 	  HOST_WIDE_INT cnt_l_z;
 	  cnt_l_z = wi::clz (val);
 
-	  if (maxbitlen - cnt_l_z > realmax)
+	  if (len - cnt_l_z > realmax)
 	    {
-	      e = maxbitlen - cnt_l_z - realmax;
+	      e = len - cnt_l_z - realmax;
 
 	      /* This value is too large, we must shift it right to
 		 preserve all the bits we can, and then bump the
-		 exponent up by that amount.  */
-	      val = wi::lrshift (val, e);
+		 exponent up by that amount, but or in 1 if any of
+		 the shifted out bits are non-zero.  */
+	      if (wide_int::from (val, e, UNSIGNED) != 0)
+		val = wi::set_bit (wi::lrshift (val, e), 0);
+	      else
+		val = wi::lrshift (val, e);
 	    }
 	  len = realmax;
 	}
@@ -2306,7 +2309,9 @@ real_from_integer (REAL_VALUE_TYPE *r, format_helper fmt,
     }
 
   if (fmt.decimal_p ())
-    decimal_from_integer (r);
+    /* We need at most one decimal digits for each 3 bits of input
+       precision.  */
+    decimal_from_integer (r, val_in.get_precision () / 3);
   if (fmt)
     real_convert (r, fmt, r);
 }
@@ -2361,12 +2366,21 @@ decimal_integer_string (char *str, const REAL_VALUE_TYPE *r_orig,
 /* Convert a real with an integral value to decimal float.  */
 
 static void
-decimal_from_integer (REAL_VALUE_TYPE *r)
+decimal_from_integer (REAL_VALUE_TYPE *r, int digits)
 {
   char str[256];
 
-  decimal_integer_string (str, r, sizeof (str) - 1);
-  decimal_real_from_string (r, str);
+  if (digits <= 256)
+    {
+      decimal_integer_string (str, r, sizeof (str) - 1);
+      decimal_real_from_string (r, str);
+    }
+  else
+    {
+      char *s = XALLOCAVEC (char, digits);
+      decimal_integer_string (s, r, digits - 1);
+      decimal_real_from_string (r, s);
+    }
 }
 
 /* Returns 10**2**N.  */
--- a/src/gcc/stmt.cc
+++ b/src/gcc/stmt.cc
@@ -332,6 +332,7 @@ parse_input_constraint (const char **constraint_p, int input_num,
 
   /* Make sure constraint has neither `=', `+', nor '&'.  */
 
+repeat:
   for (j = 0; j < c_len; j += CONSTRAINT_LEN (constraint[j], constraint+j))
     switch (constraint[j])
       {
@@ -389,12 +390,7 @@ parse_input_constraint (const char **constraint_p, int input_num,
 	      constraint = constraints[match];
 	      *constraint_p = constraint;
 	      c_len = strlen (constraint);
-	      j = 0;
-	      /* ??? At the end of the loop, we will skip the first part of
-		 the matched constraint.  This assumes not only that the
-		 other constraint is an output constraint, but also that
-		 the '=' or '+' come first.  */
-	      break;
+	      goto repeat;
 	    }
 	  else
 	    j = end - constraint;
--- a/src/gcc/testsuite/ChangeLog
+++ b/src/gcc/testsuite/ChangeLog
@@ -1,3 +1,1812 @@
+2026-03-16  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>
+
+	PR target/124126
+	* g++.target/aarch64/pr124126-1.C: New test.
+
+2026-03-16  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>
+
+	PR target/123285
+	* gcc.target/aarch64/pr123285-1.c: New test.
+
+2026-03-16  Claudio Bantaloukas  <claudio.bantaloukas@arm.com>
+
+	PR target/123457
+	* gcc.target/aarch64/pch/aarch64-pch.exp: Add new testsuite.
+	* gcc.target/aarch64/pch/pch_arm_acle.c: Add new test file.
+	* gcc.target/aarch64/pch/pch_arm_acle.hs: Likewise.
+	* gcc.target/aarch64/pch/pch_arm_acle_include_post.c: Likewise.
+	* gcc.target/aarch64/pch/pch_arm_acle_include_post.hs: Likewise.
+	* gcc.target/aarch64/pch/pch_arm_multiple.c: Likewise.
+	* gcc.target/aarch64/pch/pch_arm_multiple.hs: Likewise.
+	* gcc.target/aarch64/pch/pch_arm_multiple_include_post.c: Likewise.
+	* gcc.target/aarch64/pch/pch_arm_multiple_include_post.hs: Likewise.
+	* gcc.target/aarch64/pch/pch_arm_neon.c: Likewise.
+	* gcc.target/aarch64/pch/pch_arm_neon.hs: Likewise.
+	* gcc.target/aarch64/pch/pch_arm_neon_include_post.c: Likewise.
+	* gcc.target/aarch64/pch/pch_arm_neon_include_post.hs: Likewise.
+	* gcc.target/aarch64/pch/pch_arm_neon_sve_bridge.c: Likewise.
+	* gcc.target/aarch64/pch/pch_arm_neon_sve_bridge.hs: Likewise.
+	* gcc.target/aarch64/pch/pch_arm_neon_sve_bridge_include_post.c: Likewise.
+	* gcc.target/aarch64/pch/pch_arm_neon_sve_bridge_include_post.hs: Likewise.
+	* gcc.target/aarch64/pch/pch_arm_sme.c: Likewise.
+	* gcc.target/aarch64/pch/pch_arm_sme.hs: Likewise.
+	* gcc.target/aarch64/pch/pch_arm_sme_include_post.c: Likewise.
+	* gcc.target/aarch64/pch/pch_arm_sme_include_post.hs: Likewise.
+	* gcc.target/aarch64/pch/pch_arm_sve.c: Likewise.
+	* gcc.target/aarch64/pch/pch_arm_sve.hs: Likewise.
+	* gcc.target/aarch64/pch/pch_arm_sve_include_post.c: Likewise.
+	* gcc.target/aarch64/pch/pch_arm_sve_include_post.hs: Likewise.
+
+2026-03-15  Jerry DeLisle  <jvdelisle@gcc.gnu.org>
+
+	Backported from master:
+	2026-03-15  Jerry DeLisle  <jvdelisle@gcc.gnu.org>
+
+	PR fortran/106946
+	PR fortran/124482
+	* gfortran.dg/pr106946.f90: New test.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-03-12  Jakub Jelinek  <jakub@redhat.com>
+
+	PR fortran/124450
+	* gfortran.dg/pr124450.f90: New test.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-03-06  Jakub Jelinek  <jakub@redhat.com>
+
+	PR target/122000
+	* gcc.c-torture/execute/pr122000.c: New test.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-03-06  Jakub Jelinek  <jakub@redhat.com>
+
+	PR tree-optimization/124135
+	* g++.dg/torture/pr124135-1.C: New test.
+	* g++.dg/torture/pr124135-2.C: New test.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-03-06  Jakub Jelinek  <jakub@redhat.com>
+
+	PR tree-optimization/124358
+	* gcc.c-torture/execute/pr124358.c: New test.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-03-05  Jakub Jelinek  <jakub@redhat.com>
+
+	PR target/124366
+	* gcc.target/i386/cet-pr124366.c: New test.
+
+2026-03-15  liuhongt  <hongtao.liu@intel.com>
+
+	Backported from master:
+	2026-03-04  liuhongt  <hongtao.liu@intel.com>
+
+	PR target/124335
+	* gcc.target/i386/avx512fp16-pr124335.c: Require target
+	avx512fp16 instead of avx512bw.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-03-03  Jakub Jelinek  <jakub@redhat.com>
+
+	PR target/124315
+	* gcc.target/i386/avx512f-pr124315.c: New test.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-03-03  Jakub Jelinek  <jakub@redhat.com>
+
+	PR target/124335
+	* gcc.target/i386/avx512fp16-pr124335.c: New test.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-03-02  Jakub Jelinek  <jakub@redhat.com>
+
+	PR tree-optimization/124288
+	* gcc.dg/torture/vec-cvt-1.c (FLTTEST): Use comma expression
+	to store into {flt,dbl}m{in,ax} and read from it again for
+	comparison.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-02-18  Jakub Jelinek  <jakub@redhat.com>
+
+	PR c/123365
+	* gcc.c-torture/compile/pr123365.c: New test.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-02-18  Jakub Jelinek  <jakub@redhat.com>
+
+	PR target/124138
+	* gcc.dg/pr124138.c: New test.
+	* gcc.target/i386/avx512f-pr124138-1.c: New test.
+	* gcc.target/i386/avx512f-pr124138-2.c: New test.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-02-17  Jakub Jelinek  <jakub@redhat.com>
+
+	PR c++/120685
+	* g++.dg/cpp23/auto-fncast19.C: New test.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-02-11  Jakub Jelinek  <jakub@redhat.com>
+
+	PR middle-end/124056
+	* gcc.target/i386/pr124056.c: New test.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-02-11  Jakub Jelinek  <jakub@redhat.com>
+
+	PR rtl-optimization/116600
+	PR middle-end/123386
+	* gcc.c-torture/compile/pr116600.c: New test.
+	* gcc.c-torture/compile/pr123386.c: New test.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-02-09  Jakub Jelinek  <jakub@redhat.com>
+
+	PR c++/123889
+	* g++.dg/cpp0x/constexpr-123889.C: New test.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-02-06  Jakub Jelinek  <jakub@redhat.com>
+
+	PR c/101312
+	* gcc.dg/pr101312-1.c: New test.
+	* gcc.dg/pr101312-2.c: New test.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-02-05  Jakub Jelinek  <jakub@redhat.com>
+
+	PR c/123882
+	* gcc.dg/pr123882.c: New test.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-02-05  Jakub Jelinek  <jakub@redhat.com>
+
+	PR middle-end/123978
+	* gcc.c-torture/execute/pr123978.c: New test.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-02-04  Jakub Jelinek  <jakub@redhat.com>
+
+	PR c++/123818
+	* g++.dg/cpp0x/pr123818.C: New test.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-02-04  Jakub Jelinek  <jakub@redhat.com>
+
+	PR middle-end/122689
+	* gcc.dg/bitint-127.c: New test.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-02-02  Jakub Jelinek  <jakub@redhat.com>
+
+	PR tree-optimization/121104
+	* gcc.dg/pr121104.c: New test.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-01-30  Jakub Jelinek  <jakub@redhat.com>
+
+	PR tree-optimization/123864
+	* gcc.c-torture/execute/pr123864.c: New test.
+	* gcc.dg/torture/pr123864.c: New test.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-01-30  Jakub Jelinek  <jakub@redhat.com>
+
+	PR middle-end/123876
+	* gcc.dg/gomp/pr123876.c: New test.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-01-30  Jakub Jelinek  <jakub@redhat.com>
+
+	PR preprocessor/123273
+	* c-c++-common/cpp/dir-only-10.c: New test.
+	* c-c++-common/cpp/dir-only-11.c: New test.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-01-27  Jakub Jelinek  <jakub@redhat.com>
+
+	PR c++/123578
+	* g++.dg/cpp2a/pr123578.C: New test.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-01-24  Jakub Jelinek  <jakub@redhat.com>
+
+	PR c++/123667
+	* g++.dg/cpp1z/decomp66.C: New test.
+	* g++.dg/cpp1z/decomp67.C: New test.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-01-24  Jakub Jelinek  <jakub@redhat.com>
+
+	PR c++/123684
+	* g++.dg/cpp0x/gen-attrs-90.C: New test.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-01-23  Jakub Jelinek  <jakub@redhat.com>
+
+	PR middle-end/123703
+	* gcc.c-torture/compile/pr123703.c: New test.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-01-23  Jakub Jelinek  <jakub@redhat.com>
+
+	PR c++/123597
+	* g++.dg/gomp/pr123597.C: New test.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-01-17  Jakub Jelinek  <jakub@redhat.com>
+
+	PR tree-optimization/123513
+	* g++.dg/warn/Wmismatched-new-delete-10.C: New test.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-01-16  Jakub Jelinek  <jakub@redhat.com>
+
+	PR target/123607
+	* g++.target/i386/avx512fp16-pr123607.C: New test.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-01-14  Jakub Jelinek  <jakub@redhat.com>
+
+	PR target/120250
+	* gcc.c-torture/compile/pr120250.c: New test.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-01-10  Jakub Jelinek  <jakub@redhat.com>
+
+	PR tree-optimization/123431
+	* gcc.dg/pr123431.c: New test.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-01-08  Jakub Jelinek  <jakub@redhat.com>
+
+	PR middle-end/111817
+	* c-c++-common/pr111817.c: New test.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-12-20  Jakub Jelinek  <jakub@redhat.com>
+
+	PR target/123217
+	* gcc.target/i386/keylocker-pr123217.c: New test.
+	* gcc.target/i386/user_msr-pr123217.c: New test.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-12-19  Jakub Jelinek  <jakub@redhat.com>
+
+	PR c++/91388
+	* g++.dg/cpp1z/static_assert1.C: New test.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-12-19  Jakub Jelinek  <jakub@redhat.com>
+
+	PR c++/122772
+	* g++.dg/cpp1z/eval-order14.C: New test.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-12-19  Jakub Jelinek  <jakub@redhat.com>
+
+	PR c++/122834
+	* g++.dg/dfp/pr122834-1.C: New test.
+	* g++.dg/dfp/pr122834-2.C: New test.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-12-09  Jakub Jelinek  <jakub@redhat.com>
+
+	PR c/123018
+	* gcc.dg/pr123018.c: New test.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-12-03  Jakub Jelinek  <jakub@redhat.com>
+
+	PR tree-optimization/122943
+	* gcc.c-torture/execute/pr122943.c: New test.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-11-25  Jakub Jelinek  <jakub@redhat.com>
+
+	PR middle-end/120052
+	* c-c++-common/gomp/pr120052.c: New test.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-11-25  Jakub Jelinek  <jakub@redhat.com>
+
+	PR middle-end/120564
+	* c-c++-common/gomp/pr120564.c: New test.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-11-21  Jakub Jelinek  <jakub@redhat.com>
+
+	PR c++/121445
+	* g++.dg/cpp1y/constexpr-121445.C: New test.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-11-20  Jakub Jelinek  <jakub@redhat.com>
+
+	PR c++/120876
+	* g++.dg/parse/crash81.C: New test.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	PR tree-optimization/122394
+	* g++.dg/opt/pr122394.C: New test.
+
+2026-03-14  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>
+
+	Backported from master:
+	2026-02-12  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>
+
+	PR c/105555
+	* gcc.dg/complex-10.c: New test.
+
+2026-03-14  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>
+
+	Backported from master:
+	2026-02-02  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>
+
+	PR rtl-optimization/123294
+	* gcc.dg/pr123294-1.c: New test.
+	* gcc.target/aarch64/pr123294-1.c: New test.
+
+2026-03-14  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>
+
+	Backported from master:
+	2026-01-18  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>
+
+	PR tree-optimization/123645
+	* gcc.dg/torture/pr123645-1.c: New test.
+	* gcc.dg/torture/pr123645-2.c: New test.
+
+2026-03-13  Patrick Palka  <ppalka@redhat.com>
+
+	Backported from master:
+	2026-01-30  Patrick Palka  <ppalka@redhat.com>
+
+	PR c++/123845
+	PR libstdc++/114865
+	* g++.dg/cpp0x/constexpr-ex3.C: Adjust C++11 non-empty
+	constexpr constructor dg-error to a dg-warning.  Expect
+	a follow-up missing member initializer diagnostic in C++11 mode.
+	* g++.dg/cpp2a/constexpr-try1.C: Expect a follow-up
+	compound-statement in constexpr function diagnostic in C++11
+	mode.
+	* g++.dg/cpp2a/constexpr-try2.C: Likewise.  Adjust C++11
+	non-empty constexpr constructor dg-error to a dg-warning.
+	* g++.dg/cpp2a/constexpr-try3.C:  Adjust C++11 non-empty
+	constexpr constructor dg-error to a dg-warning.
+	* g++.dg/cpp0x/constexpr-ctor23.C: New test.
+
+2026-03-12  Martin Jambor  <mjambor@suse.cz>
+
+	Backported from master:
+	2026-02-20  Martin Jambor  <mjambor@suse.cz>
+
+	PR ipa/122856
+	* g++.dg/ipa/pr122856.C: New test.
+
+2026-03-09  Kalvis Duckmanton  <kalvisd@gmail.com>
+
+	Backported from master:
+	2026-02-14  Kalvis Duckmanton  <kalvisd@gmail.com>
+
+	PR target/112400
+	* g++.dg/torture/pr112400.C: New file.
+
+2026-03-04  Xi Ruoyao  <xry111@xry111.site>
+
+	Backported from master:
+	2026-02-26  Xi Ruoyao  <xry111@xry111.site>
+
+	PR middle-end/124250
+	PR target/123807
+	* gcc.c-torture/compile/pr124250.c: New test.
+
+2026-03-02  Tamar Christina  <tamar.christina@arm.com>
+
+	Backported from master:
+	2026-02-25  Tamar Christina  <tamar.christina@arm.com>
+
+	PR target/124236
+	* lib/target-supports.exp
+	(check_effective_target_arm_v8_3a_complex_neon_hw): Fix default value.
+
+2026-02-28  Eric Botcazou  <ebotcazou@adacore.com>
+
+	* gnat.dg/specs/unchecked_union3.ads: New test.
+
+2026-02-27  Xi Ruoyao  <xry111@xry111.site>
+
+	Backported from master:
+	2026-02-27  Xi Ruoyao  <xry111@xry111.site>
+
+	PR target/122097
+	* gcc.target/loongarch/pr122097.c (dg-final): Remove.
+
+2026-02-26  Michal Jires  <mjires@suse.cz>
+
+	Backported from master:
+	2026-01-11  Michal Jires  <mjires@suse.cz>
+
+	PR lto/121588
+	* gcc.dg/lto/attr-weakref-2_0.c: New test.
+	* gcc.dg/lto/attr-weakref-2_1.c: New test.
+
+2026-02-25  Eric Botcazou  <ebotcazou@adacore.com>
+
+	* gnat.dg/protected_deref1.adb: New test.
+
+2026-02-18  Martin Jambor  <mjambor@suse.cz>
+
+	PR ipa/106260
+	* g++.dg/ipa/pr106260.C: New test.
+
+2026-02-17  Martin Jambor  <mjambor@suse.cz>
+
+	Backported from master:
+	2026-02-09  Martin Jambor  <mjambor@suse.cz>
+
+	PR tree-optimization/117217
+	* g++.dg/torture/pr117217-1.C: New test.
+	* g++.dg/torture/pr117217-2.C: Likewise.
+
+2026-02-11  Alice Carlotti  <alice.carlotti@arm.com>
+
+	PR target/123624
+	* gcc.target/aarch64/sme/sme-shrinkwrap.c: New test.
+
+2026-02-08  Iain Buclaw  <ibuclaw@gdcproject.org>
+
+	Backported from master:
+	2026-02-08  Iain Buclaw  <ibuclaw@gdcproject.org>
+
+	PR d/124026
+	* gdc.dg/pr124026.d: New test.
+
+2026-02-05  Hongyu Wang  <hongyu.wang@intel.com>
+
+	Backported from master:
+	2026-01-28  Hongyu Wang  <hongyu.wang@intel.com>
+
+	PR target/123779
+	* g++.target/i386/pr123779.C: New test.
+
+2026-02-03  Alfie Richards  <alfie.richards@arm.com>
+
+	PR target/123548
+	* gcc.target/aarch64/pr123548.c: New test.
+
+2026-02-02  Richard Biener  <rguenther@suse.de>
+
+	Backported from master:
+	2026-01-30  Richard Biener  <rguenther@suse.de>
+
+	PR middle-end/123887
+	* gcc.dg/torture/pr123887.c: New testcase.
+
+2026-02-02  Andrew Pinski  <quic_apinski@quicinc.com>
+
+	Backported from master:
+	2024-09-25  Andrew Pinski  <quic_apinski@quicinc.com>
+
+	PR middle-end/116772
+	* gcc.dg/torture/pr116772-1.c: New test.
+
+2026-01-30  Eric Botcazou  <ebotcazou@adacore.com>
+
+	* gnat.dg/specs/limited_with3.ads: New test.
+	* gnat.dg/specs/limited_with3-child.ads: New helper.
+	* gnat.dg/specs/limited_with3-child-grandchild.ads: Likewise.
+	* gnat.dg/specs/limited_with3-child-grandchild-grandgrandchild.ads:
+	Likewise.
+
+2026-01-30  Iain Buclaw  <ibuclaw@gdcproject.org>
+
+	Backported from master:
+	2026-01-30  Iain Buclaw  <ibuclaw@gdcproject.org>
+
+	PR d/123264
+	* gdc.dg/pr123264.d: New test.
+
+2026-01-30  Lulu Cheng  <chenglulu@loongson.cn>
+
+	Backported from master:
+	2026-01-30  Lulu Cheng  <chenglulu@loongson.cn>
+
+	PR target/123766
+	* gcc.target/loongarch/vector/lasx/pr123766.c: New test.
+	* gcc.target/loongarch/vector/lsx/pr123766.c: New test.
+
+2026-01-30  Lulu Cheng  <chenglulu@loongson.cn>
+
+	Backported from master:
+	2026-01-30  Lulu Cheng  <chenglulu@loongson.cn>
+
+	PR target/123807
+	* gcc.target/loongarch/vector/lsx/pr123807.c: New test.
+
+2026-01-29  Iain Buclaw  <ibuclaw@gdcproject.org>
+
+	Backported from master:
+	2026-01-29  Iain Buclaw  <ibuclaw@gdcproject.org>
+
+	PR d/123407
+	* gdc.dg/pr123407a.d: New test.
+	* gdc.dg/pr123407b.d: New test.
+
+2026-01-29  Iain Buclaw  <ibuclaw@gdcproject.org>
+
+	Backported from master:
+	2026-01-29  Iain Buclaw  <ibuclaw@gdcproject.org>
+
+	PR d/123046
+	* gdc.dg/pr123046.d: New test.
+
+2026-01-29  Iain Buclaw  <ibuclaw@gdcproject.org>
+
+	Backported from master:
+	2026-01-29  Iain Buclaw  <ibuclaw@gdcproject.org>
+
+	PR d/123349
+	* gdc.dg/driver_debuglib.d: New test.
+	* gdc.dg/driver_defaultlib.d: New test.
+
+2026-01-28  Iain Buclaw  <ibuclaw@gdcproject.org>
+
+	Backported from master:
+	2025-04-15  Iain Buclaw  <ibuclaw@gdcproject.org>
+
+	PR d/119799
+	* gdc.dg/torture/pr119799.d: New test.
+	* gdc.dg/torture/imports/pr119799c.c: New test.
+
+2026-01-28  Iain Buclaw  <ibuclaw@gdcproject.org>
+
+	Backported from master:
+	2026-01-28  Iain Buclaw  <ibuclaw@gdcproject.org>
+
+	PR d/123419
+	* gdc.dg/pr123419.d: New test.
+
+2026-01-28  Iain Buclaw  <ibuclaw@gdcproject.org>
+
+	Backported from master:
+	2026-01-28  Iain Buclaw  <ibuclaw@gdcproject.org>
+
+	PR d/123798
+	* gdc.dg/pr123798.d: New test.
+
+2026-01-28  Iain Buclaw  <ibuclaw@gdcproject.org>
+
+	Backported from master:
+	2026-01-28  Iain Buclaw  <ibuclaw@gdcproject.org>
+
+	PR d/121477
+	* gdc.dg/pr121477.d: New test.
+
+2026-01-28  Iain Buclaw  <ibuclaw@gdcproject.org>
+
+	Backported from master:
+	2026-01-28  Iain Buclaw  <ibuclaw@gdcproject.org>
+
+	PR d/123422
+	* gdc.dg/torture/pr123422.d: New test.
+
+2026-01-27  Iain Buclaw  <ibuclaw@gdcproject.org>
+
+	Backported from master:
+	2026-01-27  Iain Buclaw  <ibuclaw@gdcproject.org>
+
+	PR d/120096
+	* gdc.dg/torture/pr120096.d: New test.
+
+2026-01-27  Patrick Palka  <ppalka@redhat.com>
+
+	Backported from master:
+	2026-01-27  Patrick Palka  <ppalka@redhat.com>
+
+	PR c++/123676
+	* g++.dg/cpp2a/concepts-decltype5.C: New test.
+
+2026-01-27  Patrick Palka  <ppalka@redhat.com>
+
+	Backported from master:
+	2026-01-27  Patrick Palka  <ppalka@redhat.com>
+
+	PR c++/122494
+	PR c++/123814
+	* g++.dg/cpp2a/concepts-pr122494.C: New test.
+	* g++.dg/cpp2a/concepts-pr123814.C: New test.
+
+2026-01-23  Avinash Jayakar  <avinashd@linux.ibm.com>
+
+	PR target/119130
+	* gcc.target/powerpc/builtins-1-p9-runnable.c: Use same expected
+	results for both endian format.
+
+2026-01-23  Hongyu Wang  <hongyu.wang@intel.com>
+
+	Backported from master:
+	2026-01-23  Hongyu Wang  <hongyu.wang@intel.com>
+
+	* gcc.target/i386/apx-broadcast.c: New test.
+
+2026-01-22  Richard Earnshaw  <rearnsha@arm.com>
+
+	Backported from master:
+	2026-01-22  Richard Earnshaw  <rearnsha@arm.com>
+
+	PR target/123742
+	* gcc.target/arm/neon-smax16.c: New test.
+	* gcc.target/arm/neon-smin16.c: New test.
+
+2026-01-20  Vladimir N. Makarov  <vmakarov@redhat.com>
+
+	PR rtl-optimization/122215
+	* sparseset.supp: New.
+
+2026-01-19  Lulu Cheng  <chenglulu@loongson.cn>
+
+	Backported from master:
+	2026-01-19  Lulu Cheng  <chenglulu@loongson.cn>
+
+	PR target/117575
+	* g++.target/loongarch/pr117575.C: New test.
+
+2026-01-16  Vladimir N. Makarov  <vmakarov@redhat.com>
+
+	PR rtl-optimization/123121
+	* gcc.target/i386/pr123121.c: New.
+
+2026-01-16  Lulu Cheng  <chenglulu@loongson.cn>
+
+	Backported from master:
+	2026-01-16  Lulu Cheng  <chenglulu@loongson.cn>
+
+	PR target/123521
+	* gcc.target/loongarch/vector/lasx/pr123521.c: New test.
+
+2026-01-15  DengJianbo  <dengjianbo@loongson.cn>
+
+	Backported from master:
+	2026-01-15  DengJianbo  <dengjianbo@loongson.cn>
+
+	* gcc.target/loongarch/attr-model-6.c: New test.
+
+2026-01-14  Andrew MacLeod  <amacleod@redhat.com>
+
+	PR tree-optimization/123300
+	* gcc.dg/pr123300.c: New.
+
+2026-01-13  liuhongt  <hongtao.liu@intel.com>
+
+	Backported from master:
+	2026-01-13  liuhongt  <hongtao.liu@intel.com>
+
+	* gcc.target/i386/pr123484.c: New test.
+
+2025-12-26  Eric Botcazou  <ebotcazou@gcc.gnu.org>
+
+	* gnat.dg/specs/aggr9.ads: New test.
+
+2025-12-19  Yury Khrustalev  <yury.khrustalev@arm.com>
+
+	Backported from master:
+	2025-12-19  Yury Khrustalev  <yury.khrustalev@arm.com>
+
+	PR debug/121964
+	* g++.target/aarch64/dwarf-bit-stride-func.C: New test.
+	* g++.target/aarch64/dwarf-bit-stride-pragma.C: New test.
+	* g++.target/aarch64/dwarf-bit-stride-pragma-sme.C: New test.
+	* g++.target/aarch64/sve/dwarf-bit-stride.C: New test.
+	* gcc.target/aarch64/dwarf-bit-stride-func.c: New test.
+	* gcc.target/aarch64/dwarf-bit-stride-pragma.c: New test.
+	* gcc.target/aarch64/dwarf-bit-stride-pragma-sme.c: New test.
+	* gcc.target/aarch64/sve/dwarf-bit-stride.c: New test.
+
+2025-12-15  Eric Botcazou  <ebotcazou@adacore.com>
+
+	* gnat.dg/reduce4.adb: New test.
+	* gnat.dg/reduce5.adb: Likewise.
+
+2025-12-15  Eric Botcazou  <ebotcazou@adacore.com>
+
+	* gnat.dg/lto30.ads, gnat.dg/lto30.adb: New test.
+
+2025-11-28  Avinash Jayakar  <avinashd@linux.ibm.com>
+
+	PR tree-optimization/122126
+	* gcc.dg/pr122126_vextr.c: New test.
+	* gcc.dg/pr122126_vset.c: New test.
+
+2025-11-27  Richard Earnshaw  <rearnsha@arm.com>
+
+	Backported from master:
+	2025-11-26  Richard Earnshaw  <rearnsha@arm.com>
+
+	PR target/122867
+	* gcc.target/arm/cbz-range.c: New test.
+
+2025-11-20  Xi Ruoyao  <xry111@xry111.site>
+
+	Backported from master:
+	2025-11-20  Xi Ruoyao  <xry111@xry111.site>
+
+	PR target/122695
+	* gcc.target/loongarch/pr122695-1.c: New test.
+	* gcc.target/loongarch/pr122695-2.c: New test.
+
+2025-11-18  Siddhesh Poyarekar  <siddhesh@gotplt.org>
+
+	Backported from master:
+	2025-11-04  Siddhesh Poyarekar  <siddhesh@gotplt.org>
+
+	PR lto/122515
+	* lib/lto.exp (lto-build-archive): New procedure.
+	(lto-execute-1): Use it.
+	(lto-link-and-maybe-run, lto-get-options-main): Handle ar-link.
+	* gcc.dg/lto/pr122515_0.c: New test case.
+	* gcc.dg/lto/pr122515_1.c: New file.
+	* gcc.dg/lto/pr122515_2.c: Likewise.
+	* gcc.dg/lto/pr122515_3.c: Likewise.
+	* gcc.dg/lto/pr122515_4.c: Likewise.
+	* gcc.dg/lto/pr122515_5.c: Likewise.
+	* gcc.dg/lto/pr122515_6.c: Likewise.
+	* gcc.dg/lto/pr122515_7.c: Likewise.
+	* gcc.dg/lto/pr122515_8.c: Likewise.
+	* gcc.dg/lto/pr122515_9.c: Likewise.
+
+2025-11-18  Tamar Christina  <tamar.christina@arm.com>
+
+	PR tree-optimization/122408
+	* gfortran.target/aarch64/pr122408_1.f90: New test.
+	* gfortran.target/aarch64/pr122408_2.f90: New test.
+
+2025-11-18  Tamar Christina  <tamar.christina@arm.com>
+
+	PR tree-optimization/122408
+	* gfortran.target/aarch64/aarch64.exp: New test.
+
+2025-11-12  Hu, Lin1  <lin1.hu@intel.com>
+
+	Backported from master:
+	2025-11-12  Hu, Lin1  <lin1.hu@intel.com>
+
+	PR target/122446
+	* gcc.target/i386/amxbf16-asmintel-1.c: Modify dg-final to check intel
+	form.
+	* gcc.target/i386/amxcomplex-asmintel-1.c: Ditto.
+	* gcc.target/i386/amxfp16-asmintel-1.c: Ditto.
+	* gcc.target/i386/amxint8-asmintel-1.c: Ditto.
+	* gcc.target/i386/amxtile-asmintel-1.c: Ditto.
+	* g++.target/i386/pr122446-1.C: New test.
+	* g++.target/i386/pr122446-amxbf16.C: Ditto.
+	* g++.target/i386/pr122446-amxcomplex.C: Ditto.
+	* g++.target/i386/pr122446-amxfp16.C: Ditto.
+	* g++.target/i386/pr122446-amxint8.C: Ditto.
+	* g++.target/i386/pr122446-amxtile.C: Ditto.
+
+2025-11-11  Lulu Cheng  <chenglulu@loongson.cn>
+
+	Backported from master:
+	2025-10-29  Lulu Cheng  <chenglulu@loongson.cn>
+
+	PR target/122097
+	* gcc.target/loongarch/pr122097.c: New test.
+
+2025-11-07  Christophe Lyon  <christophe.lyon@linaro.org>
+
+	PR target/122223
+	* gcc.target/arm/mve/intrinsics/pr122223.c: New test.
+	(cherry picked from commits
+	81e226440381cc3e033df7e58cc7793c9b4b4e25 and
+	a52888dc71924afb6cd187b0e5f18d2be4c68a07)
+
+2025-10-30  Guo Jie  <guojie@loongson.cn>
+
+	Backported from master:
+	2025-10-30  Guo Jie  <guojie@loongson.cn>
+
+	* gcc.target/loongarch/fnmam4-vec.c: New test.
+
+2025-10-28  H.J. Lu  <hjl.tools@gmail.com>
+
+	Backported from master:
+	2025-10-27  H.J. Lu  <hjl.tools@gmail.com>
+
+	PR target/122323
+	* gcc.target/i386/builtin-copysign-8b.c: Add -mtune=generic.
+
+2025-10-26  Alexandre Oliva  <oliva@adacore.com>
+
+	Backported from master:
+	2025-10-26  Alexandre Oliva  <oliva@adacore.com>
+
+	PR target/121599
+	* gcc.target/aarch64/sve2/pr121599.c: Tolerate alterate insn
+	selection.
+
+2025-10-25  Harald Anlauf  <anlauf@gmx.de>
+
+	Backported from master:
+	2025-10-04  Harald Anlauf  <anlauf@gmx.de>
+
+	PR fortran/107968
+	* gfortran.dg/implied_do_io_9.f90: New test.
+
+2025-10-25  Harald Anlauf  <anlauf@gmx.de>
+
+	Backported from master:
+	2025-10-09  Harald Anlauf  <anlauf@gmx.de>
+
+	PR fortran/122206
+	* gfortran.dg/interface_abstract_6.f90: New test.
+
+2025-10-24  H.J. Lu  <hjl.tools@gmail.com>
+
+	Backported from master:
+	2025-10-24  H.J. Lu  <hjl.tools@gmail.com>
+
+	PR target/122323
+	* gcc.target/i386/builtin-fabs-2.c: Also scan (%edi)for x32.
+
+2025-10-24  H.J. Lu  <hjl.tools@gmail.com>
+
+	Backported from master:
+	2025-10-20  H.J. Lu  <hjl.tools@gmail.com>
+
+	PR target/99930
+	PR target/122323
+	* gcc.target/i386/builtin-copysign-2.c: New test.
+	* gcc.target/i386/builtin-copysign-3.c: Likewise.
+	* gcc.target/i386/builtin-copysign-4.c: Likewise.
+	* gcc.target/i386/builtin-copysign-5.c: Likewise.
+	* gcc.target/i386/builtin-copysign-6.c: Likewise.
+	* gcc.target/i386/builtin-copysign-7.c: Likewise.
+	* gcc.target/i386/builtin-copysign-8a.c: Likewise.
+	* gcc.target/i386/builtin-copysign-8b.c: Likewise.
+	* gcc.target/i386/builtin-fabs-1.c: Likewise.
+	* gcc.target/i386/builtin-fabs-2.c: Likewise.
+
+2025-10-21  Jennifer Schmitz  <jschmitz@nvidia.com>
+
+	PR target/121599
+	* gcc.target/aarch64/sve2/pr121599.c: New test.
+
+2025-10-21  David Malcolm  <dmalcolm@redhat.com>
+
+	Backported from master:
+	2025-02-19  David Malcolm  <dmalcolm@redhat.com>
+
+	PR analyzer/118300
+	* gcc.dg/analyzer/ubsan-pr118300.c: New test.
+
+2025-10-20  Eric Botcazou  <ebotcazou@adacore.com>
+
+	* gnat.dg/renaming18.adb: New test.
+
+2025-10-16  Alex Coplan  <alex.coplan@arm.com>
+
+	Backported from master:
+	2025-10-13  Alex Coplan  <alex.coplan@arm.com>
+
+	PR tree-optimization/121772
+	* gcc.target/aarch64/torture/pr121772.c: Add -fchecking to
+	dg-options.
+
+2025-10-15  Alice Carlotti  <alice.carlotti@arm.com>
+
+	* gcc.target/aarch64/acle/rwsr-armv8p9.c: Fix pmsdsfr_el1
+	encoding.
+
+2025-10-14  Jason Merrill  <jason@redhat.com>
+
+	Backported from master:
+	2025-08-21  Jason Merrill  <jason@redhat.com>
+
+	PR c++/120757
+	* g++.dg/cpp1y/auto-fn66.C: New test.
+
+2025-10-14  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-10-09  Jakub Jelinek  <jakub@redhat.com>
+
+	PR c/122188
+	* gcc.dg/torture/pr122188.c: New test.
+
+2025-10-14  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-10-08  Jakub Jelinek  <jakub@redhat.com>
+
+	PR c/122188
+	* c-c++-common/pr122188.c: New test.
+
+2025-10-14  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-10-04  Jakub Jelinek  <jakub@redhat.com>
+
+	PR tree-optimization/122104
+	* gcc.target/i386/pr122104.c: New test.
+
+2025-10-14  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-09-18  Jakub Jelinek  <jakub@redhat.com>
+
+	PR c++/121977
+	* g++.dg/gomp/pr121977.C: New test.
+
+2025-10-14  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-09-10  Jakub Jelinek  <jakub@redhat.com>
+
+	PR middle-end/121828
+	* gcc.dg/bitint-126.c: New test.
+
+2025-10-14  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-09-05  Jakub Jelinek  <jakub@redhat.com>
+
+	PR testsuite/118567
+	* gcc.target/powerpc/vsx-vectorize-9.c: New test.
+	* gcc.target/powerpc/vsx-vectorize-10.c: New test.
+	* gcc.target/powerpc/vsx-vectorize-11.c: New test.
+	* gcc.target/powerpc/vsx-vectorize-12.c: New test.
+	* gcc.target/powerpc/vsx-vectorize-13.c: New test.
+	* gcc.target/powerpc/vsx-vectorize-14.c: New test.
+	* gcc.target/powerpc/vsx-vectorize-15.c: New test.
+	* gcc.target/powerpc/vsx-vectorize-16.c: New test.
+
+2025-10-14  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-09-05  Jakub Jelinek  <jakub@redhat.com>
+
+	PR testsuite/118567
+	* gcc.target/powerpc/vsx-vectorize-1.c: Remove includes, checking
+	part of main1 and main.
+	* gcc.target/powerpc/vsx-vectorize-2.c: Remove includes, replace
+	bar definition with declaration, remove main.
+	* gcc.target/powerpc/vsx-vectorize-3.c: Likewise.
+	* gcc.target/powerpc/vsx-vectorize-4.c: Likewise.
+	* gcc.target/powerpc/vsx-vectorize-5.c: Likewise.
+	* gcc.target/powerpc/vsx-vectorize-6.c: Likewise.
+	* gcc.target/powerpc/vsx-vectorize-7.c: Likewise.
+	* gcc.target/powerpc/vsx-vectorize-8.c: Likewise.
+
+2025-10-14  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-08-25  Jakub Jelinek  <jakub@redhat.com>
+
+	PR middle-end/121453
+	* gcc.dg/gomp/pr121453.c: New test.
+
+2025-10-14  Richard Biener  <rguenther@suse.de>
+
+	Backported from master:
+	2025-09-11  Richard Biener  <rguenther@suse.de>
+
+	PR tree-optimization/121870
+	* g++.dg/torture/pr121870.C: New testcase.
+
+2025-10-14  Richard Biener  <rguenther@suse.de>
+
+	Backported from master:
+	2025-08-05  Richard Biener  <rguenther@suse.de>
+
+	PR tree-optimization/121370
+	* gcc.dg/torture/pr121370.c: New testcase.
+
+2025-10-14  Richard Biener  <rguenther@suse.de>
+
+	Backported from master:
+	2025-07-28  Richard Biener  <rguenther@suse.de>
+
+	PR tree-optimization/121256
+	* gcc.dg/vect/vect-recurr-pr121256.c: New testcase.
+	* gcc.dg/vect/vect-recurr-pr121256-2.c: Likewise.
+
+2025-10-14  Richard Biener  <rguenther@suse.de>
+
+	Backported from master:
+	2025-07-15  Richard Biener  <rguenther@suse.de>
+		    Richard Sandiford   <richard.sandiford@arm.com>
+
+	PR tree-optimization/121059
+	* gcc.dg/vect/pr121059.c: New testcase.
+
+2025-10-14  Richard Biener  <rguenther@suse.de>
+
+	Backported from master:
+	2025-07-04  Richard Biener  <rguenther@suse.de>
+
+	PR tree-optimization/120944
+	* gcc.dg/torture/pr120944.c: New testcase.
+
+2025-10-14  Tamar Christina  <tamar.christina@arm.com>
+
+	Backported from master:
+	2025-07-07  Tamar Christina  <tamar.christina@arm.com>
+
+	PR tree-optimization/120817
+	* gcc.dg/vect/pr120817.c: Add SVE HW check.
+
+2025-10-14  Richard Biener  <rguenther@suse.de>
+
+	Backported from master:
+	2025-07-07  Richard Biener  <rguenther@suse.de>
+
+	PR tree-optimization/120817
+	* gcc.dg/vect/pr120817.c: New testcase.
+
+2025-10-14  Richard Biener  <rguenther@suse.de>
+
+	Backported from master:
+	2025-06-20  Richard Biener  <rguenther@suse.de>
+
+	PR tree-optimization/120654
+	* gcc.dg/torture/pr120654.c: New testcase.
+
+2025-10-14  Richard Biener  <rguenther@suse.de>
+
+	Backported from master:
+	2025-05-31  Richard Biener  <rguenther@suse.de>
+
+	PR tree-optimization/120357
+	* gcc.dg/vect/vect-early-break_136-pr120357.c: New testcase.
+
+2025-10-09  Georg-Johann Lay  <avr@gjlay.de>
+
+	Backported from master:
+	2025-10-09  Georg-Johann Lay  <avr@gjlay.de>
+
+	PR target/122222
+	* gcc.target/avr/pr122222-sitod.c: New test.
+
+2025-10-09  Georg-Johann Lay  <avr@gjlay.de>
+
+	Backported from master:
+	2025-10-09  Georg-Johann Lay  <avr@gjlay.de>
+
+	PR target/122220
+	* gcc.target/avr/pr122220.c: New test.
+
+2025-10-09  Georg-Johann Lay  <avr@gjlay.de>
+
+	Backported from master:
+	2025-10-09  Georg-Johann Lay  <avr@gjlay.de>
+
+	PR target/122210
+	* gcc.target/avr/dtofx.c: New test.
+
+2025-10-09  Georg-Johann Lay  <avr@gjlay.de>
+
+	Backported from master:
+	2025-10-09  Georg-Johann Lay  <avr@gjlay.de>
+
+	PR target/122210
+	* gcc.target/avr/fxtod.c: New test.
+
+2025-10-09  Georg-Johann Lay  <avr@gjlay.de>
+
+	Backported from master:
+	2025-10-06  Georg-Johann Lay  <avr@gjlay.de>
+
+	* gcc.target/avr/sincos-1.c: New test.
+
+2025-10-09  Georg-Johann Lay  <avr@gjlay.de>
+
+	Backported from master:
+	2025-10-06  Georg-Johann Lay  <avr@gjlay.de>
+
+	PR target/122177
+	* gcc.target/avr/fminfmax-1.c: New test.
+
+2025-10-09  Georg-Johann Lay  <avr@gjlay.de>
+
+	Backported from master:
+	2025-10-06  Georg-Johann Lay  <avr@gjlay.de>
+
+	* gcc.target/avr/cmpdi-1.c: New test.
+
+2025-10-07  Georg-Johann Lay  <avr@gjlay.de>
+
+	Backported from master:
+	2025-10-07  Georg-Johann Lay  <avr@gjlay.de>
+
+	PR target/122187
+	* gcc.target/avr/torture/pr122187.c: New test.
+
+2025-10-07  Patrick Palka  <ppalka@redhat.com>
+
+	Backported from master:
+	2025-09-20  Patrick Palka  <ppalka@redhat.com>
+
+	PR c++/121981
+	* g++.dg/cpp2a/concepts-placeholder15.C: New test.
+
+2025-10-05  Harald Anlauf  <anlauf@gmx.de>
+
+	Backported from master:
+	2025-09-03  Harald Anlauf  <anlauf@gmx.de>
+
+	PR fortran/121263
+	* gfortran.dg/transfer_class_5.f90: New test.
+
+2025-10-05  Eric Botcazou  <ebotcazou@adacore.com>
+
+	PR ada/113536
+	* gnat.dg/reduce2.adb: New test.
+
+2025-10-03  Alex Coplan  <alex.coplan@arm.com>
+
+	Backported from master:
+	2025-09-15  Alex Coplan  <alex.coplan@arm.com>
+
+	PR tree-optimization/121772
+	* gcc.target/aarch64/torture/pr121772.c: New test.
+
+2025-09-23  Paul Thomas  <pault@gcc.gnu.org>
+
+	Backported from master:
+	2025-08-13  Paul Thomas  <pault@gcc.gnu.org>
+
+	PR fortran/89092
+	* gfortran.dg/pr89092.f90: New test.
+
+2025-09-18  hongtao.liu  <hongtao.liu@intel.com>
+
+	Backported from master:
+	2025-09-18  hongtao.liu  <hongtao.liu@intel.com>
+
+	* gcc.target/i386/pieces-memcpy-18.c: Use -mtune=znver5
+	instead of -mtune=sapphirerapids.
+	* gcc.target/i386/pieces-memcpy-21.c: Ditto.
+	* gcc.target/i386/pieces-memset-46.c: Ditto.
+	* gcc.target/i386/pieces-memset-49.c: Ditto.
+
+2025-09-17  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>
+
+	Backported from master:
+	2025-09-17  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>
+
+	* gcc.target/arm/fp16-aapcs.c: New test.
+	* gcc.target/arm/fp16-aapcs-1.c: Removed.
+	* gcc.target/arm/fp16-aapcs-2.c: Likewise.
+	* gcc.target/arm/fp16-aapcs-3.c: Likewise.
+	* gcc.target/arm/fp16-aapcs-4.c: Likewise.
+
+2025-09-15  Kyrylo Tkachov  <ktkachov@nvidia.com>
+
+	Backported from master:
+	2025-09-03  Kyrylo Tkachov  <ktkachov@nvidia.com>
+
+	PR target/121749
+	* gcc.target/aarch64/simd/pr121749.c: Use dg-assemble directive.
+
+2025-09-15  Kyrylo Tkachov  <ktkachov@nvidia.com>
+
+	Backported from master:
+	2025-09-03  Kyrylo Tkachov  <ktkachov@nvidia.com>
+
+	PR target/121749
+	* gcc.target/aarch64/simd/pr121749.c: New test.
+
+2025-09-15  Matthias Kretz  <m.kretz@gsi.de>
+
+	Backported from master:
+	2025-09-09  Matthias Kretz  <m.kretz@gsi.de>
+
+	PR c++/121801
+	* g++.dg/abi/pr121801.C: New test.
+
+2025-09-15  Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>
+
+	Backported from master:
+	2024-07-16  Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>
+
+	* gcc.target/s390/vector/vec-cmp-emu-1.c: New test.
+	* gcc.target/s390/vector/vec-cmp-emu-2.c: New test.
+	* gcc.target/s390/vector/vec-cmp-emu-3.c: New test.
+
+2025-08-30  liuhongt  <hongtao.liu@intel.com>
+
+	Revert:
+	2025-08-30  liuhongt  <hongtao.liu@intel.com>
+
+	* gcc.target/i386/pr120691.c: New test.
+
+2025-08-29  liuhongt  <hongtao.liu@intel.com>
+
+	Backported from master:
+	2025-08-29  liuhongt  <hongtao.liu@intel.com>
+
+	* gcc.target/i386/pr120691.c: New test.
+
+2025-08-22  Harald Anlauf  <anlauf@gmx.de>
+
+	Backported from master:
+	2025-07-18  Harald Anlauf  <anlauf@gmx.de>
+
+	PR fortran/121145
+	* gfortran.dg/pointer_check_15.f90: New test.
+
+2025-08-22  Harald Anlauf  <anlauf@gmx.de>
+
+	Backported from master:
+	2025-06-27  Harald Anlauf  <anlauf@gmx.de>
+
+	PR fortran/120784
+	* gfortran.dg/interface_63.f90: Extend testcase.
+
+2025-08-22  Harald Anlauf  <anlauf@gmx.de>
+
+	Backported from master:
+	2025-06-23  Harald Anlauf  <anlauf@gmx.de>
+
+	PR fortran/120784
+	* gfortran.dg/interface_63.f90: New test.
+
+2025-08-20  Martin Jambor  <mjambor@suse.cz>
+
+	Backported from master:
+	2025-07-23  Martin Jambor  <mjambor@suse.cz>
+
+	PR tree-optimization/119085
+	* gcc.dg/tree-ssa/pr119085.c: New test.
+
+2025-08-20  Martin Jambor  <mjambor@suse.cz>
+
+	Backported from master:
+	2025-07-18  Martin Jambor  <mjambor@suse.cz>
+
+	PR tree-optimization/117423
+	* gcc.dg/tree-ssa/pr117423.c: New test.
+
+2025-08-18  Richard Sandiford  <richard.sandiford@arm.com>
+
+	Backported from master:
+	2025-08-18  Richard Sandiford  <richard.sandiford@arm.com>
+
+	PR target/121118
+	* gcc.target/aarch64/sve/acle/general/pr121118_1.c: New test.
+
+2025-08-18  Richard Sandiford  <richard.sandiford@arm.com>
+
+	Backported from master:
+	2025-08-12  Richard Sandiford  <richard.sandiford@arm.com>
+
+	PR rtl-optimization/121253
+	* gcc.target/aarch64/pr121253.c: New test.
+
+2025-08-15  Pengfei Li  <Pengfei.Li2@arm.com>
+
+	PR target/121449
+	* g++.target/aarch64/sve/pr121449.C: New test.
+
+2025-08-15  Richard Sandiford  <richard.sandiford@arm.com>
+
+	Backported from master:
+	2025-07-17  Richard Sandiford  <richard.sandiford@arm.com>
+		    Yury Khrustalev  <yury.khrustalev@arm.com>
+
+	* lib/target-supports.exp (add_options_for_aarch64_sme)
+	(check_effective_target_aarch64_sme_hw): New procedures.
+	* g++.target/aarch64/sme/sme_throw_1.C: New test.
+	* g++.target/aarch64/sme/sme_throw_2.C: Likewise.
+
+2025-08-15  Lulu Cheng  <chenglulu@loongson.cn>
+
+	Backported from master:
+	2025-08-15  Lulu Cheng  <chenglulu@loongson.cn>
+
+	PR target/121542
+	* gcc.target/loongarch/pr121542.c: New test.
+
+2025-08-14  Richard Sandiford  <richard.sandiford@arm.com>
+
+	Backported from master:
+	2025-08-14  Richard Sandiford  <richard.sandiford@arm.com>
+
+	PR target/121414
+	* gcc.target/aarch64/sme/pr121414_1.c: New test.
+
+2025-08-14  Richard Sandiford  <richard.sandiford@arm.com>
+
+	Backported from master:
+	2025-08-14  Richard Sandiford  <richard.sandiford@arm.com>
+
+	PR target/121294
+	* gcc.target/aarch64/sve/acle/general/rev_2.c: New test.
+
+2025-08-14  Richard Sandiford  <richard.sandiford@arm.com>
+
+	Backported from master:
+	2025-08-14  Richard Sandiford  <richard.sandiford@arm.com>
+
+	PR target/121294
+	* gcc.target/aarch64/sve/acle/general/perm_2.c: New test.
+	* gcc.target/aarch64/sve/acle/general/perm_3.c: Likewise.
+	* gcc.target/aarch64/sve/acle/general/perm_4.c: Likewise.
+	* gcc.target/aarch64/sve/acle/general/perm_5.c: Likewise.
+	* gcc.target/aarch64/sve/acle/general/perm_6.c: Likewise.
+	* gcc.target/aarch64/sve/acle/general/perm_7.c: Likewise.
+
+2025-08-14  H.J. Lu  <hjl.tools@gmail.com>
+
+	Backported from master:
+	2025-07-29  H.J. Lu  <hjl.tools@gmail.com>
+
+	PR target/121208
+	* gcc.target/i386/pr121208-1a.c (dg-options): Add
+	-mno-sse -mno-mmx -mno-80387.
+	* gcc.target/i386/pr121208-1b.c (dg-options): Likewise.
+
+2025-08-14  H.J. Lu  <hjl.tools@gmail.com>
+
+	Backported from master:
+	2025-07-28  H.J. Lu  <hjl.tools@gmail.com>
+
+	PR target/121208
+	* gcc.target/i386/pr121208-1a.c: New test.
+	* gcc.target/i386/pr121208-1b.c: Likewise.
+	* gcc.target/i386/pr121208-2a.c: Likewise.
+	* gcc.target/i386/pr121208-2b.c: Likewise.
+	* gcc.target/i386/pr121208-3a.c: Likewise.
+	* gcc.target/i386/pr121208-3b.c: Likewise.
+
+2025-08-11  Alexandre Oliva  <oliva@adacore.com>
+
+	Backported from master:
+	2025-05-21  Alexandre Oliva  <oliva@adacore.com>
+
+	* gcc.dg/vect/tsvc/vect-tsvc-s332.c: Require vect_early_break_hw.
+	* gcc.dg/vect/tsvc/vect-tsvc-s481.c: Likewise.
+	* gcc.dg/vect/tsvc/vect-tsvc-s482.c: Likewise.
+
+2025-08-10  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>
+
+	Backported from master:
+	2025-08-10  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>
+
+	* lib/multiline.exp: Added pruning of .exe.
+
+2025-08-08  Patrick Palka  <ppalka@redhat.com>
+
+	Backported from master:
+	2025-08-04  Patrick Palka  <ppalka@redhat.com>
+
+	PR c++/120620
+	* g++.dg/cpp2a/constexpr-dynamic19.C: New test.
+	* g++.dg/cpp2a/constexpr-dynamic1a.C: New test.
+
+2025-08-08  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-08-06  Jakub Jelinek  <jakub@redhat.com>
+
+	PR tree-optimization/121413
+	* gcc.dg/torture/bitint-85.c: New test.
+
+2025-08-08  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-08-06  Jakub Jelinek  <jakub@redhat.com>
+
+	PR tree-optimization/121127
+	* gcc.dg/bitint-125.c: New test.
+
+2025-08-08  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-08-01  Jakub Jelinek  <jakub@redhat.com>
+
+	PR middle-end/121322
+	* gcc.dg/pr121322.c: New test.
+
+2025-08-08  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-07-11  Jakub Jelinek  <jakub@redhat.com>
+
+	PR c++/120954
+	* c-c++-common/Warray-bounds-11.c: New test.
+
+2025-08-08  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-07-04  Jakub Jelinek  <jakub@redhat.com>
+
+	PR c/120837
+	* gcc.dg/ubsan/pr120837.c: New test.
+
+2025-08-08  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-07-01  Jakub Jelinek  <jakub@redhat.com>
+
+	PR testsuite/120919
+	* gcc.target/powerpc/builtin_altivec_tr_stxvr_runnable.c (main): Change
+	sc, ss, si and sll vars from scalars to arrays of 2 elements,
+	initialize and test just the first one though.
+
+2025-08-01  Jason Merrill  <jason@redhat.com>
+
+	Backported from master:
+	2025-07-31  Jason Merrill  <jason@redhat.com>
+
+	PR c++/120800
+	* g++.dg/cpp0x/constexpr-array30.C: New test.
+
+2025-07-31  Spencer Abson  <spencer.abson@arm.com>
+
+	Backported from master:
+	2025-07-31  Spencer Abson  <spencer.abson@arm.com>
+
+	PR target/121028
+	* gcc.target/aarch64/sme/call_sm_switch_1.c: Tell check-function
+	-bodies not to ignore .inst directives, and replace the test for
+	"smstart sm" with one for it's encoding.
+	* gcc.target/aarch64/sme/call_sm_switch_11.c: Likewise.
+	* gcc.target/aarch64/sme/pr121028.c: New test.
+
+2025-07-31  Jeevitha  <jeevitha@linux.ibm.com>
+
+	Backported from master:
+	2025-07-24  Jeevitha Palanisamy  <jeevitha@linux.ibm.com>
+
+	PR testsuite/119382
+	* gcc.target/powerpc/vsx-builtin-7.c: Add '-fno-ipa-icf' to dg-options.
+
+2025-07-31  H.J. Lu  <hjl.tools@gmail.com>
+
+	Backported from master:
+	2025-07-30  H.J. Lu  <hjl.tools@gmail.com>
+
+	PR target/120427
+	* gcc.target/i386/pr120427-5.c: New test.
+
+2025-07-31  liuhongt  <hongtao.liu@intel.com>
+
+	Backported from master:
+	2025-07-30  liuhongt  <hongtao.liu@intel.com>
+
+	* gcc.target/i386/pr121274.c: New test.
+
+2025-07-29  H.J. Lu  <hjl.tools@gmail.com>
+
+	Backported from master:
+	2025-06-19  H.J. Lu  <hjl.tools@gmail.com>
+
+	PR target/120427
+	* gcc.target/i386/cold-attribute-4.c: Compile with -Oz.
+	* gcc.target/i386/pr120427-1.c: New test.
+	* gcc.target/i386/pr120427-2.c: Likewise.
+	* gcc.target/i386/pr120427-3.c: Likewise.
+	* gcc.target/i386/pr120427-4.c: Likewise.
+
+2025-07-28  Xi Ruoyao  <xry111@xry111.site>
+
+	Backported from master:
+	2025-07-17  Xi Ruoyao  <xry111@xry111.site>
+
+	PR target/121064
+	* gcc.target/loongarch/pr121064.c: New test.
+
+2025-07-26  Richard Sandiford  <richard.sandiford@arm.com>
+
+	Backported from master:
+	2025-07-11  Richard Sandiford  <richard.sandiford@arm.com>
+
+	PR target/121027
+	* gcc.target/aarch64/sve/acle/general/perm_1.c: New test.
+
+2025-07-26  Richard Sandiford  <richard.sandiford@arm.com>
+
+	Backported from master:
+	2024-10-07  Richard Sandiford  <richard.sandiford@arm.com>
+
+	PR target/121027
+	* gcc.target/aarch64/sve/permute_5.c: New test.
+
+2025-07-26  Jason Merrill  <jason@redhat.com>
+
+	Backported from master:
+	2025-07-15  Jason Merrill  <jason@redhat.com>
+
+	PR c++/120577
+	* g++.dg/cpp2a/constexpr-union9.C: New test.
+
+2025-07-22  Haochen Gui  <guihaoc@gcc.gnu.org>
+
+	Backported from master:
+	2024-08-15  Haochen Gui  <guihaoc@gcc.gnu.org>
+
+	* gcc.target/powerpc/float128-cmp2-runnable.c: Replace
+	ppc_float128_sw with ppc_float128_hw and remove p9vector_hw.
+
+2025-07-18  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-07-18  Jakub Jelinek  <jakub@redhat.com>
+
+	PR tree-optimization/121131
+	* gcc.dg/bitint-124.c: New test.
+
+2025-07-17  H.J. Lu  <hjl.tools@gmail.com>
+
+	Backported from master:
+	2025-07-03  H.J. Lu  <hjl.tools@gmail.com>
+
+	PR target/120908
+	* gcc.target/i386/pr120908.c: New test.
+
+2025-07-17  Jason Merrill  <jason@redhat.com>
+
+	PR c++/87097
+	* g++.dg/cpp0x/constexpr-array29.C: New test.
+
+2025-07-16  Paul Thomas  <pault@gcc.gnu.org>
+
+	Backported from master:
+	2025-07-16  Paul Thomas  <pault@gcc.gnu.org>
+
+	PR fortran/121060
+	* gfortran.dg/associate_75.f90: New test.
+
+2025-07-03  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-07-03  Jakub Jelinek  <jakub@redhat.com>
+
+	PR c++/120940
+	* g++.dg/parse/pr120940.C: New test.
+	* g++.dg/warn/Wduplicated-branches9.C: New test.
+
+2025-07-03  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-07-01  Jakub Jelinek  <jakub@redhat.com>
+
+	PR c++/120471
+	* g++.dg/ubsan/pr120471.C: New test.
+	* g++.dg/parse/pr120471.C: New test.
+
+2025-07-03  Richard Sandiford  <richard.sandiford@arm.com>
+
+	Backported from master:
+	2025-06-12  Richard Sandiford  <richard.sandiford@arm.com>
+
+	PR target/120624
+	* gcc.target/aarch64/sme/za_state_7.c: New test.
+
+2025-06-27  Eric Botcazou  <ebotcazou@adacore.com>
+
+	* gnat.dg/sso20.adb: New test.
+
+2025-06-20  Richard Biener  <rguenther@suse.de>
+
+	Backported from master:
+	2024-09-11  Richard Biener  <rguenther@suse.de>
+
+	PR tree-optimization/116674
+	* g++.dg/vect/pr116674.cc: New testcase.
+
+2025-06-19  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-06-19  Jakub Jelinek  <jakub@redhat.com>
+
+	PR middle-end/120631
+	* gcc.dg/dfp/bitint-10.c: New test.
+	* gcc.dg/dfp/pr120631.c: New test.
+
+2025-06-19  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-06-18  Jakub Jelinek  <jakub@redhat.com>
+
+	PR middle-end/120631
+	* gcc.dg/dfp/bitint-9.c: New test.
+
+2025-06-13  Georg-Johann Lay  <avr@gjlay.de>
+
+	Backported from master:
+	2025-06-12  Georg-Johann Lay  <avr@gjlay.de>
+
+	PR middle-end/117811
+	PR testsuite/52641
+	* gcc.dg/torture/pr117811.c: Fix for int < 32 bit.
+
+2025-06-13  Richard Earnshaw  <rearnsha@arm.com>
+
+	Backported from master:
+	2025-03-25  Richard Earnshaw  <rearnsha@arm.com>
+
+	PR middle-end/117811
+	* gcc.dg/torture/pr117811.c: New test.
+
+2025-06-13  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-06-12  Jakub Jelinek  <jakub@redhat.com>
+
+	PR tree-optimization/120638
+	* gcc.dg/pr120638.c: New test.
+
+2025-06-13  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-06-05  Jakub Jelinek  <jakub@redhat.com>
+
+	PR middle-end/120547
+	* gcc.dg/bitint-123.c: New test.
+
+2025-06-05  Eric Botcazou  <ebotcazou@adacore.com>
+
+	* gnat.dg/specs/opt7.ads: New test.
+	* gnat.dg/specs/opt7_pkg.ads: New helper.
+	* gnat.dg/specs/opt7_pkg.adb: Likewise.
+
+2025-06-02  Jason Merrill  <jason@redhat.com>
+
+	PR c++/120123
+	* g++.dg/cpp2a/concepts-lambda24.C: New test.
+
+2025-05-30  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-05-30  Jakub Jelinek  <jakub@redhat.com>
+
+	PR target/120480
+	* gcc.dg/pr120480.c: New test.
+
+2025-05-30  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-04-17  Jakub Jelinek  <jakub@redhat.com>
+
+	PR target/119834
+	* g++.target/s390/pr119834.C: New test.
+
+2025-05-27  Patrick Palka  <ppalka@redhat.com>
+
+	Backported from master:
+	2025-05-15  Patrick Palka  <ppalka@redhat.com>
+
+	PR c++/120161
+	* g++.dg/template/unify13.C: New test.
+
+2025-05-26  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-02-05  Jakub Jelinek  <jakub@redhat.com>
+
+	PR rtl-optimization/117239
+	* gcc.dg/pr117239.c: New test.
+
+2025-05-26  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2024-11-28  Jakub Jelinek  <jakub@redhat.com>
+
+	PR tree-optimization/117358
+	* gcc.c-torture/compile/pr117358.c: New test.
+
+2025-05-25  Harald Anlauf  <anlauf@gmx.de>
+
+	Backported from master:
+	2025-05-15  Harald Anlauf  <anlauf@gmx.de>
+
+	PR fortran/85750
+	* gfortran.dg/alloc_comp_auto_array_3.f90: Adjust scan counts.
+	* gfortran.dg/alloc_comp_class_3.f03: Remove bogus warnings.
+	* gfortran.dg/alloc_comp_class_4.f03: Likewise.
+	* gfortran.dg/allocate_with_source_14.f03: Adjust scan count.
+	* gfortran.dg/derived_constructor_comps_6.f90: Likewise.
+	* gfortran.dg/derived_result_5.f90: New test.
+
+2025-05-25  Harald Anlauf  <anlauf@gmx.de>
+
+	Backported from master:
+	2024-08-30  Harald Anlauf  <anlauf@gmx.de>
+
+	PR fortran/98454
+	* gfortran.dg/alloc_comp_class_4.f03: Remove bogus pattern.
+	* gfortran.dg/pdt_26.f03: Adjust expected count.
+	* gfortran.dg/derived_result_3.f90: New test.
+
 2025-05-23  Release Manager
 
 	* GCC 14.3.0 released.
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/c-c++-common/Warray-bounds-11.c
@@ -0,0 +1,21 @@
+/* PR c++/120954 */
+/* { dg-do compile } */
+/* { dg-options "-O2 -Warray-bounds=2" } */
+
+static const int a[32] = { 11, 12, 13, 14, 15 };
+static const int b[32] = { 21, 22, 23, 24, 25 };
+static const int c[32] = { 31, 32, 33, 34, 35 };
+static const int d[32] = { 111, 112, 113, 114, 115 };
+static const int e[32] = { 121, 122, 123, 124, 125 };
+static const int f[32] = { 131, 132, 133, 134, 135 };
+
+int
+foo (int x, int y)
+{
+  int r = 0;
+  if (x >= 0 && x < 32)
+    r = (y >= 4 ? (y >= 0x65 ? a : b ) : c)[x];
+  else if (x >= 0x100 && x < 0x120)
+    r = (y >= 4 ? (y >= 0x65 ? d : e ) : f)[x - 0x100];
+  return r;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/c-c++-common/cpp/dir-only-10.c
@@ -0,0 +1,5 @@
+/* PR preprocessor/123273 */
+/* { dg-do preprocess } */
+/* { dg-options -fdirectives-only } */
+
+/* *\/""" */
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/c-c++-common/cpp/dir-only-11.c
@@ -0,0 +1,6 @@
+/* PR preprocessor/123273 */
+/* { dg-do preprocess } */
+/* { dg-options -fdirectives-only } */
+
+/* *\\
+/""" */
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/c-c++-common/gomp/pr120052.c
@@ -0,0 +1,32 @@
+/* PR middle-end/120052 */
+/* { dg-do compile } */
+/* { dg-additional-options "-fsanitize=undefined" } */
+
+void
+foo (unsigned long s, long indx)
+{
+  long counts[2][s];
+  #pragma omp parallel
+  #pragma omp masked
+  for (int i = 0; i < 2; i++)
+    counts[2][indx] = 1;
+}
+
+void
+bar (unsigned long s, long indx)
+{
+  long counts[2][s];
+  #pragma omp parallel shared(counts)
+  #pragma omp masked
+  for (int i = 0; i < 2; i++)
+    counts[2][indx] = 1;
+}
+
+void
+baz (unsigned long s, long indx)
+{
+  long counts[2][s];
+  #pragma omp parallel private(counts)
+  for (int i = 0; i < 2; i++)
+    counts[2][indx] = 1;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/c-c++-common/gomp/pr120564.c
@@ -0,0 +1,15 @@
+/* PR middle-end/120564 */
+/* { dg-do compile } */
+
+void bar (unsigned long long, unsigned long long, unsigned long long);
+
+void
+foo (void)
+{
+  unsigned long long v1, v2, v3;
+#pragma omp parallel for schedule(static, 32) collapse(3)
+  for (v1 = 0; v1 < 20; v1 += 2)
+    for (v2 = __LONG_LONG_MAX__; v2 > __LONG_LONG_MAX__; v2 -= 3)
+      for (v3 = 10; v3 > 0; v3--)
+	bar (v1, v2, v3);
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/c-c++-common/pr111817.c
@@ -0,0 +1,9 @@
+/* PR middle-end/111817 */
+/* { dg-do compile } */
+
+int
+foo (int x, int y)
+{
+  asm ("" : "\n=g" (x) : "0" (y));	/* { dg-warning "output constraint '=' for operand 0 is not at the beginning" } */
+  return x;				/* { dg-error "invalid punctuation '\\\\x\[0-9a-zA-Z]*' in constraint" "" { target *-*-* } .-1 } */
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/c-c++-common/pr122188.c
@@ -0,0 +1,15 @@
+/* PR c/122188 */
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+int
+foo (const unsigned x, int y)
+{
+  return __builtin_ctzg (x ? x : 4081577U, y);
+}
+
+int
+bar (const unsigned x, int y)
+{
+  return __builtin_clzg (x ? x : 4081577U, y);
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.dg/abi/pr121801.C
@@ -0,0 +1,13 @@
+// PR c++/121801
+// { dg-do compile { target { c++20 && float16 } } }
+// { dg-add-options float16 }
+
+template<_Float16 T> void f() {}
+
+void uses() {
+  f<_Float16(1)>();
+  f<_Float16(2)>();
+}
+
+// { dg-final { scan-assembler "_Z1fILDF16_3c00EEvv" } }
+// { dg-final { scan-assembler "_Z1fILDF16_4000EEvv" } }
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.dg/cpp0x/constexpr-123889.C
@@ -0,0 +1,14 @@
+// PR c++/123889
+// { dg-do compile { target c++11 } }
+
+template <class T>
+constexpr int func (T) {
+// { dg-message "'constexpr int func\\\(T\\\) \\\[with T = int\\\]' is not usable as a 'constexpr' function because:" "" { target c++11_only } .-1 }
+// { dg-error "body of 'constexpr' function 'constexpr int func\\\(T\\\) \\\[with T = int\\\]' not a return-statement" "" { target c++11_only } .-2 }
+  return 1;
+  return 2;
+}
+
+static_assert (func (1) == 1, "");
+// { dg-error "non-constant condition for static assertion" "" { target c++11_only } .-1 }
+// { dg-error "'constexpr int func\\\(T\\\) \\\[with T = int\\\]' called in a constant expression" "" { target c++11_only } .-2 }
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.dg/cpp0x/constexpr-array29.C
@@ -0,0 +1,13 @@
+// PR c++/87097
+// { dg-do compile { target c++11 } }
+
+struct A {
+  constexpr A() : data() {}
+  struct X { int n; };
+  X data[2];
+};
+
+static_assert((A(), true), "");
+static_assert(A().data[0].n == 0, "");
+static_assert(A().data[1].n == 0, "");
+constexpr A x;
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.dg/cpp0x/constexpr-array30.C
@@ -0,0 +1,22 @@
+// PR c++/120800
+// { dg-do compile { target c++11 } }
+
+template<typename T>
+struct Container
+{
+ T m_data[1] {};
+};
+
+class Element
+{
+private:
+ Element() = default;
+
+private:
+ bool m_bool1 { false };
+ bool m_bool2;
+
+ friend struct Container<Element>;
+};
+
+Container<Element> element;
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.dg/cpp0x/constexpr-ctor23.C
@@ -0,0 +1,26 @@
+// Verify we diagnose and accept, as an extension, a non-empty constexpr
+// constructor body in C++11 mode.
+// PR c++/123845
+// { dg-do compile { target c++11_only } }
+// { dg-options "" }
+
+constexpr int negate(int n) { return -n; }
+
+struct A {
+  int m;
+  constexpr A() : m(42) {
+    ++m;
+    m = negate(m);
+  } // { dg-warning "does not have empty body \[-Wc++14-extensions\]" }
+};
+static_assert(A().m == -43, "");
+
+template<class T>
+struct B {
+  int m;
+  constexpr B() : m(42) {
+    ++m;
+    m = negate(m);
+  } // { dg-warning "does not have empty body \[-Wc++14-extensions\]" }
+};
+static_assert(B<int>().m == -43, "");
--- a/src/gcc/testsuite/g++.dg/cpp0x/constexpr-ex3.C
+++ b/src/gcc/testsuite/g++.dg/cpp0x/constexpr-ex3.C
@@ -6,7 +6,8 @@
 struct A
 {
   int i;
-  constexpr A(int _i) { i = _i; } // { dg-error "empty body|A::i" "" { target c++17_down } }
+  constexpr A(int _i) { i = _i; } // { dg-warning "empty body" "" { target c++11_only } }
+				  // { dg-error "'A::i' must be init" "" { target c++17_down } .-1 }
 };
 
 template <class T>
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.dg/cpp0x/gen-attrs-90.C
@@ -0,0 +1,8 @@
+// PR c++/123684
+// { dg-do compile { target c++11 } }
+
+inline namespace [[foo::abi_tag (1, 2, 3)]] A {}	// { dg-warning "'abi_tag' attribute directive ignored" }
+inline namespace [[foo::visibility (1, 2, 3)]] B {}	// { dg-warning "'visibility' attribute directive ignored" }
+inline namespace [[foo::deprecated (1, 2, 3)]] C {}	// { dg-warning "'deprecated' attribute directive ignored" }
+inline namespace [[abi_tag (1, 2, 3)]] D {}		// { dg-warning "'abi_tag' attribute directive ignored" }
+inline namespace [[visibility (1, 2, 3)]] E {}		// { dg-warning "'visibility' attribute directive ignored" }
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.dg/cpp0x/pr123818.C
@@ -0,0 +1,24 @@
+// PR c++/123818
+// { dg-do run { target c++11 } }
+
+struct A { A (int x) : a (x) {} int a; };
+struct B { A b; };
+
+int
+foo (B x = B { 42 })
+{
+    return x.b.a;
+}
+
+int
+bar (B x = B { 43 })
+{
+    return x.b.a;
+}
+
+int
+main ()
+{
+  if (foo () != bar () - 1)
+    __builtin_abort ();
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.dg/cpp1y/auto-fn66.C
@@ -0,0 +1,20 @@
+// PR c++/120757
+// { dg-do compile { target c++14 } }
+
+template <typename> struct A
+{
+  auto foo() {}
+};
+
+auto bar(void (A<int>::*)()) {}
+
+template <int> auto baz()
+{
+  bar(&A<int>::foo);
+}
+
+int main()
+{
+  baz<0>();
+  return 0;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.dg/cpp1y/constexpr-121445.C
@@ -0,0 +1,19 @@
+// PR c++/121445
+// { dg-do compile { target c++14 } }
+
+struct D {
+  const char *d;
+  const char *foo () { return ""; };			// { dg-message "declared here" "" { target c++20_down } }
+  constexpr D () : d (foo ()) {}			// { dg-error "call to non-'constexpr' function 'const char\\\* D::foo\\\(\\\)'" "" { target c++20_down } }
+  constexpr D &operator= (const char *) { return *this; }
+};
+struct S {
+  constexpr S ()
+  {
+    struct A { D a; };
+    struct B { A b; };
+    struct C { B c; };
+    C d {};
+    d.c.b.a = "";
+  }
+};
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.dg/cpp1z/decomp66.C
@@ -0,0 +1,23 @@
+// PR c++/123667
+// { dg-do compile { target c++14 } }
+// { dg-options "" }
+
+namespace std {
+  template <typename T> struct tuple_size;
+  template <int, typename> struct tuple_element;
+}
+
+struct A {
+  int i;
+  template <int I> int &get () { return i; }
+};
+
+template <> struct std::tuple_size <A> { static const int value = 2; };
+template <int I> struct std::tuple_element <I,A> { using type = int; };
+
+int
+main ()
+{
+  auto [ x, y ] = A { 0 };	// { dg-warning "structured bindings only available with" "" { target c++14_down } }
+  [] (auto t) { using z = decltype (x); } (1);
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.dg/cpp1z/decomp67.C
@@ -0,0 +1,33 @@
+// PR c++/123667
+// { dg-do compile { target c++11 } }
+// { dg-options "" }
+
+namespace std {
+  template <typename T> struct tuple_size;
+  template <int, typename> struct tuple_element;
+}
+
+struct A {
+  int i;
+  template <int I> int &get () { return i; }
+};
+
+template <> struct std::tuple_size <A> { static const int value = 2; };
+template <int I> struct std::tuple_element <I,A> { using type = int; };
+
+auto [ x, y ] = A { 0 };	// { dg-warning "structured bindings only available with" "" { target c++14_down } }
+
+template <int N>
+void
+foo ()
+{
+  using a = decltype (x);
+  auto [ x, y ] = A { 0 };	// { dg-warning "structured bindings only available with" "" { target c++14_down } }
+  using b = decltype (x);
+}
+
+void
+bar ()
+{
+  foo <42> ();
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.dg/cpp1z/eval-order14.C
@@ -0,0 +1,114 @@
+// PR c++/122772
+// { dg-do run }
+
+struct S { int y : 7; } s;
+struct T { int x; int z : 7; } t;
+int cnt, mode;
+
+int
+foo ()
+{
+#if __cplusplus >= 201703L
+  if (cnt != 1 + (mode & 1))
+    __builtin_abort ();
+#endif
+  ++cnt;
+  return 2;
+}
+
+int
+bar ()
+{
+#if __cplusplus >= 201703L
+  if (cnt != 0)
+    __builtin_abort ();
+#endif
+  ++cnt;
+  return 40;
+}
+
+S &
+baz ()
+{
+#if __cplusplus >= 201703L
+  if (cnt != 2 + (mode & 1))
+    __builtin_abort ();
+#endif
+  if (mode & 2)
+    __builtin_abort ();
+  ++cnt;
+  return s;
+}
+
+T &
+qux ()
+{
+#if __cplusplus >= 201703L
+  if (cnt != 2 + (mode & 1))
+    __builtin_abort ();
+#endif
+  if ((mode & 2) == 0)
+    __builtin_abort ();
+  ++cnt;
+  return t;
+}
+
+bool
+fred (bool x)
+{
+#if __cplusplus >= 201703L
+  if (cnt != 1)
+    __builtin_abort ();
+#endif
+  ++cnt;
+  return x;
+}
+
+void
+plugh (bool b)
+{
+  S x;
+  x.y = 5;
+  mode = 0;
+  cnt = 0;
+  (x.y = foo ()) += bar ();
+  if (cnt != 2 || x.y != 42)
+    __builtin_abort ();
+  x.y = 5;
+  cnt = 0;
+  (baz ().y = foo ()) += bar ();
+  if (cnt != 3 || s.y != 42)
+    __builtin_abort ();
+  s.y = 5;
+  mode = (b ? 0 : 2);
+  cnt = 0;
+  (b ? (baz ().y = foo ()) : (qux ().z = foo ())) += bar ();
+  if (cnt != 3 || (b ? (s.y != 42) : (t.z != 42)))
+    __builtin_abort ();
+  s.y = 5;
+  t.z = 5;
+  mode |= 1;
+  cnt = 0;
+  (fred (b) ? (baz ().y = foo ()) : (qux ().z = foo ())) += bar ();
+  if (cnt != 4 || (b ? (s.y != 42) : (t.z != 42)))
+    __builtin_abort ();
+  s.y = 5;
+  t.z = 5;
+  mode = 0;
+  cnt = 0;
+  ++x.y += bar ();
+  if (cnt != 1 || x.y != 46)
+    __builtin_abort ();
+  cnt = 0;
+  x.y = 9;
+  --x.y += bar ();
+  if (cnt != 1 || x.y != 48)
+    __builtin_abort ();
+}
+
+int
+main ()
+{
+  plugh (false);
+  plugh (true);
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.dg/cpp1z/static_assert1.C
@@ -0,0 +1,17 @@
+// PR c++/91388
+// Make sure we don't emit -Wreturn-type in functions with failed static_asserts.
+// { dg-do compile { target c++17 } }
+
+template <int N>
+int
+foo ()
+{
+  if constexpr (N <= 42)
+    return N;
+  else
+    static_assert (false, "too high N");	// { dg-error "too high N" }
+}						// { dg-bogus "no return statement in function returning non-void" }
+
+int a = foo <0> ();
+int b = foo <42> ();
+int c = foo <100> ();
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.dg/cpp23/auto-fncast19.C
@@ -0,0 +1,12 @@
+// PR c++/120685
+// { dg-do compile { target c++11 } }
+// { dg-options "" }
+
+template <typename T>
+void foo (decltype (auto (T ())) x) {}	// { dg-warning "'auto\\\(x\\\)' only available with" "" { target c++20_down } }
+
+int
+main ()
+{
+  foo <int> (1);
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.dg/cpp2a/concepts-decltype5.C
@@ -0,0 +1,10 @@
+// PR c++/123676
+// { dg-do compile { target c++20 } }
+
+template<class...>
+concept C = true;
+
+template<class... Ts>
+auto f() -> decltype(C<Ts...>) {
+  return true;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.dg/cpp2a/concepts-lambda24.C
@@ -0,0 +1,13 @@
+// PR c++/120123
+// { dg-do compile { target c++20 } }
+
+struct H {
+    void member(int) {}
+    void call() {
+        [this]() {
+            [this](const auto& v)
+                requires requires { /*this->*/member(v); }
+            { return member(v); }(0);
+        };
+    }
+};
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.dg/cpp2a/concepts-placeholder15.C
@@ -0,0 +1,17 @@
+// PR c++/121981
+// { dg-do compile { target c++20 } }
+
+template<auto V>
+concept C = requires { V; };
+
+template<class T, auto V>
+concept D = C<V>;
+
+template<auto V, D<V> auto W>
+struct A { };
+
+template<auto V, D<V> T>
+struct B { };
+
+A<0, 1> a;
+B<0, int> b;
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.dg/cpp2a/concepts-pr122494.C
@@ -0,0 +1,24 @@
+// PR c++/122494
+// { dg-do compile { target c++20 } }
+
+template<class T>
+concept C = false;
+
+template<class T> requires (!C<T>)
+struct A {
+  static constexpr unsigned v = 0;
+};
+
+template<class T>
+struct B {
+  static constexpr unsigned v = A<T>::v;
+
+  constexpr static bool f() {
+    return [](auto) {
+      if (v == 0) { }
+      return true;
+    }(0);
+  }
+};
+
+static_assert(B<int>::f());
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.dg/cpp2a/concepts-pr123814.C
@@ -0,0 +1,34 @@
+// PR c++/123814
+// { dg-do compile { target c++20 } }
+// { dg-additional-options "-Wall --param ggc-min-expand=0 --param ggc-min-heapsize=0" }
+
+namespace std {
+  struct source_location {
+    struct __impl {
+      const char *_M_file_name;
+      const char *_M_function_name;
+      unsigned _M_line;
+      unsigned _M_column;
+    };
+    static void current(const __impl* = __builtin_source_location());
+  };
+} // namespace std
+
+template <typename> concept same_as = true;
+
+template <typename... Us>
+concept one_of = (same_as<Us> || ...);
+
+template <one_of<> T> constexpr int buffer_size_for_int = 0;
+template <> constexpr int buffer_size_for_int<int> = 1;
+
+template <int> using Basic_Characters = int;
+
+template <typename T>
+Basic_Characters<buffer_size_for_int<T>> to_characters() {
+  std::source_location::current();
+} // { dg-warning "return statement" }
+
+void go() {
+  to_characters<int>();
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.dg/cpp2a/constexpr-dynamic19.C
@@ -0,0 +1,10 @@
+// PR c++/120620
+// { dg-do compile }
+
+#include <cxxabi.h>
+
+struct A* a;
+
+void f() {
+  void* const p = abi::__dynamic_cast(&a, 0, 0, 42);
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.dg/cpp2a/constexpr-dynamic1a.C
@@ -0,0 +1,6 @@
+// Test that including <cxxabi.h>, whence the actual abi:__dynamic_cast
+// is declared, doesn't affect our constexpr dynamic_cast handling.
+// { dg-do compile { target c++20 } }
+
+#include <cxxabi.h>
+#include "constexpr-dynamic1.C"
--- a/src/gcc/testsuite/g++.dg/cpp2a/constexpr-try1.C
+++ b/src/gcc/testsuite/g++.dg/cpp2a/constexpr-try1.C
@@ -32,6 +32,7 @@ struct S {
     } catch (int) {	// { dg-error "compound-statement in 'constexpr' function" "" { target c++11_only } }
     }			// { dg-error "compound-statement in 'constexpr' function" "" { target c++11_only } .-2 }
   } catch (...) {	// { dg-error "'constexpr' constructor does not have empty body" "" { target c++11_only } }
+		        // { dg-error "compound-statement in 'constexpr' function" "" { target c++11_only } .-1 }
   }
   int m;
 };
--- a/src/gcc/testsuite/g++.dg/cpp2a/constexpr-try2.C
+++ b/src/gcc/testsuite/g++.dg/cpp2a/constexpr-try2.C
@@ -32,7 +32,8 @@ struct S {
     try {		// { dg-warning "'try' in 'constexpr' function only available with" "" { target c++17_down } }
     } catch (int) {	// { dg-warning "compound-statement in 'constexpr' function" "" { target c++11_only } }
     }			// { dg-warning "compound-statement in 'constexpr' function" "" { target c++11_only } .-2 }
-  } catch (...) {	// { dg-error "'constexpr' constructor does not have empty body" "" { target c++11_only } }
+  } catch (...) {	// { dg-warning "'constexpr' constructor does not have empty body" "" { target c++11_only } }
+			// { dg-warning "compound-statement in 'constexpr' function" "" { target c++11_only } .-1 }
   }
   int m;
 };
--- a/src/gcc/testsuite/g++.dg/cpp2a/constexpr-try3.C
+++ b/src/gcc/testsuite/g++.dg/cpp2a/constexpr-try3.C
@@ -31,7 +31,7 @@ struct S {
     try {		// { dg-warning "'try' in 'constexpr' function only available with" "" { target c++17_down } }
     } catch (int) {
     }
-  } catch (...) {	// { dg-error "'constexpr' constructor does not have empty body" "" { target c++11_only } }
+  } catch (...) {	// { dg-warning "'constexpr' constructor does not have empty body" "" { target c++11_only } }
   }
   int m;
 };
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.dg/cpp2a/constexpr-union9.C
@@ -0,0 +1,33 @@
+// PR c++/120577
+// { dg-do compile { target c++20 } }
+
+template <class _Tp> struct optional {
+  union {
+    _Tp __val_;
+  };
+  template <class... _Args>
+  constexpr optional(_Args... __args)
+      : __val_(__args...) {}
+};
+template <class _Tp, class... _Args>
+constexpr optional<_Tp> make_optional(_Args... __args) {
+  return optional<_Tp>(__args...);
+}
+
+struct __non_trivial_if {
+  constexpr __non_trivial_if() {}
+};
+struct allocator : __non_trivial_if {};
+struct __padding {};
+struct __short {
+  [[__no_unique_address__]] __padding __padding_;
+  int __data_;
+};
+struct basic_string {
+  union {
+    __short __s;
+  };
+  [[__no_unique_address__]] allocator __alloc_;
+  constexpr basic_string(int, int) {}
+};
+auto opt = make_optional<basic_string>(4, 'X');
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.dg/cpp2a/pr123578.C
@@ -0,0 +1,9 @@
+// PR c++/123578
+// { dg-do compile { target c++20 } }
+// { dg-options "-fdump-tree-all" }
+
+namespace {
+  template <typename>
+  struct A { A (decltype ([] { return 0; } ())) {} };
+  A <int> b = 0;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.dg/dfp/pr122834-1.C
@@ -0,0 +1,17 @@
+// PR c++/122834
+// { dg-do compile { target { c++11 && float128 } } }
+// { dg-options "" }
+// { dg-add-options float128 }
+
+typedef decltype (0.0DL) A;
+typedef _Float128 B;
+void bar (A);			// { dg-message "initializing argument 1 of" }
+
+void
+foo (B x)
+{
+  bar (x);			// { dg-warning "with unordered conversion rank" }
+}
+
+auto a = 0.0DL + 1.0F128;	// { dg-error "invalid operands to binary \\\+" }
+auto b = 1.0F128 + 0.0DL;	// { dg-error "invalid operands to binary \\\+" }
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.dg/dfp/pr122834-2.C
@@ -0,0 +1,19 @@
+// PR c++/122834
+// { dg-do compile { target { c++11 && float16 } } }
+// { dg-options "" }
+// { dg-add-options float16 }
+
+typedef decltype (0.0DL) A;
+typedef _Float16 B;
+void bar (A);
+
+void
+foo (B x)
+{
+  bar (x);
+}
+
+auto a = 0.0DL + 1.0F16;
+auto b = 1.0F16 + 0.0DL;
+static_assert (__is_same_as (decltype (0.0DL + 1.0F16), decltype (0.0DL)));
+static_assert (__is_same_as (decltype (1.0F16 + 0.0DL), decltype (0.0DL)));
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.dg/gomp/pr121977.C
@@ -0,0 +1,17 @@
+// PR c++/121977
+// { dg-do compile }
+// { dg-additional-options "-ftrivial-auto-var-init=zero" }
+
+struct T { T () {}; virtual ~T () {}; int t; };
+struct S : virtual public T { int a; void foo (); };
+
+void
+S::foo ()
+{
+#pragma omp parallel
+  {
+    #pragma omp taskloop firstprivate (a, t) lastprivate (t)
+    for (int i = 0; i < a; i++)
+      t++;
+  }
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.dg/gomp/pr123597.C
@@ -0,0 +1,25 @@
+// PR c++/123597
+// { dg-do compile }
+// { dg-additional-options "-fdump-tree-gimple" }
+// { dg-final { scan-tree-dump-not " shared\\\(sum\\\)" "gimple" } }
+
+template <typename T>
+void
+foo (T *x)
+{
+  #pragma omp teams distribute parallel for collapse(2)
+  for (long i = 0; i < 5; i++)
+    for (long j = 0; j < 5; j++)
+      {
+        T sum = 0;
+        for (long k = 0; k < 5; k++)
+          sum += 2;
+        x[i + 5 * j] = sum;
+      }
+}
+
+void
+bar (int *x)
+{
+  foo (x);
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.dg/ipa/pr106260.C
@@ -0,0 +1,64 @@
+// { dg-do compile }
+// { dg-options "-O2 -std=gnu++14 -fwhole-program -fno-unit-at-a-time" }
+
+struct A;
+template <class T>
+struct Q { Q (T); };
+template<typename T, class D>
+struct U {
+  ~U () { m1 (nullptr); }
+  D m2 ();
+  T *u;
+  void m1 (T *) { m2 () (u); }
+};
+struct F { F (int *); };
+template <class, class T = F>
+using W = Q<T>;
+int a, b;
+void fn1 (void *);
+template <class T>
+void
+fn2 (T *x)
+{
+  if (x)
+    x->~T();
+  fn1 (x);
+}
+template <typename T>
+struct C {
+  void operator() (T *x) { fn2 (x); }
+};
+struct D;
+template <typename T, typename D = C<T> >
+using V = U<T, D>;
+struct A {
+  A (int *);
+};
+struct S;
+struct G {
+  V<S> m3 ();
+};
+struct S {
+  int e;
+  virtual ~S () {}
+};
+template<typename T>
+struct H {
+  H (int, T x, int) : h(x) {}
+  G g;
+  void m4 () { g.m3 (); }
+  T h;
+};
+struct I {
+  I(A, W<D>);
+};
+void
+test ()
+{
+  A c (&b);
+  W<D> d (&b);
+  I e (c, d);
+  H<I> f (0, e, a);
+  f.m4 ();
+}
+
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.dg/ipa/pr122856.C
@@ -0,0 +1,26 @@
+/* { dg-do compile } */
+/* { dg-options "-O3 -std=gnu++11" } */
+
+template <typename T>
+class Base {
+public:
+    virtual int get();
+    virtual ~Base() = default;
+};
+
+template <typename T>
+class Derived : public Base<T> {
+public:
+    int get() override { return Base<T>::get(); }
+};
+
+template <typename T>
+int Base<T>::get() {
+
+    return static_cast<Derived<int>*>(this)->get();
+}
+
+int main() {
+    Derived<int> d;
+    return d.get();
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.dg/opt/pr122394.C
@@ -0,0 +1,20 @@
+// PR tree-optimization/122394
+// { dg-do compile { target c++23 } }
+// { dg-options "-O1 -g" }
+
+#include <compare>
+
+struct A {
+  friend auto operator<=> (A, A) = default;
+  double a;
+};
+void foo ();
+A b, c;
+
+void
+bar ()
+{
+  bool d = c >= b;
+  if (d)
+    foo ();
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.dg/parse/crash81.C
@@ -0,0 +1,14 @@
+// PR c++/120876
+// { dg-do compile { target c++11 } }
+
+template <typename T>
+struct S {
+  static bool foo (decltype (bar (T {})));	// { dg-error "'bar' was not declared in this scope; did you mean 'baz'\\\?" }
+  static constexpr bool s = foo (0);
+};
+
+void
+baz ()
+{
+  S <int>::s;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.dg/parse/pr120471.C
@@ -0,0 +1,42 @@
+// PR c++/120471
+// { dg-do compile }
+
+extern int a1[], a2[], a3[], a4[];
+
+int corge (int);
+
+int
+foo (int p)
+{
+  return (p ? a1 : a2)[1];
+}
+
+int
+bar (int p, int q)
+{
+  return (p ? a1 : a2)[q];
+}
+
+int
+garply (int p, int q)
+{
+  return (p ? a1 : a2)[corge (q)];
+}
+
+int
+baz (int p, int q)
+{
+  return (p ? q ? a1 : a2 : q ? a3 : a4)[1];
+}
+
+int
+qux (int p, int q, int r)
+{
+  return (p ? q ? a1 : a2 : q ? a3 : a4)[r];
+}
+
+int
+fred (int p, int q, int r)
+{
+  return (p ? q ? a1 : a2 : q ? a3 : a4)[corge (r)];
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.dg/parse/pr120940.C
@@ -0,0 +1,18 @@
+// PR c++/120940
+// { dg-do run }
+
+int a[8] = { 1, 2, 3, 4, 5, 6, 7, 8 };
+int b[8] = { 9, 10, 11, 12, 13, 14, 15, 16 };
+
+__attribute__((noipa)) int
+foo (int x, int y)
+{
+  return (x ? a : b)[y];
+}
+
+int
+main ()
+{
+  if (foo (1, 4) != 5 || foo (0, 6) != 15)
+    __builtin_abort ();
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.dg/template/unify13.C
@@ -0,0 +1,18 @@
+// PR c++/120161
+
+template<class T, class U>
+struct mp_list { };
+
+template<class T>
+struct Wrap { struct type { }; };
+
+struct A : mp_list<Wrap<int>::type, void>
+         , mp_list<Wrap<long>::type, void> { };
+
+template<class U>
+void f(mp_list<Wrap<int>::type, U>*);
+
+int main() {
+  A a;
+  f(&a);
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.dg/torture/pr112400.C
@@ -0,0 +1,114 @@
+/* { dg-do compile } */
+/* { dg-options "-Wno-return-type" } */
+
+typedef struct a *b;
+template <typename c, typename d> c e(d);
+enum f { g, h, i };
+enum j { k, l, m, aa };
+struct a {
+  f ab;
+};
+struct af {
+} n;
+struct ah;
+class al;
+b q;
+void r(a *);
+struct o : af {};
+struct p : o {};
+struct ag : p {};
+j s(af *);
+b t();
+f fn4();
+unsigned fn5(ag *);
+b u(ag *, unsigned);
+af *v(b(b), b);
+static bool w(al *, af *, b(b), b aw, b *ax, j) {
+  r(ax[2]);
+  if (aw)
+    return false;
+}
+ag *ay;
+void x(al *at, b as(b), b bb, b bc) {
+  switch (bb->ab)
+  case i:
+    if (af *bd = v(as, bb))
+      if (e<ah *>(bd))
+	switch (fn4())
+	case h: {
+	  b be;
+	  switch (be->ab)
+	  case i:
+	    if (af *bf = v(as, be))
+	      if (e<ah *>(bf))
+		if (ag *bg = e<ag *>(bf))
+		  switch (s(bg)) {
+		  case k:
+		    if (fn5(bg) == 1) {
+		      b bh = u(bg, 0);
+		      bh = t();
+		      switch (bc->ab)
+		      case g: {
+			b ax[]{be, bh, bc};
+			w(at, &n, as, q, ax, k);
+		      }
+		    }
+		    break;
+		  case l:
+		    if (fn5(bg) == 1) {
+		      b bh = u(bg, 0);
+		      bh = t();
+		      switch (bc->ab)
+		      case g: {
+			b ax[]{be, bh, bc};
+			w(at, &n, as, q, ax, l);
+		      }
+		    }
+		  }
+	}
+	  else switch (s(ay)) {
+	  case k:
+	    if (fn5(ay) == 1) {
+	      b be = u(ay, 0);
+	      be = t();
+	      switch (bc->ab)
+	      case g: {
+		b ax[]{bb, be, bc};
+		w(at, &n, as, q, ax, k);
+	      }
+	    }
+	    break;
+	  case l:
+	    if (fn5(ay) == 1) {
+	      b be = u(ay, 0);
+	      be = t();
+	      switch (bc->ab)
+	      case g: {
+		b ax[]{bb, be, bc};
+		w(at, &n, as, q, ax, l);
+	      }
+	    }
+	    break;
+	  case m:
+	    if (fn5(ay) == 1) {
+	      b be = u(ay, 0);
+	      be = t();
+	      switch (bc->ab)
+	      case g: {
+		b ax[]{bb, be, bc};
+		w(at, &n, as, q, ax, m);
+	      }
+	    }
+	    break;
+	  case aa:
+	    if (fn5(ay) == 1) {
+	      b be = u(ay, 0);
+	      be = t();
+	      switch (bc->ab)
+	      case g: {
+		b ax[]{bb, be, bc};
+		w(at, &n, as, q, ax, aa);
+	      }
+	    }
+	  }
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.dg/torture/pr117217-1.C
@@ -0,0 +1,24 @@
+struct [[gnu::packed]] A {
+  int i;
+  bool b;
+};
+
+struct [[gnu::packed]] B {
+  int i;
+  bool b : 1;
+};
+
+struct E {
+  union Data {
+    A a;
+    B b;
+    Data(const B &b) : b(b) {}
+  } data;
+};
+
+extern B copy;
+
+int main() {
+  E e{{B()}};
+  copy = e.data.b; // NEEDED FOR ICE
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.dg/torture/pr117217-2.C
@@ -0,0 +1,24 @@
+struct a {
+  int b;
+  long c;
+  long d;
+  bool f;
+};
+struct g {
+  int b;
+  long c;
+  long d;
+  bool : 1;
+} h;
+struct l {
+  union i {
+    a j;
+    g k;
+    i(g m) : k(m) {}
+  } data;
+};
+int main() {
+  l e{g()};
+  h = e.data.k;
+  return 0;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.dg/torture/pr121870.C
@@ -0,0 +1,20 @@
+__attribute__((noreturn)) void f1(void)
+{
+    while(true) {}
+}
+static void (*fptr)(void) = f1;
+struct s1
+{
+    ~s1() {
+        fptr();
+    }
+    void DoInner() {
+        fptr();
+    }
+};
+
+void f()
+{
+    s1 xxx;
+    xxx.DoInner();
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.dg/torture/pr124135-1.C
@@ -0,0 +1,20 @@
+// PR tree-optimization/124135
+// { dg-do compile }
+
+void foo (char, long double *, int);
+int qux (int);
+
+long double
+bar (int x)
+{
+  long double a;
+  if (x)
+    foo (0, &a, qux (42));
+  return a;
+}
+
+void
+baz (int x)
+{
+  bar (x);
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.dg/torture/pr124135-2.C
@@ -0,0 +1,27 @@
+// PR tree-optimization/124135
+// { dg-do compile }
+
+#ifdef __SIZEOF_FLOAT128__
+void foo (char, __float128 *, int);
+int qux (int);
+
+__float128
+bar (int x)
+{
+  __float128 a;
+  if (x)
+    foo (0, &a, qux (42));
+  return a;
+}
+
+void
+baz (int x)
+{
+  bar (x);
+}
+#else
+void
+baz ()
+{
+}
+#endif
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.dg/ubsan/pr120471.C
@@ -0,0 +1,21 @@
+// PR c++/120471
+// { dg-do run }
+// { dg-options "-fsanitize=undefined" }
+
+volatile int b[1], a[1];
+
+void
+foo (int x)
+{
+  volatile int c = 21;
+  volatile int v = (x % 2 ? b : a)[c % 3];
+  if (v != 0)
+    __builtin_abort ();
+}
+
+int
+main ()
+{
+  foo (1);
+  foo (2);
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.dg/vect/pr116674.cc
@@ -0,0 +1,85 @@
+// { dg-do compile }
+// { dg-require-effective-target c++11 }
+// { dg-additional-options "-Ofast" }
+// { dg-additional-options "-march=x86-64-v3" { target { x86_64-*-* i?86-*-* } } }
+
+namespace std {
+    typedef int a;
+    template <typename> struct b;
+    template <typename> class aa {};
+    template <typename c> c d(c e, c) { return e; }
+    template <typename c> struct b<aa<c>> {
+	using f = c;
+	using g = c *;
+	template <typename h> using j = aa<h>;
+    };
+} // namespace std
+namespace l {
+    template <typename ab> struct m : std::b<ab> {
+	typedef std::b<ab> n;
+	typedef typename n::f &q;
+	template <typename c> struct ac { typedef typename n::j<c> ad; };
+    };
+} // namespace l
+namespace std {
+    template <typename c, typename ab> struct o {
+	typedef typename l::m<ab>::ac<c>::ad ae;
+	typedef typename l::m<ae>::g g;
+	struct p {
+	    g af;
+	};
+	struct ag : p {
+	    ag(ae) {}
+	};
+	typedef ab u;
+	o(a, u e) : ah(e) {}
+	ag ah;
+    };
+    template <typename c, typename ab = aa<c>> class r : o<c, ab> {
+	typedef o<c, ab> s;
+	typedef typename s::ae ae;
+	typedef l::m<ae> w;
+
+    public:
+	c f;
+	typedef typename w::q q;
+	typedef a t;
+	typedef ab u;
+	r(t x, u e = u()) : s(ai(x, e), e) {}
+	q operator[](t x) { return *(this->ah.af + x); }
+	t ai(t x, u) { return x; }
+    };
+    extern "C" __attribute__((__simd__)) double exp(double);
+} // namespace std
+using namespace std;
+int ak;
+double v, y;
+void am(double, int an, double, double, double, double, double, double, double,
+	double, double, double, int, double, double, double, double,
+	r<double> ap, double, double, double, double, double, double, double,
+	double, r<double> ar, r<double> as, double, double, r<double> at,
+	r<double> au, r<double> av, double, double) {
+    double ba;
+    for (int k;;)
+      for (int i; i < an; ++i) {
+	  y = i;
+	  v = d(y, 25.0);
+	  ba = exp(v);
+	  ar[i * (ak + 1)] = ba;
+	  as[i * (ak + 1)] = ar[i * (ak + 1)];
+	  if (k && ap[k]) {
+	      at[i * (ak + 1)] = av[i * (ak + 1)] = as[i * (ak + 1)];
+	      au[i * (ak + 1)] = ar[i * (ak + 1)];
+	  } else {
+	      au[i * (ak + 1)] = ba;
+	      at[i * (ak + 1)] = av[i * (ak + 1)] = k;
+	  }
+      }
+}
+void b(int bc) {
+    double bd, be, bf, bg, bh, ao, ap, bn, bo, bp, bq, br, bs, bt, bu, bv, bw, bx,
+    by, aq, ar, as, bz, ca, at, au, av, cb, aw;
+    int bi;
+    am(bh, bc, bi, bi, bi, bi, bv, bw, bx, by, bu, bt, bi, ao, bn, bo, bp, ap, bq,
+       br, bs, bd, be, bf, bg, aq, ar, as, bz, ca, at, au, av, cb, aw);
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.dg/warn/Wduplicated-branches9.C
@@ -0,0 +1,11 @@
+// PR c++/120940
+// { dg-do compile }
+// { dg-options "-Wduplicated-branches" }
+
+static char a[16][8], b[16][8];
+
+char *
+foo (int x, int y)
+{
+  return (x ? a : b)[y];
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.dg/warn/Wmismatched-new-delete-10.C
@@ -0,0 +1,25 @@
+// PR tree-optimization/123513
+// { dg-do compile }
+// { dg-options "-Wmismatched-new-delete" }
+
+typedef __SIZE_TYPE__ size_t;
+
+template <size_t N>
+class A {};
+struct B { B (); };
+
+template <size_t N>
+void *operator new (size_t, A <N> &);
+
+template <size_t N>
+void operator delete (void *, A <N> &);
+
+void
+foo (B *, A <1024> &);
+
+void
+bar ()
+{
+  A <1024> a;
+  foo (new (a) B (), a);	// { dg-bogus "called on pointer returned from a mismatched allocation function" }
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.target/aarch64/dwarf-bit-stride-func.C
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+// { dg-options "-g -dA" }
+// { dg-final { scan-assembler-times "DW_AT_name: \"svbool_t\"" 1 } }
+// { dg-final { scan-assembler-times ".byte	0x1	// DW_AT_bit_stride" 1 } }
+// { dg-final { scan-assembler-times ".byte	0x1	// DW_AT_bit_size" 1 } }
+
+#include <arm_sve.h>
+
+[[gnu::target ("arch=armv9-a+sve")]]
+void fun ()
+{
+  volatile svbool_t pred8 = svwhilelt_b8_u32 (0u, 1u);
+  volatile svbool_t pred16 = svwhilelt_b16_u32 (0u, 3u);
+  volatile svbool_t pred32 = svwhilelt_b32_u32 (0u, 7u);
+  volatile svbool_t pred64 = svwhilelt_b64_u32 (0u, 11u);
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.target/aarch64/dwarf-bit-stride-pragma-sme.C
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+// { dg-options "-g -dA" }
+// { dg-final { scan-assembler-times "DW_AT_name: \"svbool_t\"" 1 } }
+// { dg-final { scan-assembler-times "DW_AT_name: \"svcount_t\"" 1 } }
+// { dg-final { scan-assembler-times ".byte	0x1	// DW_AT_bit_stride" 1 } }
+// { dg-final { scan-assembler-times ".byte	0x1	// DW_AT_bit_size" 1 } }
+
+#include <arm_sme.h>
+
+#pragma GCC target "+sve2+sme2"
+
+void fun ()
+{
+  volatile svbool_t pred;
+  volatile svcount_t count;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.target/aarch64/dwarf-bit-stride-pragma.C
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+// { dg-options "-g -dA" }
+// { dg-final { scan-assembler-times "DW_AT_name: \"svbool_t\"" 1 } }
+// { dg-final { scan-assembler-times ".byte	0x1	// DW_AT_bit_stride" 1 } }
+// { dg-final { scan-assembler-times ".byte	0x1	// DW_AT_bit_size" 1 } }
+
+#include <arm_sve.h>
+
+#pragma GCC target "+sve"
+
+void fun ()
+{
+  volatile svbool_t pred8 = svwhilelt_b8_u32 (0u, 1u);
+  volatile svbool_t pred16 = svwhilelt_b16_u32 (0u, 3u);
+  volatile svbool_t pred32 = svwhilelt_b32_u32 (0u, 7u);
+  volatile svbool_t pred64 = svwhilelt_b64_u32 (0u, 11u);
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.target/aarch64/pr124126-1.C
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-g" } */
+/* PR target/124126 */
+/* Make sure an array of uint64_t[8] works when
+   used before the inlcude of arm_acle.h.  */
+
+typedef unsigned long uint64_t;
+void executeSuperscalar(uint64_t (*r)[8]);
+
+#include "arm_acle.h"
+
+void initDatasetItem() {
+  uint64_t rl[8];
+  executeSuperscalar(&rl);
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.target/aarch64/sme/sme_throw_1.C
@@ -0,0 +1,56 @@
+/* { dg-do run { target { aarch64*-linux-gnu* && aarch64_sme_hw } } } */
+/* { dg-options "-fnon-call-exceptions" } */
+
+#include <signal.h>
+#include <arm_sme.h>
+
+static bool caught;
+
+[[gnu::noipa]] void thrower(int)
+{
+  throw 1;
+}
+
+[[gnu::noipa]] void bar()
+{
+  *(volatile int *)0 = 0;
+}
+
+[[gnu::noipa]] void foo()
+{
+  try
+    {
+      bar();
+    }
+  catch (int)
+    {
+      caught = true;
+    }
+}
+
+__arm_new("za") __arm_locally_streaming void sme_user()
+{
+  svbool_t all = svptrue_b8();
+  for (unsigned int i = 0; i < svcntb(); ++i)
+    {
+      svint8_t expected = svindex_s8(i + 1, i);
+      svwrite_hor_za8_m(0, i, all, expected);
+    }
+  foo();
+  for (unsigned int i = 0; i < svcntb(); ++i)
+    {
+      svint8_t expected = svindex_s8(i + 1, i);
+      svint8_t actual = svread_hor_za8_m(svdup_s8(0), all, 0, i);
+      if (svptest_any(all, svcmpne(all, expected, actual)))
+	__builtin_abort();
+    }
+  if (!caught)
+    __builtin_abort();
+}
+
+int main()
+{
+  signal(SIGSEGV, thrower);
+  sme_user();
+  return 0;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.target/aarch64/sme/sme_throw_2.C
@@ -0,0 +1,4 @@
+/* { dg-do run { target { aarch64*-linux-gnu* && aarch64_sme_hw } } } */
+/* { dg-options "-O2 -fnon-call-exceptions" } */
+
+#include "sme_throw_1.C"
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.target/aarch64/sve/dwarf-bit-stride.C
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+// { dg-options "-g -dA" }
+// { dg-final { scan-assembler-times "DW_AT_name: \"svbool_t\"" 1 } }
+// { dg-final { scan-assembler-times ".byte	0x1	// DW_AT_bit_stride" 1 } }
+// { dg-final { scan-assembler-times ".byte	0x1	// DW_AT_bit_size" 1 } }
+
+#include <arm_sve.h>
+
+void fun ()
+{
+  volatile svbool_t pred8 = svwhilelt_b8_u32 (0u, 1u);
+  volatile svbool_t pred16 = svwhilelt_b16_u32 (0u, 3u);
+  volatile svbool_t pred32 = svwhilelt_b32_u32 (0u, 7u);
+  volatile svbool_t pred64 = svwhilelt_b64_u32 (0u, 11u);
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.target/aarch64/sve/pr121449.C
@@ -0,0 +1,44 @@
+/* PR target/121449 */
+/* { dg-do assemble { target aarch64_asm_sve_ok } } */
+/* { dg-options "-O3 -save-temps" } */
+
+struct example;
+
+struct array {
+  unsigned length();
+  example *operator[](unsigned i) {
+    example **data = reinterpret_cast<example **>(this);
+    return data[i];
+  }
+};
+
+struct example {
+  int a[16];
+  bool is_even;
+  int version;
+  int count() { return is_even ? 2 : 1; }
+  void fun1(int, long);
+  void fun2(unsigned, unsigned);
+  void process(array &, array &);
+};
+
+bool found;
+
+void example::process(array &a, array &b) {
+  for (unsigned i = 1; a.length(); i++) {
+    long total = 0;
+    for (unsigned k = 0; k <= i; k++) {
+      total += a[k]->count();
+    }
+    for (unsigned j = 0; j < i; j++) {
+      int major = b[j]->version;
+      if (found)
+        major += i;
+      fun1(i + 1, total);
+      fun2(j, major);
+    }
+  }
+}
+
+/* { dg-final { scan-assembler-not {\tld1b\t(z[0-9]+)\.d, p[0-7]/z, \[(z[0-9]+)\.d, #64\]} } } */
+
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.target/i386/avx512fp16-pr123607.C
@@ -0,0 +1,60 @@
+// PR target/123607
+// { dg-do assemble { target avx512fp16 } }
+// { dg-options "-std=c++23 -O2 -mavx512fp16" }
+
+namespace std::simd {
+template <int> struct basic_mask {
+  bool _M_data;
+  bool operator[](int) { return _M_data; }
+};
+template <int _Ap>
+  requires(_Ap > 1)
+struct basic_mask<_Ap> {
+  static constexpr int _N0 = _Ap / 2;
+  using _Mask1 = basic_mask<_N0>;
+  _Mask1 _M_data1;
+  static basic_mask _S_init(basic_mask<_N0>, _Mask1 __y) {
+    basic_mask __r;
+    __r._M_data1 = __y;
+    return __r;
+  }
+};
+template <int _Ap> struct basic_vec {
+  _Float16 _M_data;
+  using mask_type = basic_mask<_Ap>;
+  friend mask_type operator<(basic_vec __x, basic_vec __y) {
+    return mask_type(__x._M_data < __y._M_data);
+  }
+  friend basic_vec __select_impl(mask_type __k, basic_vec __t, basic_vec __f) {
+    return __k[0] ? __t : __f;
+  }
+};
+template <int _Ap>
+  requires(_Ap > 1)
+struct basic_vec<_Ap> {
+  static constexpr int _N0 = _Ap / 2;
+  using _DataType1 = basic_vec<_N0>;
+  _DataType1 _M_data0;
+  _DataType1 _M_data1;
+  using mask_type = basic_mask<_Ap>;
+  static basic_vec _S_init(_DataType1 __y) {
+    basic_vec __r;
+    __r._M_data1 = __y;
+    return __r;
+  }
+  friend mask_type operator<(basic_vec __x, basic_vec __y) {
+    return mask_type::_S_init(__x._M_data0 < __y._M_data0,
+                              __x._M_data1 < __y._M_data1);
+  }
+  friend basic_vec __select_impl(mask_type __k, basic_vec __t, basic_vec __f) {
+    return _S_init(__select_impl(__k._M_data1, __t._M_data1, __f._M_data1));
+  }
+};
+basic_vec<4> b;
+basic_vec<4> max(basic_vec<4> a) {
+  basic_mask __trans_tmp_1 = a < b;
+  return __select_impl(__trans_tmp_1, b, a);
+}
+}
+namespace simd = std::simd;
+simd::basic_vec test_runner___trans_tmp_2 = max(simd::basic_vec<4>());
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.target/i386/pr122446-1.C
@@ -0,0 +1,17 @@
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-mamx-tile -mamx-int8 -O0" } */
+/* { dg-final { scan-assembler "tdpbssd\[ \\t]+\[^\n\]*%tmm2+\[^\n\]*%tmm1+\[^\n\]*%tmm0" } } */
+
+#include <immintrin.h>
+
+template <int hello, int crazy, int gcc>
+struct dpbssd
+{
+  void operator()() { _tile_dpbssd(hello, crazy, gcc); }
+};
+
+void f()
+{
+  dpbssd<0, 1, 2>()();
+}
+
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.target/i386/pr122446-amxbf16.C
@@ -0,0 +1,16 @@
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-mamx-tile -mamx-bf16 -O0" } */
+/* { dg-final { scan-assembler "tdpbf16ps\[ \\t]+%tmm2,\[ \\t\]*%tmm1,\[ \\t\]*%tmm0" } } */
+
+#include <immintrin.h>
+
+template <int dst, int src1, int src2>
+struct dpbf16ps
+{
+  void operator()() { _tile_dpbf16ps(dst, src1, src2); }
+};
+
+void test_amx_bf16()
+{
+  dpbf16ps<0, 1, 2>()();
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.target/i386/pr122446-amxcomplex.C
@@ -0,0 +1,24 @@
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-mamx-tile -mamx-complex -O0" } */
+/* { dg-final { scan-assembler "tcmmimfp16ps\[ \\t]+%tmm2,\[ \\t\]*%tmm1,\[ \\t\]*%tmm0" } } */
+/* { dg-final { scan-assembler "tcmmrlfp16ps\[ \\t]+%tmm5,\[ \\t\]*%tmm4,\[ \\t\]*%tmm3" } } */
+
+#include <immintrin.h>
+
+template <int dst, int src1, int src2>
+struct cmmimfp16ps
+{
+  void operator()() { _tile_cmmimfp16ps(dst, src1, src2); }
+};
+
+template <int dst, int src1, int src2>
+struct cmmrlfp16ps
+{
+  void operator()() { _tile_cmmrlfp16ps(dst, src1, src2); }
+};
+
+void test_amx_complex()
+{
+  cmmimfp16ps<0, 1, 2>()();
+  cmmrlfp16ps<3, 4, 5>()();
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.target/i386/pr122446-amxfp16.C
@@ -0,0 +1,16 @@
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-mamx-tile -mamx-fp16 -O0" } */
+/* { dg-final { scan-assembler "tdpfp16ps\[ \\t]+%tmm2,\[ \\t\]*%tmm1,\[ \\t\]*%tmm0" } } */
+
+#include <immintrin.h>
+
+template <int dst, int src1, int src2>
+struct dpfp16ps
+{
+  void operator()() { _tile_dpfp16ps(dst, src1, src2); }
+};
+
+void test_amx_fp16()
+{
+  dpfp16ps<0, 1, 2>()();
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.target/i386/pr122446-amxint8.C
@@ -0,0 +1,40 @@
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-mamx-tile -mamx-int8 -O0" } */
+/* { dg-final { scan-assembler "tdpbssd\[ \\t]+%tmm2,\[ \\t\]*%tmm1,\[ \\t\]*%tmm0" } } */
+/* { dg-final { scan-assembler "tdpbsud\[ \\t]+%tmm5,\[ \\t\]*%tmm4,\[ \\t\]*%tmm3" } } */
+/* { dg-final { scan-assembler "tdpbusd\[ \\t]+%tmm2,\[ \\t\]*%tmm1,\[ \\t\]*%tmm6" } } */
+/* { dg-final { scan-assembler "tdpbuud\[ \\t]+%tmm1,\[ \\t\]*%tmm0,\[ \\t\]*%tmm7" } } */
+
+#include <immintrin.h>
+
+template <int dst, int src1, int src2>
+struct dpbssd
+{
+  void operator()() { _tile_dpbssd(dst, src1, src2); }
+};
+
+template <int dst, int src1, int src2>
+struct dpbsud
+{
+  void operator()() { _tile_dpbsud(dst, src1, src2); }
+};
+
+template <int dst, int src1, int src2>
+struct dpbusd
+{
+  void operator()() { _tile_dpbusd(dst, src1, src2); }
+};
+
+template <int dst, int src1, int src2>
+struct dpbuud
+{
+  void operator()() { _tile_dpbuud(dst, src1, src2); }
+};
+
+void test_amx_int8()
+{
+  dpbssd<0, 1, 2>()();
+  dpbsud<3, 4, 5>()();
+  dpbusd<6, 1, 2>()();
+  dpbuud<7, 0, 1>()();
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.target/i386/pr122446-amxtile.C
@@ -0,0 +1,50 @@
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-mamx-tile -O0" } */
+/* { dg-final { scan-assembler "tileloadd\[ \\t]+\[^\n\]*,\[ \\t\]*%tmm0" } } */
+/* { dg-final { scan-assembler "tilestored\[ \\t]+%tmm1," } } */
+/* { dg-final { scan-assembler "tilezero\[ \\t]+%tmm3" } } */
+/* { dg-final { scan-assembler "tileloaddt1\[ \\t]+\[^\n\]*,\[ \\t\]*%tmm2" } } */
+
+#include <immintrin.h>
+
+template <int tmm_num>
+struct tile_loadd_test
+{
+  void operator()(const void* base, int stride)
+  {
+    _tile_loadd(tmm_num, base, stride);
+  }
+};
+
+template <int tmm_num>
+struct tile_stored_test
+{
+  void operator()(void* base, int stride)
+  {
+    _tile_stored(tmm_num, base, stride);
+  }
+};
+
+template <int tmm_num>
+struct tile_zero_test
+{
+  void operator()() { _tile_zero(tmm_num); }
+};
+
+template <int tmm_num>
+struct tile_stream_loadd_test
+{
+  void operator()(const void* base, int stride)
+  {
+    _tile_stream_loadd(tmm_num, base, stride);
+  }
+};
+
+void test_amx_tile()
+{
+  char buf[1024];
+  tile_loadd_test<0>()(buf, 64);
+  tile_stored_test<1>()(buf, 64);
+  tile_stream_loadd_test<2>()(buf, 64);
+  tile_zero_test<3>()();
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.target/i386/pr123779.C
@@ -0,0 +1,56 @@
+/* PR target/123779 */
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512vl -mavx512bw" } */
+
+typedef char __v16qi __attribute__((__vector_size__(16)));
+typedef short __v8hi __attribute__((__vector_size__(16)));
+typedef int __v4si __attribute__((__vector_size__(16)));
+typedef long long __v2di __attribute__((__vector_size__(16)));
+
+typedef int __v8si __attribute__((__vector_size__(32)));
+typedef long long __v4di __attribute__((__vector_size__(32)));
+typedef long long __v8di __attribute__((__vector_size__(64)));
+typedef unsigned char __mmask8;
+
+long long g_mem;
+
+#define MAKE_TEST_BLEND(NAME, DEST_T, SRC_INIT_T, PMOV_INPUT_CAST_T, \
+			PMOV_FUNC, BLEND_FUNC, BLEND_CAST_T, LOAD_VAL_TYPE, ...) \
+    DEST_T dest_##NAME, mask_src1_##NAME, mask_src2_##NAME, mask_##NAME, res_##NAME; \
+    void test_##NAME() \
+      { \
+        mask_##NAME = mask_src1_##NAME < mask_src2_##NAME; \
+        LOAD_VAL_TYPE val = (LOAD_VAL_TYPE)g_mem; \
+        SRC_INIT_T src_vec = { __VA_ARGS__ }; \
+        DEST_T extended = (DEST_T)PMOV_FUNC ((PMOV_INPUT_CAST_T)src_vec); \
+        res_##NAME = (DEST_T)BLEND_FUNC ( \
+            (BLEND_CAST_T)dest_##NAME, \
+            (BLEND_CAST_T)extended, \
+            (BLEND_CAST_T)mask_##NAME); \
+      }
+
+#define MAKE_TEST_MASK(NAME, DEST_T, SRC_INIT_T, PMOV_INPUT_CAST_T, \
+		       PMOV_MASK_FUNC, LOAD_VAL_TYPE, ...) \
+    DEST_T dest_##NAME, res_##NAME; \
+    __mmask8 mask_##NAME; \
+    void test_##NAME() \
+      { \
+	LOAD_VAL_TYPE val = (LOAD_VAL_TYPE) g_mem; \
+	SRC_INIT_T src_vec = { __VA_ARGS__ }; \
+	res_##NAME = PMOV_MASK_FUNC ((PMOV_INPUT_CAST_T)src_vec, \
+				     dest_##NAME, \
+				     mask_##NAME);\
+      }  
+
+
+MAKE_TEST_BLEND(v8qi_v8hi, __v8hi, __v2di, __v16qi, __builtin_ia32_pmovzxbw128, __builtin_ia32_pblendvb128, __v16qi, long long, val, 0)
+MAKE_TEST_BLEND(v4qi_v4si, __v4si, __v4si, __v16qi, __builtin_ia32_pmovzxbd128, __builtin_ia32_pblendvb128, __v16qi, int, val, 0, 0, 0)
+MAKE_TEST_BLEND(v4hi_v4si, __v4si, __v2di, __v8hi, __builtin_ia32_pmovzxwd128, __builtin_ia32_pblendvb128, __v16qi, long long, val, 0)
+MAKE_TEST_BLEND(v2hi_v2di, __v2di, __v4si, __v8hi, __builtin_ia32_pmovzxwq128, __builtin_ia32_pblendvb128, __v16qi, int, val, 0, 0, 0)
+MAKE_TEST_BLEND(v2si_v2di, __v2di, __v2di, __v4si, __builtin_ia32_pmovzxdq128, __builtin_ia32_pblendvb128, __v16qi, long long, val, 0)
+
+
+MAKE_TEST_MASK(v8qi_v8si, __v8si, __v2di, __v16qi, __builtin_ia32_pmovzxbd256_mask, long long, val, 0)
+MAKE_TEST_MASK(v4qi_v4di, __v4di, __v4si, __v16qi, __builtin_ia32_pmovzxbq256_mask, int, val, 0, 0, 0)
+MAKE_TEST_MASK(v4hi_v4di, __v4di, __v2di, __v8hi, __builtin_ia32_pmovzxwq256_mask, long long, val, 0)
+MAKE_TEST_MASK(v8qi_v8di, __v8di, __v2di, __v16qi, __builtin_ia32_pmovzxbq512_mask, long long, val, 0)
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.target/loongarch/pr117575.C
@@ -0,0 +1,81 @@
+/* { dg-do compile } */
+/* { dg-options "-O3 -mlasx" } */
+
+typedef long unsigned int size_t;
+typedef unsigned char simde__mmask8;
+typedef double simde_float64;
+typedef simde_float64 simde__m512d __attribute__ ((__aligned__ ((64))))
+__attribute__ ((__vector_size__ (64))) __attribute__ ((__may_alias__));
+typedef simde_float64 simde__m256d __attribute__ ((__aligned__ ((32))))
+__attribute__ ((__vector_size__ (32))) __attribute__ ((__may_alias__));
+simde__m512d simde_mm512_set_pd (simde_float64 e7, simde_float64 e6,
+                                 simde_float64 e5, simde_float64 e4,
+                                 simde_float64 e3, simde_float64 e2,
+                                 simde_float64 e1, simde_float64 e0);
+simde__m256d simde_mm256_maskz_mov_pd (simde__mmask8 k, simde__m256d a);
+int simde_test_x86_assert_equal_f64x4_ (simde__m256d a, simde__m256d b);
+
+typedef union
+{
+
+  __attribute__ ((__aligned__ ((32)))) simde_float64 f64
+      __attribute__ ((__vector_size__ (32))) __attribute__ ((__may_alias__));
+} simde__m256d_private;
+__attribute__ ((__always_inline__)) inline static simde__m256d
+simde__m256d_from_private (simde__m256d_private v)
+{
+  simde__m256d r;
+  __builtin_memcpy (&r, &v, sizeof (r));
+  return r;
+}
+simde__m256d
+simde_mm256_set_pd (simde_float64 e3, simde_float64 e2, simde_float64 e1,
+                    simde_float64 e0)
+{
+
+  simde__m256d_private r_;
+
+  r_.f64[0] = e0;
+  r_.f64[1] = e1;
+  r_.f64[2] = e2;
+  r_.f64[3] = e3;
+
+  return simde__m256d_from_private (r_);
+}
+
+simde__m256d simde_mm512_extractf64x4_pd (simde__m512d a, int imm8);
+int
+test_simde_mm512_maskz_extractf64x4_pd (void)
+{
+  const struct
+  {
+    simde__mmask8 k;
+    simde__m512d a;
+    simde__m256d r0;
+    simde__m256d r1;
+  } test_vec[2] = {
+    { 21,
+      simde_mm512_set_pd (-139.11, -172.36, -268.86, 393.53, -71.72, 36.69,
+                          98.47, -135.52),
+      simde_mm256_set_pd (0.00, 36.69, 0.00, -135.52),
+      simde_mm256_set_pd (0.00, -172.36, 0.00, 393.53) },
+    { 150,
+      simde_mm512_set_pd (-556.90, 522.06, 160.98, -932.28, 391.82, 600.12,
+                          -569.99, -491.12),
+      simde_mm256_set_pd (0.00, 600.12, -569.99, 0.00),
+      simde_mm256_set_pd (0.00, 522.06, 160.98, 0.00) },
+  };
+
+  for (size_t i = 0; i < (sizeof (test_vec) / sizeof (test_vec[0])); i++)
+    {
+      simde__m256d r;
+      r = simde_mm256_maskz_mov_pd (
+          test_vec[i].k, simde_mm512_extractf64x4_pd (test_vec[i].a, 0));
+      if (simde_test_x86_assert_equal_f64x4_ (r, test_vec[i].r0))
+        {
+          return 1;
+        }
+    }
+
+  return 0;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/g++.target/s390/pr119834.C
@@ -0,0 +1,76 @@
+// PR target/119834
+// { dg-do compile { target c++11 } }
+// { dg-options "-O2 -march=z900" }
+
+int *a;
+struct A;
+struct B {
+  A begin ();
+  A end ();
+  operator bool * ();
+  void operator++ ();
+};
+template <typename T>
+auto operator| (int, T x) -> decltype (x (0));
+struct A : B { bool a; };
+struct C { A operator () (int); };
+enum D {} d;
+int e;
+void foo ();
+struct E {
+  template <typename T>
+  T *garply ()
+  {
+    if (d)
+      return 0;
+    if (e)
+      foo ();
+    return reinterpret_cast<T *> (f);
+  }
+  template <typename>
+  void bar (long x, bool)
+  {
+    if (&g - f)
+      __builtin_memset (a, 0, x);
+    f += x;
+  }
+  template <typename T>
+  T *baz (T *x, long y, bool z = true)
+  {
+    if (d)
+      return nullptr;
+    bar<T> ((char *)x + y - f, z);
+    return x;
+  }
+  template <typename T>
+  void qux (T x) { baz (x, x->j); }
+  char *f, g;
+} *h;
+struct F {
+  template <typename T>
+  int corge (T x) { x.freddy (this); return 0; }
+  template <typename T>
+  int boo (T x) { corge (x); return 0; }
+} i;
+template <typename T>
+struct G {
+  template <typename U> friend T operator+ (U, G);
+  template <typename U>
+  void waldo (F *x, G y, U z) { x->boo (z + y); }
+  template <typename... Ts>
+  void plugh (E *y, Ts... z) { T *x = y->garply<T> (); x->thud (y, z...); }
+};
+template <typename T> using H = G<T>;
+struct I {
+  static constexpr unsigned j = 2;
+  void thud (E *x, A y) { x->qux (this); for (auto g : y) ; }
+};
+H<I> k;
+struct J {
+  void freddy (F *) { C a; auto b = 0 | a; k.plugh (h, b); }
+};
+H<J> l;
+struct K {
+  void freddy () { l.waldo (&i, l, this); }
+};
+void grault () { K m; m.freddy (); }
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.c-torture/compile/pr116600.c
@@ -0,0 +1,24 @@
+/* PR rtl-optimization/116600 */
+
+int a, b;
+int foo ();
+
+int
+bar ()
+{
+  int c = ({ int d = 0, e = foo ();
+	     b = __builtin_expect (e, 1); if (b) ; else d = 4; d; });
+  if (c)
+    return c;
+  foo ();
+  if (a)
+    __asm__ goto ("" : : : : l);
+l:
+  return 0;
+}
+
+void
+baz ()
+{
+  bar ();
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.c-torture/compile/pr117358.c
@@ -0,0 +1,17 @@
+/* PR tree-optimization/117358 */
+
+char a;
+/* This attribute is bogus, snprintf isn't const.  Just verify we don't ICE on it.  */
+int __attribute__((const)) snprintf (char *, __SIZE_TYPE__, const char *, ...);
+
+long
+foo (long d) 
+{ 
+  return snprintf (&a, d, ""); 
+}
+
+int
+bar (void) 
+{ 
+  return foo (1); 
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.c-torture/compile/pr120250.c
@@ -0,0 +1,38 @@
+/* PR target/120250 */
+
+int a = 5, b = 7, c, *d;
+void *l;
+void foo (const char *s);
+void bar (void);
+void qux (const char *, int);
+
+int
+baz (int *d, int a, int b)
+{
+  int c = 0;
+  for (int i = 0; i < a; ++i)
+    for (int j = 0; j < b; ++j)
+      c += d[i * b + j];
+  return c;
+}
+
+int
+main ()
+{
+  d = __builtin_malloc (a * b * sizeof (int));
+  if (!d)
+    {
+      foo ("foo");
+      __builtin_exit (1);
+    }
+  for (int i = 0; i < a; ++i)
+    for (int j = 0; j < b; ++j)
+      d[i * b + j] = i * b + j;
+  l = (void *) &bar;
+  goto *l;
+bar:
+  c = baz (d, a, b);
+  qux ("bar", c);
+  __builtin_free (d);
+  return 0;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.c-torture/compile/pr123365.c
@@ -0,0 +1,7 @@
+/* PR c/123365 */
+
+void
+foo ()
+{
+  __asm__ volatile ("" : "+r" ((long long[]) { 0 }));
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.c-torture/compile/pr123386.c
@@ -0,0 +1,25 @@
+/* PR middle-end/123386 */
+
+char *a;
+int b;
+
+void
+foo (char *)
+{
+  if (b)
+    __builtin_abort ();
+}
+
+void
+bar (char *c)
+{
+  __asm__ goto ("" : : : : d);
+  foo (a);
+  __asm__ goto ("" : : : : d);
+  if (c)
+    bar (a);
+  __asm__ goto ("" : : : : d);
+d:
+  if (b)
+    __builtin_abort ();
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.c-torture/compile/pr123703.c
@@ -0,0 +1,10 @@
+/* PR middle-end/123703 */
+
+struct S { int a; };
+struct S abs (int);
+
+struct S
+bar (int j)
+{
+  return abs (j);
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.c-torture/compile/pr124250.c
@@ -0,0 +1,8 @@
+typedef long long v2i64 __attribute__ ((vector_size (16), aligned (16)));
+v2i64 a, b;
+
+void
+test (int l)
+{
+  a = b >> (-l);
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.c-torture/execute/pr122000.c
@@ -0,0 +1,14 @@
+/* PR target/122000 */
+
+char c = 1;
+__attribute__((aligned (sizeof (unsigned long long)))) unsigned long long ll;
+
+int
+main ()
+{
+#if defined(__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8) && __SIZEOF_LONG_LONG__ == 8 && __CHAR_BIT__ == 8
+  unsigned long long x = __sync_add_and_fetch (&ll, c + 0xfedcba9876543210ULL);
+  if (x != 0xfedcba9876543211ULL)
+    __builtin_abort ();
+#endif
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.c-torture/execute/pr122943.c
@@ -0,0 +1,130 @@
+/* PR tree-optimization/122943 */
+
+__attribute__((noipa)) unsigned char
+foo (long long val)
+{
+  unsigned char result = 0;
+  switch (val)
+    {
+    case 0: result = 1; break;
+    case 1: result = 2; break;
+    case 2: result = 3; break;
+    default: break;
+    }
+  return result;
+}
+
+__attribute__((noipa)) unsigned char
+bar (long long val)
+{
+  unsigned char result = 1;
+  switch (val)
+    {
+    case 0: result = 8; break;
+    case 1: result = 31; break;
+    case 2: result = 72; break;
+    default: break;
+    }
+  return result;
+}
+
+#ifdef __SIZEOF_INT128__
+__attribute__((noipa)) unsigned char
+baz (__int128 val)
+{
+  unsigned char result = 0;
+  switch (val)
+    {
+    case 0: result = 1; break;
+    case 1: result = 2; break;
+    case 2: result = 3; break;
+    default: break;
+    }
+  return result;
+}
+
+__attribute__((noipa)) unsigned char
+qux (__int128 val)
+{
+  unsigned char result = 1;
+  switch (val)
+    {
+    case 0: result = 8; break;
+    case 1: result = 31; break;
+    case 2: result = 72; break;
+    default: break;
+    }
+  return result;
+}
+#endif
+
+int
+main ()
+{
+  if (foo (-1) != 0)
+    __builtin_abort ();
+  if (foo (0) != 1)
+    __builtin_abort ();
+  if (foo (1) != 2)
+    __builtin_abort ();
+  if (foo (2) != 3)
+    __builtin_abort ();
+  if (foo (3) != 0)
+    __builtin_abort ();
+  if (foo (-__LONG_LONG_MAX__ - 1) != 0)
+    __builtin_abort ();
+  if (foo (-__LONG_LONG_MAX__) != 0)
+    __builtin_abort ();
+  if (foo (-__LONG_LONG_MAX__ + 1) != 0)
+    __builtin_abort ();
+  if (bar (-1) != 1)
+    __builtin_abort ();
+  if (bar (0) != 8)
+    __builtin_abort ();
+  if (bar (1) != 31)
+    __builtin_abort ();
+  if (bar (2) != 72)
+    __builtin_abort ();
+  if (bar (3) != 1)
+    __builtin_abort ();
+  if (bar (-__LONG_LONG_MAX__ - 1) != 1)
+    __builtin_abort ();
+  if (bar (-__LONG_LONG_MAX__) != 1)
+    __builtin_abort ();
+  if (bar (-__LONG_LONG_MAX__ + 1) != 1)
+    __builtin_abort ();
+#ifdef __SIZEOF_INT128__
+  if (baz (-1) != 0)
+    __builtin_abort ();
+  if (baz (0) != 1)
+    __builtin_abort ();
+  if (baz (1) != 2)
+    __builtin_abort ();
+  if (baz (2) != 3)
+    __builtin_abort ();
+  if (baz (3) != 0)
+    __builtin_abort ();
+  if (baz (((__int128) 1) << 64) != 0)
+    __builtin_abort ();
+  if (baz ((((__int128) 1) << 64) + 1) != 0)
+    __builtin_abort ();
+  if (baz ((((__int128) 1) << 64) + 2) != 0)
+    __builtin_abort ();
+  if (qux (-1) != 1)
+    __builtin_abort ();
+  if (qux (0) != 8)
+    __builtin_abort ();
+  if (qux (1) != 31)
+    __builtin_abort ();
+  if (qux (2) != 72)
+    __builtin_abort ();
+  if (qux (3) != 1)
+    __builtin_abort ();
+  if (qux (((__int128) 1) << 64) != 1)
+    __builtin_abort ();
+  if (qux ((((__int128) 1) << 64) + 1) != 1)
+    __builtin_abort ();
+  if (qux ((((__int128) 1) << 64) + 2) != 1)
+    __builtin_abort ();
+#endif
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.c-torture/execute/pr123864.c
@@ -0,0 +1,24 @@
+/* PR tree-optimization/123864 */
+
+[[gnu::noipa]] static int
+foo (long long x)
+{
+  return __builtin_mul_overflow_p (x, ~0U, x);
+}
+
+int
+main ()
+{
+  if (foo (0))
+    __builtin_abort ();
+#if __SIZEOF_INT__ == 4 && __SIZEOF_LONG_LONG__ == 8 && __CHAR_BIT__ == 8
+  if (foo (__INT_MAX__ + 1LL))
+    __builtin_abort ();
+  if (!foo (__INT_MAX__ + 2LL))
+    __builtin_abort ();
+  if (foo (-__INT_MAX__ - 1LL))
+    __builtin_abort ();
+  if (!foo (-__INT_MAX__ - 2LL))
+    __builtin_abort ();
+#endif
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.c-torture/execute/pr123978.c
@@ -0,0 +1,25 @@
+/* PR middle-end/123978 */
+
+struct A { unsigned b, c, *d; };
+
+[[gnu::noipa]] int
+foo (struct A *a)
+{
+  __builtin_memset (a->d, 0, ((long long) sizeof (unsigned)) * a->b * a->c);
+  return 0;
+}
+
+int
+main ()
+{
+  struct A a;
+  unsigned b[256];
+  __builtin_memset (b, 0x55, sizeof (b));
+  a.b = 15;
+  a.c = 15;
+  a.d = b;
+  foo (&a);
+  for (int i = 0; i < 225; ++i)
+    if (b[i] != 0)
+      __builtin_abort ();
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.c-torture/execute/pr124358.c
@@ -0,0 +1,19 @@
+/* PR tree-optimization/124358 */
+
+[[gnu::noipa]] void
+foo (int d)
+{
+  static int u = 11;
+  if (d != u++)
+    __builtin_abort ();
+}
+
+int
+main ()
+{
+  int a[1][4] = { 11, 12, 13, 14 };
+  int (*p)[4] = a;
+  for (int i = 0; i < 1; i++)
+    for (int j = 0; j < 4; j++)
+      foo (*(*(p + i) + j));
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/analyzer/ubsan-pr118300.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-fsanitize=undefined" } */
+
+#include <stdlib.h>
+
+void test ()
+{
+  int*** ptr = (int ***)malloc(sizeof(int**));
+  *ptr = (int **)malloc(sizeof(int*)); /* { dg-warning "dereference of possibly-NULL" } */
+  **ptr = (int *)malloc(sizeof(int)); /* { dg-warning "dereference of possibly-NULL" } */
+
+  free(**ptr);
+  free(*ptr);
+  free(ptr);
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/bitint-123.c
@@ -0,0 +1,26 @@
+/* PR middle-end/120547 */
+/* { dg-do run { target bitint } } */
+/* { dg-options "-O2" } */
+/* { dg-add-options float64 } */
+/* { dg-require-effective-target float64 } */
+
+#define CHECK(x, y) \
+  if ((_Float64) x != (_Float64) y				\
+      || (_Float64) (x + 1) != (_Float64) (y + 1))		\
+    __builtin_abort ()
+
+int
+main ()
+{
+  unsigned long long a = 0x20000000000001ULL << 7;
+  volatile unsigned long long b = a;
+  CHECK (a, b);
+#if __BITINT_MAXWIDTH__ >= 4096
+  unsigned _BitInt(4096) c = ((unsigned _BitInt(4096)) 0x20000000000001ULL) << 253;
+  volatile unsigned _BitInt(4096) d = c;
+  CHECK (c, d);
+  unsigned _BitInt(4096) e = ((unsigned _BitInt(4096)) 0x20000000000001ULL) << 931;
+  volatile unsigned _BitInt(4096) f = e;
+  CHECK (e, f);
+#endif
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/bitint-124.c
@@ -0,0 +1,30 @@
+/* PR tree-optimization/121131 */
+/* { dg-do run { target bitint } } */
+/* { dg-options "-O2" } */
+
+#if __BITINT_MAXWIDTH__ >= 156
+struct A { _BitInt(156) b : 135; };
+
+static inline _BitInt(156)
+foo (struct A *x)
+{
+  return x[1].b;
+}
+
+__attribute__((noipa)) _BitInt(156)
+bar (void)
+{
+  struct A a[] = { 1, 1, -13055525270329736316393717310914023773847wb,
+		   1, 1, 1, 1, 1, 1, 1, 1, 1 };
+  return foo (&a[1]);
+}
+#endif
+
+int
+main ()
+{
+#if __BITINT_MAXWIDTH__ >= 156
+  if (bar () != -13055525270329736316393717310914023773847wb)
+    __builtin_abort ();
+#endif
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/bitint-125.c
@@ -0,0 +1,15 @@
+/* PR tree-optimization/121127 */
+/* { dg-do compile { target bitint } } */
+/* { dg-options "-O2 -w" } */
+
+#if __BITINT_MAXWIDTH__ >= 576
+_BitInt(575)
+foo (void)
+{
+  _BitInt(576) d;
+  _BitInt(575) e = d * 42wb;
+  return e;
+}
+#else
+int i;
+#endif
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/bitint-126.c
@@ -0,0 +1,26 @@
+/* PR middle-end/121828 */
+/* { dg-do compile { target bitint } } */
+/* { dg-options "-std=c23 -O2" } */
+
+void baz (int);
+#if __BITINT_MAXWIDTH__ >= 255
+unsigned _BitInt(255) a;
+
+void
+foo (int x, int y)
+{
+  unsigned _BitInt(255) b;
+  int t = __builtin_sub_overflow (y, x, &b);
+  baz (t);
+  a = b;
+}
+
+void
+bar (int x, int y)
+{
+  unsigned _BitInt(255) b;
+  bool t = __builtin_sub_overflow (y, x, &b);
+  a = b;
+  baz (t);
+}
+#endif
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/bitint-127.c
@@ -0,0 +1,28 @@
+/* PR middle-end/122689 */
+/* { dg-do run { target { bitint } } } */
+/* { dg-options "-O" } */
+
+#if __BITINT_MAXWIDTH__ >= 12419
+const _BitInt(12419) n = 0xfe65f7aff85d0095103ee4d1c3b9ca50eed67abd838cdc5b53c776c8dd19b0be6eeb21aa421395fc16cf018858c9c2a03b6a013546f938e5af4c286c0456a2f5e09ad52921a4f98ce6cfbdc1beee7b860507f9fbed6640a9ce12aab6ca7e54afa6113fefe2e91a2822e9f32e04c038bb2993f25afd9489117ba43f6d1389a527c0823fd096848c9ae857fac18d08ec59b8dc73df77213ec9d0b0fba9cb38213ac625a864ffe0d4c994be6692af55bdef84699596becccc0b48d6b306bed100e78defd85477a5d7eb57af5b84e70de61141f0e725b23bd26ee239fa91a8816a3b37480f8782564bb91dfc23277303553d302a0b67dbc914fab7f54ca91548bfe66eb9daa9e524509d96e94c502b7df14acf44ef09e9c4f50ad436a504f33e51210f5c4693fdbeb3a486ce7ec50ce18939936ca91e05afc11145461832f007622d19959c4dd5f508d8d60dfc9c79b7b504e5becbc0e09cef83b9a28aadb50bd3b3d071a688455831a697d7ebaa9f64fc106e2f4eb9f8edad3b5937e157d6a3d11f6c3f8a83cc2b737b8bbde90960eec3c1d629a2af864b25c9db8edee90d99e42b9948b247cd04052465da8a647ff3a4cfaa9c5cca2b4ead7e60c6b31cfcd6a5f62fe14d3ea6a914adbd7015ea3240faf3f453e5e135067bf71d4fc625a4318afeb0ba625a42e0294ffadbf356f149775ea67b9652d45cba63210becd0b8bca390c68c2be31842354eeff63e1b49b989d4de4ee11a12c812077e0062229749fd2fb0b129a8fe319a049d45baadd7e72dabe4a5276440468e78dca8ec8a129f6ce2da1a212fcc6610f1dd9eab2258492794fa6209a4a6e889e7a907f951eafe983bdda8dedf1d56af16909ce4281904c3035a8b2d3f4f3b2395f6f153da639a0265154f7fc51a3b4bada7aa6255a40544288348c4049e8d8507eada1ea5526aadfe23385bd72b1e4c0214ee962132c692ee13868e1ea4e5c53a5ff428ecda98e82c60fa01e8ced36edaee0740e19490f0c2c9912198041d0c6af7d327d1df022f6a21f2ce65395f8b5eeff47b475056e6d6debcdee65a220bc705ac235d1e10f25a47642b09bbcbe4509ffc1e621c61f2df88d2a9575692bf1fa8456060347e05fd3b41e369caecaa979c6c3d9fadac24385e871e73c907bf3d0a8d452f85c963e5230791e68e2d8264b854745f9f227b43c8f18e6f1d4060f96a227030880c6f8e2bccda5911bedceb5d2c65640fab851345932e35db4795a41d72ea0d0b4abcdfe0bfe237bf0ae087d517c03bed58bd115cf93c28f3c04a04879e449950043928e439a08e3e6708f1b5a7b99441270793f85f77299edbe8fbc3e4956f6cce8d6babf19939900c68b0dfb5e607ecd59ba7747868ad3495e727fac4daff7d69d9b0f72bc7d73c769bbf5af2135a4832ca205a936f322307ef510992987b8f712c388e72122b0bb633dcb12325d1121657649b7813a0f3952b37156918b65eccce34d0c1219cef72e9326f12920e983a46edfd30b572593e1657194e0c41d1e1830c55ac5dfc3e63dc69d9006eba308f0c85e66da89ddf81a65e6027b3144ea9e000e5d4e6f6354c405e0a47c7be23fd94bb38e7dd2f89e886212d9d6d76dafc173268716d3dc9a4fcca6f623a1df279418b147ea79b08c9eca5c723a949047690d84b6ddaebd2b69100f74d9e4323d15bb410c7dc77a74e646a9949a44a9ab2b697eedcbf060655ded990fdf157cf4ec3d7d1b6cdb50ecc27a3558660df90c993a32fb16771e9ba5f9cddb51edaa1b4592172a0daca839e09f55cf9ea1bb2659eddf52ec2ba75ac27b5c9e82524410f3a0886921235b22ee74319719d0c5b61f0e8dbd7de6533ba8a2e3d7e19ac6bf4036515ffc88ef3b02b85d8abad0e413bd56b1b4f404fa59b73cdc02cab7bf572565767b80ff87bd2bc2772349d122951b84248d406c4e1351d869c12430dc350b51896a0968867396293c7d267514e3fc80dafe5d578b6fbbbe015720942e46be881dd6ece5f131269e326b3be18292846d96cf9dc782d9b5ae8e44549ac9d3ce89347338c2949225bbdddfcf8faeb5cdbb7582fb66eec0cdfb3b21ffe61794a07a066080d1af3d90121a09c62583512a75df831bfbd4b039568197f683d0043d350b688dbe947c92b5cedcd7a64803791bd1a2dc6e0df0b9fb6a294d728e026dc9wb;
+
+unsigned g;
+
+_BitInt(6)
+foo (unsigned a, unsigned b, unsigned c, unsigned _BitInt(256) z,
+     unsigned _BitInt(12419) y)
+{
+  y /= b;
+  unsigned _BitInt(12419) ay = a * y;
+  g -= (n >= ay ? n : ay) % c;
+  return z;
+}
+#endif
+
+int
+main ()
+{
+#if __BITINT_MAXWIDTH__ >= 12419
+  if (foo (0, 5, 5, 2, 0) != 2)
+    __builtin_abort ();
+#endif
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/complex-10.c
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-options "" } */
+
+/* PR c/105555 */
+
+struct C {
+  __complex int i;
+};
+struct C p[10];
+int *foo1(void) {
+  return &__real(p->i);
+}
+
+int *foo2(void) {
+  return &__imag(p->i);
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/dfp/bitint-10.c
@@ -0,0 +1,49 @@
+/* PR middle-end/120631 */
+/* { dg-do run { target bitint } } */
+/* { dg-options "-O2" } */
+
+#if __BITINT_MAXWIDTH__ >= 128
+_Decimal128 a = 123456789135792468012345678900000000000.0dl;
+_BitInt(128) b = 123456789135792468012345678900000000000wb;
+_Decimal64 c = 12345678913579000000000000000000000000.0dd;
+_BitInt(127) d = 12345678913579000000000000000000000000wb;
+#endif
+#if __BITINT_MAXWIDTH__ >= 256
+_Decimal128 m = 1234567891357924680123456789000000000000000000000000000000000000000000000000.0dl;
+_BitInt(256) n = 1234567891357924680123456789000000000000000000000000000000000000000000000000wb;
+_Decimal64 o = 1234567891357900000000000000000000000000000000000000000000000000000000000000.0dd;
+_BitInt(255) p = 1234567891357900000000000000000000000000000000000000000000000000000000000000wb;
+#endif
+
+int
+main ()
+{
+#if __BITINT_MAXWIDTH__ >= 128
+  if (a != b || (_BitInt(128)) a != b || c != d || (_BitInt(127)) c != d)
+    __builtin_abort ();
+  _Decimal128 e = 123456789135792468012345678900000000000.0dl;
+  _BitInt(128) f = 123456789135792468012345678900000000000wb;
+  _Decimal128 g = 123456789135792468012345678900000000000wb;
+  _BitInt(128) h = 123456789135792468012345678900000000000.0dl;
+  _Decimal64 i = 12345678913579000000000000000000000000.0dd;
+  _BitInt(128) j = 12345678913579000000000000000000000000wb;
+  _Decimal64 k = 12345678913579000000000000000000000000wb;
+  _BitInt(128) l = 12345678913579000000000000000000000000.0dd;
+  if (e != g || f != h || i != k || j != l)
+    __builtin_abort ();
+#endif
+#if __BITINT_MAXWIDTH__ >= 256
+  if (m != n || (_BitInt(256)) m != n || o != p || (_BitInt(255)) o != p)
+    __builtin_abort ();
+  _Decimal128 q = 1234567891357924680123456789000000000000000000000000000000000000000000000000.0dl;
+  _BitInt(256) r = 1234567891357924680123456789000000000000000000000000000000000000000000000000wb;
+  _Decimal128 s = 1234567891357924680123456789000000000000000000000000000000000000000000000000wb;
+  _BitInt(256) t = 1234567891357924680123456789000000000000000000000000000000000000000000000000.0dl;
+  _Decimal64 u = 1234567891357900000000000000000000000000000000000000000000000000000000000000.0dd;
+  _BitInt(255) v = 1234567891357900000000000000000000000000000000000000000000000000000000000000wb;
+  _Decimal64 w = 1234567891357900000000000000000000000000000000000000000000000000000000000000wb;
+  _BitInt(255) x = 1234567891357900000000000000000000000000000000000000000000000000000000000000.0dd;
+  if (q != s || r != t || u != w || v != x)
+    __builtin_abort ();
+#endif
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/dfp/bitint-9.c
@@ -0,0 +1,29 @@
+/* PR middle-end/120631 */
+/* { dg-do run { target bitint } } */
+/* { dg-options "-O2" } */
+
+#if __BITINT_MAXWIDTH__ >= 2048
+_Decimal128 a = 123456789135792468012345678900000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000.0dl;
+_BitInt(2048) b = 123456789135792468012345678900000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000wb;
+_Decimal64 c = 123456789135790000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000.0dd;
+_BitInt(1536) d = 123456789135790000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000wb;
+#endif
+
+int
+main ()
+{
+#if __BITINT_MAXWIDTH__ >= 2048
+  if (a != b || (_BitInt(2048)) a != b || c != d || (_BitInt(1536)) c != d)
+    __builtin_abort ();
+  _Decimal128 e = 123456789135792468012345678900000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000.0dl;
+  _BitInt(2048) f = 123456789135792468012345678900000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000wb;
+  _Decimal128 g = 123456789135792468012345678900000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000wb;
+  _BitInt(2048) h = 123456789135792468012345678900000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000.0dl;
+  _Decimal64 i = 123456789135790000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000.0dd;
+  _BitInt(1536) j = 123456789135790000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000wb;
+  _Decimal64 k = 123456789135790000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000wb;
+  _BitInt(1536) l = 123456789135790000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000.0dd;
+  if (e != g || f != h || i != k || j != l)
+    __builtin_abort ();
+#endif
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/dfp/pr120631.c
@@ -0,0 +1,25 @@
+/* PR middle-end/120631 */
+/* { dg-do run } */
+/* { dg-options "-O2" } */
+
+_Decimal64 a = 1234567891357900000.0dd;
+long long b = 1234567891357900000LL;
+_Decimal32 c = 1234567000000000000.0df;
+long long d = 1234567000000000000LL;
+
+int
+main ()
+{
+  if (a != b || (long long) a != b || c != d || (long long) c != d)
+    __builtin_abort ();
+  _Decimal64 e = 1234567891357900000.0dd;
+  long long f = 1234567891357900000LL;
+  _Decimal64 g = 1234567891357900000LL;
+  long long h = 1234567891357900000.0dd;
+  _Decimal32 i = 1234567000000000000.0df;
+  long long j = 1234567000000000000LL;
+  _Decimal32 k = 1234567000000000000LL;
+  long long l = 1234567000000000000.0df;
+  if (e != g || f != h || i != k || j != l)
+    __builtin_abort ();
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/gomp/pr121453.c
@@ -0,0 +1,18 @@
+/* PR middle-end/121453 */
+/* { dg-do compile } */
+/* { dg-options "-fopenmp -O2 -Wuninitialized" } */
+
+void bar (int, int, int);
+int v[40][40][40];
+
+void
+foo (int x, int y, int z)
+{
+  int i, j, k;
+#pragma omp parallel for simd collapse(3)
+  for (k = 1; k <= z; ++k)
+    for (j = 2; j <= y - 1; ++j)
+      for (i = 1; i <= x; ++i)
+	v[i][j][k] = 0;
+  bar (i, j, k);
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/gomp/pr123876.c
@@ -0,0 +1,69 @@
+/* PR middle-end/123876 */
+
+void
+foo ()
+{
+lab:
+#pragma omp simd
+  for (int i = 0; i < 4; i++)
+    asm goto ("" : : : : lab);			/* { dg-error "invalid branch to/from OpenMP structured block" } */
+#pragma omp for
+  for (int i = 0; i < 4; i++)
+   asm goto ("" : : : : lab);			/* { dg-error "invalid branch to/from OpenMP structured block" } */
+#pragma omp parallel
+  asm goto ("" : : : : lab);			/* { dg-error "invalid branch to/from OpenMP structured block" } */
+}
+
+void
+bar ()
+{
+lab3:
+#pragma omp simd
+  for (int i = 0; i < 4; i++)
+    {
+    lab1:
+    lab2:
+      asm goto ("" : : : : lab1, lab2, lab3);	/* { dg-error "invalid branch to/from OpenMP structured block" } */
+    }
+#pragma omp for
+  for (int i = 0; i < 4; i++)
+    {
+    lab4:
+    lab5:
+      asm goto ("" : : : : lab4, lab5, lab3);	/* { dg-error "invalid branch to/from OpenMP structured block" } */
+    }
+#pragma omp parallel
+  {
+  lab6:
+  lab7:
+    asm goto ("" : : : : lab6, lab7, lab3);	/* { dg-error "invalid branch to/from OpenMP structured block" } */
+  }
+}
+
+void
+baz ()
+{
+#pragma omp simd
+  for (int i = 0; i < 4; i++)
+    {
+    lab1:
+    lab2:
+      asm goto ("" : : : : lab1, lab2, lab3);
+    lab3:;
+    }
+#pragma omp for
+  for (int i = 0; i < 4; i++)
+    {
+    lab4:
+    lab5:
+      asm goto ("" : : : : lab4, lab5, lab6);
+    lab6:;
+    }
+#pragma omp parallel
+  {
+  lab7:
+  lab8:
+    asm goto ("" : : : : lab7, lab8, lab9);
+  lab9:;
+  }
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/lto/attr-weakref-2_0.c
@@ -0,0 +1,11 @@
+/* { dg-lto-do link } */
+/* { dg-lto-options {{-O2 -flto}} } */
+
+#define __weak __attribute__((__weak__))
+void __weak other() {}
+void __weak fn() {}
+
+int main() {
+  fn();
+  other();
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/lto/attr-weakref-2_1.c
@@ -0,0 +1,3 @@
+/* { dg-options {{-fno-lto}} } */
+
+void fn() {}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/lto/pr122515_0.c
@@ -0,0 +1,9 @@
+/* { dg-lto-do ar-link } */
+/* { dg-lto-options { { -flto=auto -ffat-lto-objects } } } */
+
+extern int bar_7 (int);
+
+int main (void)
+{
+  return bar_7 (42);
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/lto/pr122515_1.c
@@ -0,0 +1,12 @@
+typedef struct {
+  int num;
+  int foo[40000000];
+} A_1;
+
+A_1 a1_1 = {1};
+A_1 a2_1 = {2};
+
+int bar_1 (int i)
+{
+  return i++;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/lto/pr122515_2.c
@@ -0,0 +1,12 @@
+typedef struct {
+  int num;
+  int foo[40000000];
+} A_2;
+
+A_2 a1_2 = {1};
+A_2 a2_2 = {2};
+
+int bar_2 (int i)
+{
+  return i++;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/lto/pr122515_3.c
@@ -0,0 +1,12 @@
+typedef struct {
+  int num;
+  int foo[40000000];
+} A_3;
+
+A_3 a1_3 = {1};
+A_3 a2_3 = {2};
+
+int bar_3 (int i)
+{
+  return i++;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/lto/pr122515_4.c
@@ -0,0 +1,12 @@
+typedef struct {
+  int num;
+  int foo[40000000];
+} A_4;
+
+A_4 a1_4 = {1};
+A_4 a2_4 = {2};
+
+int bar_4 (int i)
+{
+  return i++;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/lto/pr122515_5.c
@@ -0,0 +1,12 @@
+typedef struct {
+  int num;
+  int foo[40000000];
+} A_5;
+
+A_5 a1_5 = {1};
+A_5 a2_5 = {2};
+
+int bar_5 (int i)
+{
+  return i++;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/lto/pr122515_6.c
@@ -0,0 +1,12 @@
+typedef struct {
+  int num;
+  int foo[40000000];
+} A_6;
+
+A_6 a1_6 = {1};
+A_6 a2_6 = {2};
+
+int bar_6 (int i)
+{
+  return i++;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/lto/pr122515_7.c
@@ -0,0 +1,12 @@
+typedef struct {
+  int num;
+  int foo[40000000];
+} A_7;
+
+A_7 a1_7 = {1};
+A_7 a2_7 = {2};
+
+int bar_7 (int i)
+{
+  return i++;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/lto/pr122515_8.c
@@ -0,0 +1,12 @@
+typedef struct {
+  int num;
+  int foo[40000000];
+} A_8;
+
+A_8 a1_8 = {1};
+A_8 a2_8 = {2};
+
+int bar_8 (int i)
+{
+  return i++;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/lto/pr122515_9.c
@@ -0,0 +1,12 @@
+typedef struct {
+  int num;
+  int foo[40000000];
+} A_9;
+
+A_9 a1_9 = {1};
+A_9 a2_9 = {2};
+
+int bar_9 (int i)
+{
+  return i++;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/pr101312-1.c
@@ -0,0 +1,4 @@
+/* PR c/101312 */
+/* { dg-do compile } */
+
+volatile int a[1] __attribute__((may_alias));
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/pr101312-2.c
@@ -0,0 +1,5 @@
+/* PR c/101312 */
+/* { dg-do compile } */
+/* { dg-options "-g" } */
+
+volatile int a[1] __attribute__((may_alias));
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/pr117239.c
@@ -0,0 +1,42 @@
+/* PR rtl-optimization/117239 */
+/* { dg-do run } */
+/* { dg-options "-fno-inline -O2" } */
+/* { dg-additional-options "-fschedule-insns" { target i?86-*-* x86_64-*-* } } */
+
+int a, b, c = 1, d;
+
+int
+foo (void)
+{
+  return a;
+}
+
+struct A {
+  int e, f, g, h;
+  short i;
+  int j;
+};
+
+void
+bar (int x, struct A y)
+{
+  if (y.j == 1)
+    c = 0;
+}
+
+int
+baz (struct A x)
+{
+  return b;
+}
+
+int
+main ()
+{
+  struct A k = { 0, 0, 0, 0, 0, 1 };
+  d = baz (k);
+  bar (foo (), k);
+  if (c != 0)
+    __builtin_abort ();
+  return 0;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/pr120480.c
@@ -0,0 +1,11 @@
+/* PR target/120480 */
+/* { dg-do compile } */
+/* { dg-options "-O0" } */
+
+struct S { int a, b, c; } s;
+
+void
+foo (void)
+{
+  struct S t = s;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/pr120638.c
@@ -0,0 +1,31 @@
+/* PR tree-optimization/120638 */
+/* { dg-do run } */
+/* { dg-options "-O2 -ffast-math" } */
+
+extern float sqrtf (float x);
+
+__attribute__((noipa)) float
+foo (unsigned int s)
+{
+  return 0.5f / sqrtf (1.f + s);
+}
+
+__attribute__((noipa)) float
+bar (float s)
+{
+  if (s < 0.0 || s > 65535.0f)
+    __builtin_unreachable ();
+  return 0.5f / sqrtf (1.f + s);
+}
+
+int
+main ()
+{
+  if (__builtin_fabsf (foo (3) - 0.25f) > 0.00390625f
+      || __builtin_fabsf (foo (15) - 0.125f) > 0.00390625f
+      || __builtin_fabsf (foo (63) - 0.0625f) > 0.00390625f
+      || __builtin_fabsf (bar (3.0f) - 0.25f) > 0.00390625f
+      || __builtin_fabsf (bar (15.0f) - 0.125f) > 0.00390625f
+      || __builtin_fabsf (bar (63.0f) - 0.0625f) > 0.00390625f)
+    __builtin_abort ();
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/pr121104.c
@@ -0,0 +1,23 @@
+/* PR tree-optimization/121104 */
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+static unsigned long
+foo (unsigned long x, unsigned long y,
+     unsigned long z, unsigned long *w)
+{
+  int r;
+  unsigned long a = __builtin_sub_overflow (x, y, &r);
+  unsigned long b = __builtin_sub_overflow (r, z, &r);
+  *w = a + b;
+  return r;
+}
+
+unsigned long
+bar (unsigned long *p, unsigned long *q)
+{
+  unsigned long c;
+  p[0] = foo (p[0], q[0], 0, &c);
+  p[1] = foo (p[1], q[1], c, &c);
+  return c;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/pr121322.c
@@ -0,0 +1,14 @@
+/* PR middle-end/121322 */
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+unsigned long long
+foo (unsigned long long *p)
+{
+  unsigned long long a = *p;
+  unsigned long long b = __builtin_bswap64 (a);
+  return ((b << 32)
+	  | ((b >> 8) & 0xff000000ULL)
+	  | ((b >> 24) & 0xff0000ULL)
+	  | ((b >> 40) & 0xff00ULL));
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/pr122126_vextr.c
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+/* { dg-additional-options "-mavx2" { target avx2 } } */
+
+#define vect16 __attribute__((vector_size(16)))
+void ub_set() {
+  volatile vect16 unsigned BS_VAR_0;
+  unsigned a = BS_VAR_0[12];
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/pr122126_vset.c
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+/* { dg-additional-options "-mavx2" { target avx2 } } */
+
+#define vect16 __attribute__((vector_size(16)))
+void ub_set() {
+  volatile vect16 unsigned BS_VAR_0;
+  BS_VAR_0[12] = 4;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/pr123018.c
@@ -0,0 +1,17 @@
+/* PR c/123018 */
+/* { dg-do compile } */
+
+struct A {
+  int x : 8 __attribute__ ((vector_size (8)));	/* { dg-error "bit-field 'x' has invalid type" } */
+};
+struct B {
+  float x : 8;					/* { dg-error "bit-field 'x' has invalid type" } */
+};
+struct C {
+  int : 8 __attribute__ ((vector_size (8)));	/* { dg-error "bit-field '\[^\n\r]*anonymous\[^\n\r]*' has invalid type" } */
+  int x;
+};
+struct D {
+  float : 8;					/* { dg-error "bit-field '\[^\n\r]*anonymous\[^\n\r]*' has invalid type" } */
+  int x;
+};
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/pr123294-1.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-O1 -fno-tree-dse -fno-tree-dce" } */
+/* PR rtl-optimization/123294 */
+
+typedef unsigned a;
+int b;
+void g(__attribute__((__vector_size__(4 * sizeof(a)))) a *);
+a d() {
+  __attribute__((__vector_size__(4 * sizeof(a)))) a e[5];
+  if (0 > b) {
+    __attribute__((__vector_size__(8 * sizeof(a)))) a f = {b, b};
+    e[0] = __builtin_shufflevector(f, f, 0, 1, 2, 3);
+  }
+  return 1;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/pr123300.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -fdump-tree-vrp1" } */
+[[gnu::noipa]] void
+bar (int a, int b)
+{
+  if (a < 0)
+    __builtin_abort ();
+}
+
+[[gnu::noipa]] void
+foo (int n, int p)
+{
+  for (int i = n; i-- > 0;)
+    {
+      const int x = 1 << i;
+      if (x <= 0)
+	__builtin_unreachable ();
+      if (p)
+	bar (i, x);
+    }
+}
+
+int
+main ()
+{
+  foo (4, 1);
+}
+/* { dg-final { scan-tree-dump "__builtin_unreachable" "vrp1" } } */
+
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/pr123431.c
@@ -0,0 +1,19 @@
+/* PR tree-optimization/123431 */
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+extern void foo (int);
+
+extern inline __attribute__((always_inline)) void
+bar (int x, ...)
+{
+  if (__builtin_constant_p (__builtin_va_arg_pack ()))
+    foo (x);
+}
+
+void
+baz (int x)
+{
+  bar (1, 2);
+  bar (3, x);
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/pr123882.c
@@ -0,0 +1,7 @@
+/* PR c/123882 */
+/* { dg-do compile } */
+/* { dg-options "-std=c23" } */
+
+typedef int T;
+void foo (unsigned long, T[]);
+void foo (unsigned long x, T[restrict x]);
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/pr124138.c
@@ -0,0 +1,20 @@
+/* PR target/124138 */
+/* { dg-do run } */
+/* { dg-options "-Wno-psabi" } */
+
+typedef __attribute__((__vector_size__ (8 * sizeof (unsigned long long)))) unsigned long long V;
+
+[[gnu::noipa]] V
+foo (V x)
+{
+  return __builtin_shuffle (x, (V) { 0, 1, 2, 5, 4, 5, 6, 7 });
+}
+
+int
+main ()
+{
+  V x = foo ((V) { 1, 2, 3, 4, 5, 6, 7, 8 });
+  if (x[0] != 1 || x[1] != 2 || x[2] != 3 || x[3] != 6
+      || x[4] != 5 || x[5] != 6 || x[6] != 7 || x[7] != 8)
+    __builtin_abort ();
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/torture/bitint-85.c
@@ -0,0 +1,34 @@
+/* { dg-do run { target bitint } } */
+/* { dg-options "-std=c23 -pedantic-errors" } */
+/* { dg-skip-if "" { ! run_expensive_tests }  { "*" } { "-O0" "-O2" } } */
+/* { dg-skip-if "" { ! run_expensive_tests } { "-flto" } { "" } } */
+
+#if __BITINT_MAXWIDTH__ >= 1024
+constexpr _BitInt(1024) d = -541140097068598424394740839221562143161511518875518765552323978870598341733206554363735813878577506997168480201818027232521wb;
+int c;
+
+static inline void
+foo (_BitInt(1024) b, _BitInt(1024) *r)
+{
+  if (c)
+    b = 0;
+  *r = b;
+}
+
+[[gnu::noipa]] void
+bar (_BitInt(1024) y)
+{
+  if (y != d)
+    __builtin_abort ();
+}
+#endif
+
+int
+main ()
+{
+#if __BITINT_MAXWIDTH__ >= 1024
+  _BitInt(1024) x;
+  foo (d, &x);
+  bar (x);
+#endif
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/torture/pr116772-1.c
@@ -0,0 +1,24 @@
+/* { dg-do run } */
+/* PR middle-end/116772  */
+/* The division by `/b` should not
+   be made uncondtional. */
+
+int mult0(int a,int b) __attribute__((noipa));
+
+int mult0(int a,int b){
+  return (b!=0 ? (a/b)*b : 0);
+}
+
+int bit_and0(int a,int b) __attribute__((noipa));
+
+int bit_and0(int a,int b){
+  return (b!=0 ? (a/b)&b : 0);
+}
+
+int main() {
+  if (mult0(3, 0) != 0)
+    __builtin_abort();
+  if (bit_and0(3, 0) != 0)
+    __builtin_abort();
+  return 0;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/torture/pr117811.c
@@ -0,0 +1,32 @@
+/* { dg-do run } */
+
+#include <string.h>
+
+typedef int v4 __attribute__((vector_size (4 * sizeof (int))));
+
+void __attribute__((noclone,noinline)) do_shift (v4 *vec, int shift)
+{
+  v4 t = *vec;
+
+  if (shift > 0)
+  {
+    t = t >> shift;
+  }
+
+  *vec = t;
+}
+
+int main ()
+{
+#if __SIZEOF_INT__ >= 4
+  v4 vec =  {0x1000000, 0x2000, 0x300, 0x40};
+  v4 vec2 = {0x100000,  0x200,  0x30,  0x4};
+#else
+  v4 vec =  {0x4000, 0x2000, 0x300, 0x40};
+  v4 vec2 = {0x400,  0x200,  0x30,  0x4};
+#endif
+  do_shift (&vec, 4);
+  if (memcmp (&vec, &vec2, sizeof (v4)) != 0)
+    __builtin_abort ();
+  return 0;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/torture/pr120654.c
@@ -0,0 +1,24 @@
+/* { dg-do compile } */
+
+int a, c, e, f, h, j;
+long g, k;
+void *malloc(long);
+void free(void *);
+int b(int m) {
+  if (m || a)
+    return 1;
+  return 0.0f;
+}
+int d(int m, int p2) { return b(m) + m + (1 + p2 + p2); }
+int i() {
+  long l[] = {2, 9, 7, 8, g, g, 9, 0, 2, g};
+  e = l[c] << 6;
+}
+void n() {
+  long o;
+  int *p = malloc(sizeof(int));
+  k = 1 % j;
+  for (; i() + f + h; o++)
+    if (p[d(j + 6, (int)k + 1992695866) + h + f + j + (int)k - 1 + o])
+      free(p);
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/torture/pr120944.c
@@ -0,0 +1,34 @@
+/* { dg-skip-if "" { *-*-* } { "-flto" } { "" } } */
+/* { dg-additional-options "-fdump-tree-optimized" } */
+
+#include <stdlib.h>
+
+typedef union {
+  int u32;
+  struct
+  {
+     int A:1;
+     int B:2;
+     int C:3;
+  };
+} u_t;
+
+typedef union {
+   volatile int u[3];
+   volatile struct {
+        u_t a;
+        int b;
+        int c;
+   };
+} DATA;
+
+void foo (volatile DATA *d)
+{
+     d->a.u32 = ~0;
+     u_t u = d->a;
+     int v = u.A;
+     if (v)
+        abort();
+}
+
+/* { dg-final { scan-tree-dump-times "if \\\(" 1 "optimized" } } */
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/torture/pr121370.c
@@ -0,0 +1,25 @@
+/* { dg-do run } */
+/* { dg-require-effective-target int32plus } */
+
+int a;
+int main()
+{
+  int c = -2147483647;
+  int d = -2147483647;
+  int e = 2147483647;
+  if (0)
+  f:
+    e = d + e - 2;
+g:
+  if (d - c - e > 0) {
+    a = -c;
+    if (a + d) {
+      d = 1;
+      goto g;
+    }
+    return 0;
+  }
+  if (e)
+    goto f;
+  return 0;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/torture/pr122188.c
@@ -0,0 +1,33 @@
+/* PR c/122188 */
+/* { dg-do run } */
+
+int
+foo (unsigned x, int y)
+{
+  unsigned a = x;
+  int b = y;
+  int ret = __builtin_ctzg (x++, y++);
+  if (x != a + 1 || y != b + 1)
+    __builtin_abort ();
+  return ret;
+}
+
+int
+bar (unsigned x, int y)
+{
+  unsigned a = x;
+  int b = y;
+  int ret = __builtin_clzg (x++, y++);
+  if (x != a + 1 || y != b + 1)
+    __builtin_abort ();
+  return ret;
+}
+
+int
+main ()
+{
+  if (foo (0, 42) != 42 || foo (1, 5) != 0 || foo (4, 17) != 2)
+    __builtin_abort ();
+  if (bar (0, 42) != 42 || bar (~0U, 5) != 0 || bar (~0U >> 4, 17) != 4)
+    __builtin_abort ();
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/torture/pr123645-1.c
@@ -0,0 +1,24 @@
+/* { dg-do run } */
+
+/* PR tree-optimization/123645 */
+/* Phi-opt was transforming f into __builtin_popcount which was incorrect. */
+
+__attribute__((noinline))
+int f(unsigned a)
+{
+  return a < 1 ? __builtin_popcount(a) : 0;
+}
+
+int main()
+{
+  if (f(1) != 0)
+    __builtin_abort();
+  if (f(0) != 0)
+    __builtin_abort();
+  if (f(2) != 0)
+    __builtin_abort();
+  if (f(3) != 0)
+    __builtin_abort();
+  if (f(-1) != 0)
+    __builtin_abort();
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/torture/pr123645-2.c
@@ -0,0 +1,24 @@
+/* { dg-do run } */
+
+/* PR tree-optimization/123645 */
+/* Phi-opt was transforming f into __builtin_bswap which was incorrect. */
+
+__attribute__((noinline))
+int f(unsigned a)
+{
+  return a < 1 ? __builtin_bswap32(a) : 0;
+}
+
+int main()
+{
+  if (f(1) != 0)
+    __builtin_abort();
+  if (f(0) != 0)
+    __builtin_abort();
+  if (f(2) != 0)
+    __builtin_abort();
+  if (f(3) != 0)
+    __builtin_abort();
+  if (f(-1) != 0)
+    __builtin_abort();
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/torture/pr123864.c
@@ -0,0 +1,28 @@
+/* PR tree-optimization/123864 */
+/* { dg-do run { target int128 } } */
+
+int u, v, x;
+
+[[gnu::noipa]] static void
+foo ()
+{
+  __int128 c = (__int128) 0xa5ee4bc88ULL << 64;
+  long long b = 0x207b8a7f7LL;
+  int a = 4;
+  long long y;
+  __builtin_add_overflow (a, v, &y);
+  c *= y;
+  
+  unsigned z;
+  if (__builtin_add_overflow (b, u, &z))
+    z = 0xffffffffU;
+  x = __builtin_mul_overflow_p (z, c, c);
+}
+
+int
+main ()
+{
+  foo ();
+  if (!x)
+    __builtin_abort ();
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/torture/pr123887.c
@@ -0,0 +1,14 @@
+/* { dg-do run } */
+
+typedef struct {
+    unsigned s;
+} struct_t;
+
+struct_t *p;
+_Bool cond;
+int v = 1;
+int main()
+{
+  int u = 1 + (cond ? p->s : 0);
+  return u - v;
+}
--- a/src/gcc/testsuite/gcc.dg/torture/vec-cvt-1.c
+++ b/src/gcc/testsuite/gcc.dg/torture/vec-cvt-1.c
@@ -55,22 +55,22 @@ flttointtest##intt (void)						\
   else									\
     {									\
       vf2 = fltmin = min - 1.0f;					\
-      for (vf = 1.0f; (fltmin = vf2 + vf) == vf2; vf = vf * 2.0f)	\
+      for (vf = 1.0f; fltmin = vf2 + vf, fltmin == vf2; vf = vf * 2.0f)	\
 	;								\
     }									\
   vf2 = fltmax = max + 1.0f;						\
-  for (vf = 1.0f; (fltmax = vf2 - vf) == vf2; vf = vf * 2.0f)		\
+  for (vf = 1.0f; fltmax = vf2 - vf, fltmax == vf2; vf = vf * 2.0f)	\
     ;									\
   if (min == 0)								\
     dblmin = 0.0;							\
   else									\
     {									\
       vd2 = dblmin = min - 1.0;						\
-      for (vd = 1.0; (dblmin = vd2 + vd) == vd2; vd = vd * 2.0)		\
+      for (vd = 1.0; dblmin = vd2 + vd, dblmin == vd2; vd = vd * 2.0)	\
 	;								\
     }									\
   vd2 = dblmax = max + 1.0;						\
-  for (vd = 1.0; (dblmax = vd2 - vd) == vd2; vd = vd * 2.0)		\
+  for (vd = 1.0; dblmax = vd2 - vd, dblmax == vd2; vd = vd * 2.0)	\
     ;									\
   for (i = 0; i < N; i++)						\
     {									\
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr117423.c
@@ -0,0 +1,49 @@
+/* { dg-do run } */
+/* { dg-options "-O1" } */
+
+struct s4 {
+    int _0;
+};
+struct s1 {
+    unsigned char _4;
+    long _1;
+};
+struct s2 {
+    union {
+        struct s3 {
+            unsigned char _1;
+            struct s4 _0;
+        } var_0;
+        struct s1 var_1;
+    } DATA;
+};
+int f1(int arg0) { return arg0 > 12345; }
+__attribute__((noinline))
+struct s4 f2(int arg0) {
+    struct s4 rv = {arg0};
+    return rv;
+}
+struct s2 f3(int arg0) {
+    struct s2 rv;
+    struct s1 var6 = {0};
+    struct s4 var7;
+    if (f1(arg0)) {
+        rv.DATA.var_1 = var6;
+        return rv;
+    } else {
+        rv.DATA.var_0._1 = 2;
+        var7 = f2(arg0);
+        rv.DATA.var_0._0 = var7;
+        return rv;
+    }
+}
+int main() {
+  if (f3(12345).DATA.var_0._0._0 == 12345)
+    ;
+  else
+    __builtin_abort();
+  if (f3(12344).DATA.var_0._0._0 == 12344)
+    ;
+  else
+    __builtin_abort();
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr119085.c
@@ -0,0 +1,37 @@
+/* { dg-do run } */
+/* { dg-options "-O1" } */
+
+struct with_hole {
+  int x;
+  long y;
+};
+struct without_hole {
+  int x;
+  int y;
+};
+union u {
+  struct with_hole with_hole;
+  struct without_hole without_hole;
+};
+
+void __attribute__((noinline))
+test (union u *up, union u u)
+{
+  union u u2;
+  volatile int f = 0;
+  u2 = u;
+  if (f)
+    u2.with_hole = u.with_hole;
+  *up = u2;
+}
+
+int main(void)
+{
+  union u u;
+  union u u2;
+  u2.without_hole.y = -1;
+  test (&u, u2);
+  if (u.without_hole.y != -1)
+    __builtin_abort ();
+  return 0;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/ubsan/pr120837.c
@@ -0,0 +1,32 @@
+/* PR c/120837 */
+/* { dg-do run } */
+/* { dg-options "-O1 -fsanitize=undefined -fno-sanitize-recover=undefined" } */
+
+[[gnu::noipa]] void
+bar (void **x, void **y)
+{
+  x[0] = 0;
+  x[1] = 0;
+  x[2] = 0;
+  y[0] = 0;
+  y[1] = 0;
+  y[2] = 0;
+  y[3] = 0;
+  y[4] = 0;
+}
+
+[[gnu::noipa]] void *
+foo (int x, int y)
+{
+  void *a[3];
+  void *b[5];
+  bar (a, b);
+  return (x > y ? b : a)[y - 1];
+}
+
+int
+main ()
+{
+  if (foo (2, 1) != 0)
+    __builtin_abort ();
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/vect/pr120817.c
@@ -0,0 +1,41 @@
+/* { dg-additional-options "-O1" } */
+/* { dg-require-effective-target aarch64_sve_hw { target aarch64*-*-* } } */
+/* { dg-additional-options "-march=armv8-a+sve -mtune=neoverse-n2" { target aarch64*-*-* } } */
+
+#include "tree-vect.h"
+
+typedef struct {
+    int _M_current;
+} __normal_iterator;
+
+typedef struct {
+    char _M_elems[5];
+} array_5;
+
+__normal_iterator __trans_tmp_1 = {-5};
+
+__attribute__((noipa))
+array_5 copySourceIntoTarget() {
+    array_5 target;
+    char* target_it = target._M_elems;
+
+    while (__trans_tmp_1._M_current != 0) {
+        *target_it = 1;
+        __trans_tmp_1._M_current++;
+        target_it++;
+    }
+
+    return target;
+}
+
+int main ()
+{
+  check_vect ();
+
+  array_5 res = copySourceIntoTarget();
+
+#pragma GCC novector
+  for (int i = 0; i < 5; i++)
+    if (res._M_elems[i] != 1)
+      __builtin_abort ();
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/vect/pr121059.c
@@ -0,0 +1,24 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-O3 --param vect-partial-vector-usage=1" } */
+/* { dg-additional-options "-march=x86-64-v4" { target avx512f } } */
+
+typedef struct {
+  long left, right, top, bottom;
+} MngBox;
+typedef struct {
+  MngBox object_clip[6];
+  char exists[256], frozen[];
+} MngReadInfo;
+MngReadInfo mng_info;
+
+long ReadMNGImage_i;
+
+void ReadMNGImage(int ReadMNGImage_i)
+{
+  for (; ReadMNGImage_i < 256; ReadMNGImage_i++)
+    if (mng_info.exists[ReadMNGImage_i] && mng_info.frozen[ReadMNGImage_i])
+      mng_info.object_clip[ReadMNGImage_i].left =
+          mng_info.object_clip[ReadMNGImage_i].right =
+              mng_info.object_clip[ReadMNGImage_i].top =
+                  mng_info.object_clip[ReadMNGImage_i].bottom = 0;
+}
--- a/src/gcc/testsuite/gcc.dg/vect/tsvc/vect-tsvc-s332.c
+++ b/src/gcc/testsuite/gcc.dg/vect/tsvc/vect-tsvc-s332.c
@@ -3,6 +3,7 @@
 
 /* { dg-additional-options "--param vect-epilogues-nomask=0" } */
 /* { dg-require-effective-target vect_float } */
+/* { dg-require-effective-target vect_early_break_hw } */
 /* { dg-add-options vect_early_break } */
 
 #include "tsvc.h"
--- a/src/gcc/testsuite/gcc.dg/vect/tsvc/vect-tsvc-s481.c
+++ b/src/gcc/testsuite/gcc.dg/vect/tsvc/vect-tsvc-s481.c
@@ -3,6 +3,7 @@
 
 /* { dg-additional-options "--param vect-epilogues-nomask=0" } */
 /* { dg-require-effective-target vect_float } */
+/* { dg-require-effective-target vect_early_break_hw } */
 /* { dg-add-options vect_early_break } */
 
 #include "tsvc.h"
--- a/src/gcc/testsuite/gcc.dg/vect/tsvc/vect-tsvc-s482.c
+++ b/src/gcc/testsuite/gcc.dg/vect/tsvc/vect-tsvc-s482.c
@@ -3,6 +3,7 @@
 
 /* { dg-additional-options "--param vect-epilogues-nomask=0" } */
 /* { dg-require-effective-target vect_float } */
+/* { dg-require-effective-target vect_early_break_hw } */
 /* { dg-add-options vect_early_break } */
 
 #include "tsvc.h"
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/vect/vect-early-break_136-pr120357.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-add-options vect_early_break } */
+/* { dg-additional-options "-O3" } */
+
+char a;
+unsigned long long t[2][22];
+int u[22];
+void f(void)
+{
+  for (int v = 0; v < 22; v++)
+    for (_Bool w = 0; w < (u[v] < 0) + 1; w = 1)
+      a *= 0 != t[w][v];
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/vect/vect-recurr-pr121256-2.c
@@ -0,0 +1,49 @@
+/* { dg-additional-options "-mavx2" { target avx2_runtime } } */
+
+#include "tree-vect.h"
+
+#define B 0
+#define G 1
+#define R 2
+
+int red = 153;
+int green = 66;
+int blue = 187;
+
+static void __attribute__((noipa))
+sub_left_prediction_bgr32(int *restrict dst, int *restrict src)
+{
+  for (int i = 0; i < 8; i++) {
+    int rt = src[i * 3 + R];
+    int gt = src[i * 3 + G];
+    int bt = src[i * 3 + B];
+
+    dst[i * 3 + R] = rt - red;
+    dst[i * 3 + G] = gt - green;
+    dst[i * 3 + B] = bt - blue;
+
+    red = rt;
+    green = gt;
+    blue = bt;
+  }
+}
+
+int main()
+{
+  int dst[8*3];
+  int src[8*3] = { 160, 73, 194, 17, 33, 99, 0, 12, 283, 87, 73, 11,
+		   9, 7, 1, 23, 19, 13, 77, 233, 97, 78, 2, 5 };
+  int dst2[8*3] = {-27, 7, 41, -143, -40, -95, -17, -21, 184, 87, 61,
+      -272, -78, -66, -10, 14, 12, 12, 54, 214, 84, 1, -231, -92};
+
+  check_vect ();
+
+  sub_left_prediction_bgr32(dst, src);
+
+#pragma GCC novector
+  for (int i = 0; i < 8*3; ++i)
+    if (dst[i] != dst2[i])
+      __builtin_abort();
+
+  return 0;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.dg/vect/vect-recurr-pr121256.c
@@ -0,0 +1,54 @@
+/* { dg-additional-options "-mavx2" { target avx2_runtime } } */
+
+#include <stddef.h>
+#include <stdint.h>
+#include <stdlib.h>
+#include "tree-vect.h"
+
+#define B 0
+#define G 1
+#define R 2
+#define A 3
+
+int red = 153;
+int green = 66;
+int blue = 187;
+int alpha = 255;
+
+static void __attribute__((noipa))
+sub_left_prediction_bgr32(uint8_t *restrict dst, uint8_t *restrict src, int w)
+{
+  for (int i = 0; i < 8; i++) {
+    int rt = src[i * 4 + R];
+    int gt = src[i * 4 + G];
+    int bt = src[i * 4 + B];
+    int at = src[i * 4 + A];
+
+    dst[i * 4 + R] = rt - red;
+    dst[i * 4 + G] = gt - green;
+    dst[i * 4 + B] = bt - blue;
+    dst[i * 4 + A] = at - alpha;
+
+    red = rt;
+    green = gt;
+    blue = bt;
+    alpha = at;
+  }
+}
+
+int main()
+{
+  check_vect ();
+
+  uint8_t *dst = calloc(36, sizeof(uint8_t));
+  uint8_t *src = calloc(36, sizeof(uint8_t));
+
+  src[R] = 160;
+  src[G] = 73;
+  src[B] = 194;
+  src[A] = 255;
+
+  sub_left_prediction_bgr32(dst, src, 33);
+  if (dst[R] != 7 || dst[B] != 7 || dst[A] != 0)
+    __builtin_abort();
+}
--- a/src/gcc/testsuite/gcc.target/aarch64/acle/rwsr-armv8p9.c
+++ b/src/gcc/testsuite/gcc.target/aarch64/acle/rwsr-armv8p9.c
@@ -74,7 +74,7 @@ readwrite_armv8p9a_sysregs ()
   a = __arm_rsr64 ("pmicfiltr_el0"); /* { { dg-final { scan-assembler "mrs\tx0, s3_3_c9_c6_0" } } */
   a = __arm_rsr64 ("pmicntr_el0"); /* { { dg-final { scan-assembler "mrs\tx0, s3_3_c9_c4_0" } } */
   a = __arm_rsr64 ("pmicntsvr_el1"); /* { { dg-final { scan-assembler "mrs\tx0, s2_0_c14_c12_0" } } */
-  a = __arm_rsr64 ("pmsdsfr_el1"); /* { { dg-final { scan-assembler "mrs\tx0, s3_4_c9_c10_4" } } */
+  a = __arm_rsr64 ("pmsdsfr_el1"); /* { { dg-final { scan-assembler "mrs\tx0, s3_0_c9_c10_4" } } */
   a = __arm_rsr64 ("pmsscr_el1"); /* { { dg-final { scan-assembler "mrs\tx0, s3_0_c9_c13_3" } } */
   a = __arm_rsr64 ("pmuacr_el1"); /* { { dg-final { scan-assembler "mrs\tx0, s3_0_c9_c14_4" } } */
   a = __arm_rsr64 ("por_el0"); /* { { dg-final { scan-assembler "mrs\tx0, s3_3_c10_c2_4" } } */
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/aarch64/dwarf-bit-stride-func.c
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+// { dg-options "-g -dA" }
+// { dg-final { scan-assembler-times "DW_AT_name: \"__SVBool_t\"" 1 } }
+// { dg-final { scan-assembler-times ".byte	0x1	// DW_AT_bit_stride" 1 } }
+// { dg-final { scan-assembler-times ".byte	0x1	// DW_AT_bit_size" 1 } }
+
+#include <arm_sve.h>
+
+__attribute__((target("arch=armv9-a+sve")))
+void fun ()
+{
+  volatile svbool_t pred8 = svwhilelt_b8_u32 (0u, 1u);
+  volatile svbool_t pred16 = svwhilelt_b16_u32 (0u, 3u);
+  volatile svbool_t pred32 = svwhilelt_b32_u32 (0u, 7u);
+  volatile svbool_t pred64 = svwhilelt_b64_u32 (0u, 11u);
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/aarch64/dwarf-bit-stride-pragma-sme.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+// { dg-options "-g -dA" }
+// { dg-final { scan-assembler-times "DW_AT_name: \"__SVBool_t\"" 2 } }
+// { dg-final { scan-assembler-times "DW_AT_name: \"__SVCount_t\"" 1 } }
+// { dg-final { scan-assembler-times ".byte	0x1	// DW_AT_bit_stride" 2 } }
+// { dg-final { scan-assembler-times ".byte	0x1	// DW_AT_bit_size" 1 } }
+
+#pragma GCC target "+sve2+sme2"
+
+void fun ()
+{
+  volatile __SVBool_t pred;
+  volatile __SVCount_t count;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/aarch64/dwarf-bit-stride-pragma.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+// { dg-options "-g -dA" }
+// { dg-final { scan-assembler-times "DW_AT_name: \"__SVBool_t\"" 1 } }
+// { dg-final { scan-assembler-times ".byte	0x1	// DW_AT_bit_stride" 1 } }
+// { dg-final { scan-assembler-times ".byte	0x1	// DW_AT_bit_size" 1 } }
+
+#include <arm_sve.h>
+
+#pragma GCC target "+sve"
+
+void fun ()
+{
+  volatile svbool_t pred8 = svwhilelt_b8_u32 (0u, 1u);
+  volatile svbool_t pred16 = svwhilelt_b16_u32 (0u, 3u);
+  volatile svbool_t pred32 = svwhilelt_b32_u32 (0u, 7u);
+  volatile svbool_t pred64 = svwhilelt_b64_u32 (0u, 11u);
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/aarch64/pch/aarch64-pch.exp
@@ -0,0 +1,52 @@
+#  Regression driver checking precompiled header compatibility of acle headers.
+#  Copyright (C) 2025 Free Software Foundation, Inc.
+#  Contributed by ARM Ltd.
+#
+#  This file is part of GCC.
+#
+#  GCC is free software; you can redistribute it and/or modify it
+#  under the terms of the GNU General Public License as published by
+#  the Free Software Foundation; either version 3, or (at your option)
+#  any later version.
+#
+#  GCC is distributed in the hope that it will be useful, but
+#  WITHOUT ANY WARRANTY; without even the implied warranty of
+#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+#  General Public License for more details.
+#
+#  You should have received a copy of the GNU General Public License
+#  along with GCC; see the file COPYING3.  If not see
+#  <http://www.gnu.org/licenses/>.  */
+
+# GCC testsuite checking acle headers can be included in precompiled headers
+# that uses the `dg.exp' driver.
+
+# Exit immediately if this isn't an AArch64 target.
+if {![istarget aarch64*-*-*] } then {
+  return
+}
+
+# Load support procs.
+load_lib gcc-dg.exp
+load_lib dg-pch.exp
+load_lib torture-options.exp
+
+# Initialize `dg'.
+dg-init
+torture-init
+set-torture-options $DG_TORTURE_OPTIONS
+pch-init
+
+set arch_flags "-march=armv8.5-a+sve2+sme"
+set old_dg_do_what_default "${dg-do-what-default}"
+# Main loop.
+foreach test [lsort [glob -nocomplain $srcdir/$subdir/*.c]] {
+  global torture_without_loops
+  dg-flags-pch $subdir $test $arch_flags \
+  	[concat [list {-O0 -g}] $torture_without_loops] ".h"
+}
+
+# All done.
+pch-finish
+torture-finish
+dg-finish
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/aarch64/pch/pch_arm_acle.c
@@ -0,0 +1,6 @@
+#include "pch_arm_acle.h"
+
+uint32_t ror(uint32_t a, uint32_t b)
+{
+  return __ror(a, b);
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/aarch64/pch/pch_arm_acle.hs
@@ -0,0 +1,2 @@
+#pragma once
+#include <arm_acle.h>
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/aarch64/pch/pch_arm_acle_include_post.c
@@ -0,0 +1,7 @@
+#include "pch_arm_acle_include_post.h"
+#include <arm_acle.h>
+
+uint32_t ror(uint32_t a, uint32_t b)
+{
+  return __ror(a, b);
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/aarch64/pch/pch_arm_acle_include_post.hs
@@ -0,0 +1,2 @@
+#pragma once
+#include <arm_acle.h>
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/aarch64/pch/pch_arm_multiple.c
@@ -0,0 +1,6 @@
+#include "pch_arm_multiple.h"
+
+svint32_t add_vectors(svint32_t a, svint32_t b)
+{
+  return svadd_s32_z(svptrue_b32(), a, b);
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/aarch64/pch/pch_arm_multiple.hs
@@ -0,0 +1,6 @@
+#pragma once
+#include <arm_sme.h>
+#include <arm_sve.h>
+#include <arm_neon_sve_bridge.h>
+#include <arm_neon.h>
+#include <arm_acle.h>
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/aarch64/pch/pch_arm_multiple_include_post.c
@@ -0,0 +1,11 @@
+#include "pch_arm_multiple_include_post.h"
+#include <arm_sme.h>
+#include <arm_sve.h>
+#include <arm_neon_sve_bridge.h>
+#include <arm_neon.h>
+#include <arm_acle.h>
+
+svint32_t add_vectors(svint32_t a, svint32_t b)
+{
+  return svadd_s32_z(svptrue_b32(), a, b);
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/aarch64/pch/pch_arm_multiple_include_post.hs
@@ -0,0 +1,6 @@
+#pragma once
+#include <arm_sme.h>
+#include <arm_sve.h>
+#include <arm_neon_sve_bridge.h>
+#include <arm_neon.h>
+#include <arm_acle.h>
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/aarch64/pch/pch_arm_neon.c
@@ -0,0 +1,6 @@
+#include "pch_arm_neon.h"
+
+uint32x4_t add_vectors(uint32x4_t a, uint32x4_t b)
+{
+  return vaddq_u32(a, b);
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/aarch64/pch/pch_arm_neon.hs
@@ -0,0 +1,2 @@
+#pragma once
+#include <arm_neon.h>
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/aarch64/pch/pch_arm_neon_include_post.c
@@ -0,0 +1,7 @@
+#include "pch_arm_neon_include_post.h"
+#include "arm_neon.h"
+
+uint32x4_t add_vectors(uint32x4_t a, uint32x4_t b)
+{
+  return vaddq_u32(a, b);
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/aarch64/pch/pch_arm_neon_include_post.hs
@@ -0,0 +1,2 @@
+#pragma once
+#include <arm_neon.h>
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/aarch64/pch/pch_arm_neon_sve_bridge.c
@@ -0,0 +1,6 @@
+#include "pch_arm_neon_sve_bridge.h"
+
+svint8_t set(svint8_t a, int8x16_t b)
+{
+  return svset_neonq(a, b);
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/aarch64/pch/pch_arm_neon_sve_bridge.hs
@@ -0,0 +1,2 @@
+#pragma once
+#include <arm_neon_sve_bridge.h>
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/aarch64/pch/pch_arm_neon_sve_bridge_include_post.c
@@ -0,0 +1,7 @@
+#include "pch_arm_neon_sve_bridge_include_post.h"
+#include <arm_neon_sve_bridge.h>
+
+svint8_t set(svint8_t a, int8x16_t b)
+{
+  return svset_neonq(a, b);
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/aarch64/pch/pch_arm_neon_sve_bridge_include_post.hs
@@ -0,0 +1,2 @@
+#pragma once
+#include <arm_neon_sve_bridge.h>
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/aarch64/pch/pch_arm_sme.c
@@ -0,0 +1,6 @@
+#include "pch_arm_sme.h"
+
+void st(svbool_t pg, void *ptr, uint32_t slice_base) 
+  __arm_streaming __arm_inout("za"){
+  svst1_hor_za8(0, slice_base, pg, ptr);
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/aarch64/pch/pch_arm_sme.hs
@@ -0,0 +1,2 @@
+#pragma once
+#include <arm_sme.h>
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/aarch64/pch/pch_arm_sme_include_post.c
@@ -0,0 +1,7 @@
+#include "pch_arm_sme_include_post.h"
+#include <arm_sme.h>
+
+void st(svbool_t pg, void *ptr, uint32_t slice_base) 
+  __arm_streaming __arm_inout("za"){
+  svst1_hor_za8(0, slice_base, pg, ptr);
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/aarch64/pch/pch_arm_sme_include_post.hs
@@ -0,0 +1,2 @@
+#pragma once
+#include <arm_sme.h>
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/aarch64/pch/pch_arm_sve.c
@@ -0,0 +1,6 @@
+#include "pch_arm_sve.h"
+
+svint32_t add_vectors(svint32_t a, svint32_t b)
+{
+  return svadd_s32_z(svptrue_b32(), a, b);
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/aarch64/pch/pch_arm_sve.hs
@@ -0,0 +1,2 @@
+#pragma once
+#include <arm_sve.h>
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/aarch64/pch/pch_arm_sve_include_post.c
@@ -0,0 +1,7 @@
+#include "pch_arm_sve_include_post.h"
+#include "arm_sve.h"
+
+svint32_t add_vectors(svint32_t a, svint32_t b)
+{
+  return svadd_s32_z(svptrue_b32(), a, b);
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/aarch64/pch/pch_arm_sve_include_post.hs
@@ -0,0 +1,2 @@
+#pragma once
+#include <arm_sve.h>
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/aarch64/pr121253.c
@@ -0,0 +1,16 @@
+/* { dg-options "-O" } */
+
+struct s128 {
+    long a, b;
+};
+
+struct s128 foo(void) {
+    struct s128 ret;
+    asm("mov %0, #0 \n\t"
+        "mov %R0, #0 \n\t"
+        "mov x0, #12345"
+        : "=r" (ret) : : "x0");
+    return ret;
+}
+
+/* { dg-final { scan-assembler-not {mov x0, #0} } } */
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/aarch64/pr123285-1.c
@@ -0,0 +1,36 @@
+/* { dg-do run } */
+/* { dg-options "-O3" } */
+/* PR target/123285 */
+
+#define BS_VEC(type, num) type __attribute__((vector_size(num * sizeof(type))))
+
+/* f used to allocate v30 to either a or b and the inline-asm
+   would clobber the v30. */
+[[gnu::noipa]]
+BS_VEC(int, 8) f(BS_VEC(int, 8) a, BS_VEC(int, 8) b)
+{
+  a+=b;
+  asm("movi v30.16b, 0":::"v30");
+  a+=b;
+  return a;
+}
+[[gnu::noipa]]
+BS_VEC(int, 8) f1(BS_VEC(int, 8) a, BS_VEC(int, 8) b)
+{
+  a+=b;
+  a+=b;
+  return a;
+}
+
+int main()
+{
+  BS_VEC(int, 8) a = {0,1,2,3,4,5,6,7};
+  BS_VEC(int, 8) b = {8,9,10,11,12,13,14};
+  BS_VEC(int, 8) c0 = f(a,b);
+  BS_VEC(int, 8) c1 = f1(a,b);
+  for(int i=0;i<8;i++)
+  if ( c0[i] != c1[i] )
+    __builtin_abort ();
+}
+
+
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/aarch64/pr123294-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-O1" } */
+/* PR rtl-optimization/123294 */
+
+#include <arm_neon.h>
+
+typedef unsigned a;
+int b;
+a d() {
+  __attribute__((__vector_size__(4 * sizeof(a)))) a e[5];
+  if (0 > b) {
+    __attribute__((__vector_size__(8 * sizeof(a)))) a f = {b, b};
+    e[0] = __builtin_shufflevector(f, f, 0, 1, 2, 3);
+  }
+  while (vqadd_u64((uint64x1_t){3}, (uint64x1_t){0})[0])
+    ;
+  return e[0][3];
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/aarch64/pr123548.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-O0" } */
+/* { dg-final { check-function-bodies "**" "" "" } } */
+
+#include <arm_acle.h>
+
+void
+test (void *a)
+{
+  __pldx (1, 1, 1, a);
+}
+/*
+** test:
+**...
+**	prfm\tPSTL2STRM, \[x[0-9]+\]
+**...
+**	ret
+*/
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/aarch64/simd/pr121749.c
@@ -0,0 +1,11 @@
+/* { dg-do assemble } */
+/* { dg-options "-O2" } */
+
+#include <arm_neon.h>
+
+uint32_t
+foo (uint64_t v0)
+{
+  return vqshrnd_n_u64 (vshrd_n_u64 (v0, 26), 7);
+}
+
--- a/src/gcc/testsuite/gcc.target/aarch64/sme/call_sm_switch_1.c
+++ b/src/gcc/testsuite/gcc.target/aarch64/sme/call_sm_switch_1.c
@@ -1,5 +1,5 @@
 // { dg-options "-O -fomit-frame-pointer -fno-optimize-sibling-calls -funwind-tables" }
-// { dg-final { check-function-bodies "**" "" } }
+// { dg-final { check-function-bodies "**" "" "" { target "*-*-*" } {\t\.inst} } }
 
 void ns_callee ();
  void s_callee () [[arm::streaming]];
@@ -218,7 +218,7 @@ sc_caller_x1 (int *ptr, int a) [[arm::streaming_compatible]]
 **	bl	ns_callee_stack
 **	ldr	x16, \[x29, #?16\]
 **	tbz	x16, 0, .*
-**	smstart	sm
+**	.inst 0xd503437f // smstart sm
 **	...
 */
 void
--- a/src/gcc/testsuite/gcc.target/aarch64/sme/call_sm_switch_11.c
+++ b/src/gcc/testsuite/gcc.target/aarch64/sme/call_sm_switch_11.c
@@ -1,5 +1,6 @@
 // { dg-options "-O -fomit-frame-pointer -fno-optimize-sibling-calls -funwind-tables -mtrack-speculation" }
-// { dg-final { check-function-bodies "**" "" } }
+// { dg-final { check-function-bodies "**" "" "" { target "*-*-*" } {\t\.inst} } }
+
 
 void ns_callee ();
  void s_callee () [[arm::streaming]];
@@ -196,7 +197,7 @@ sc_caller_x1 (int *ptr, int a) [[arm::streaming_compatible]]
 **	tst	x16, #?1
 **	beq	[^\n]*
 **	csel	x15, x15, xzr, ne
-**	smstart	sm
+**	.inst 0xd503437f // smstart sm
 **	...
 */
 void
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/aarch64/sme/pr121028.c
@@ -0,0 +1,46 @@
+// PR121028
+// { dg-do assemble { target aarch64_asm_sme_ok } }
+// { dg-options "-O --save-temps" }
+// { dg-final { check-function-bodies "**" "" "" { target "*-*-*" } {\t\.inst} } }
+
+void ns_callee ();
+
+/*
+** sc_caller_sme:
+**	...
+**	mrs	x16, svcr
+**	str	x16, \[x29, #?16\]
+**	ldr	x16, \[x29, #?16\]
+**	tbz	x16, 0, .*
+**	smstop	sm
+**	bl	ns_callee
+**	ldr	x16, \[x29, #?16\]
+**	tbz	x16, 0, .*
+**	smstart	sm
+**	...
+*/
+void sc_caller_sme() __arm_streaming_compatible
+{
+    ns_callee ();
+}
+
+#pragma GCC target "+nosme"
+
+/*
+** sc_caller_nosme:
+**	...
+**	bl	__arm_sme_state
+**	str	x0, \[x29, #?16\]
+**	ldr	x16, \[x29, #?16\]
+**	tbz	x16, 0, .*
+**	.inst 0xd503427f // smstop sm
+**	bl	ns_callee
+**	ldr	x16, \[x29, #?16\]
+**	tbz	x16, 0, .*
+**	.inst 0xd503437f // smstart sm
+**	...
+*/
+void sc_caller_nosme() __arm_streaming_compatible
+{
+    ns_callee ();
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/aarch64/sme/pr121414_1.c
@@ -0,0 +1,27 @@
+#pragma GCC target "+sme2"
+
+void f1() __arm_streaming_compatible {}
+void f2() __arm_streaming {}
+void f3() __arm_in("za") {}
+void f4() __arm_out("za") {}
+void f5() __arm_inout("za") {}
+void f6() __arm_in("zt0") {}
+void f7() __arm_out("zt0") {}
+void f8() __arm_inout("zt0") {}
+
+__arm_locally_streaming void g1() {}
+__arm_new("za") void g2() {}
+__arm_new("zt0") void g3() {}
+
+/* { dg-final { scan-assembler {\t\.variant_pcs\tf1\n} } } */
+/* { dg-final { scan-assembler {\t\.variant_pcs\tf2\n} } } */
+/* { dg-final { scan-assembler {\t\.variant_pcs\tf3\n} } } */
+/* { dg-final { scan-assembler {\t\.variant_pcs\tf4\n} } } */
+/* { dg-final { scan-assembler {\t\.variant_pcs\tf5\n} } } */
+/* { dg-final { scan-assembler {\t\.variant_pcs\tf6\n} } } */
+/* { dg-final { scan-assembler {\t\.variant_pcs\tf7\n} } } */
+/* { dg-final { scan-assembler {\t\.variant_pcs\tf8\n} } } */
+
+/* { dg-final { scan-assembler-not {\t\.variant_pcs\tg1\n} } } */
+/* { dg-final { scan-assembler-not {\t\.variant_pcs\tg2\n} } } */
+/* { dg-final { scan-assembler-not {\t\.variant_pcs\tg3\n} } } */
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/aarch64/sme/sme-shrinkwrap.c
@@ -0,0 +1,78 @@
+/* { dg-options "-O3 -fshrink-wrap" } */
+/* { dg-do run { target { aarch64_sme_hw && aarch64_sve_hw } } } */
+/* { dg-do compile { target { ! { aarch64_sme_hw && aarch64_sve_hw } } } } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include <arm_sme.h>
+
+#pragma GCC target "+sve"
+
+[[gnu::noipa]]
+__arm_streaming
+int callee (int x)
+{
+  return 0;
+}
+
+/*
+** foo:
+**	cbnz	w0, [^\n]*
+**	cntd	x0
+**	ret
+**	...
+*/
+__arm_streaming
+int foo(int x)
+{
+    if (x)
+        return callee(3);
+    return svcntd();
+}
+
+/*
+** bar:
+**	...
+**	smstart	[^\n]*
+**	...
+** (
+**	cntd	[^\n]*
+**	...
+**	cbn?z	[^\n]*
+** |
+**	cbn?z	[^\n]*
+**	...
+**	cntd	[^\n]*
+** )
+**	...
+*/
+
+__arm_locally_streaming
+int bar(int x)
+{
+    if (x)
+        return callee(3);
+    return svcntd();
+}
+
+/*
+** baz:
+**	cbnz	w0, [^\n]*
+**	cntd	x0
+**	ret
+**	...
+*/
+__arm_streaming
+int baz(int x)
+{
+    if (x)
+        return callee(3);
+    return svcntd();
+}
+
+[[gnu::noipa]]
+int main()
+{
+  if (bar(0) != svcntsd())
+    __builtin_abort();
+  return 0;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/aarch64/sme/za_state_7.c
@@ -0,0 +1,21 @@
+// { dg-options "-O -fno-optimize-sibling-calls -fomit-frame-pointer" }
+
+#include <arm_sme.h>
+
+void callee();
+
+__arm_new("za") __arm_locally_streaming int test()
+{
+  svbool_t all = svptrue_b8();
+  svint8_t expected = svindex_s8(1, 1);
+  svwrite_hor_za8_m(0, 0, all, expected);
+
+  callee();
+
+  svint8_t actual = svread_hor_za8_m(svdup_s8(0), all, 0, 0);
+  return svptest_any(all, svcmpne(all, expected, actual));
+}
+
+// { dg-final { scan-assembler {\tbl\t__arm_tpidr2_save\n} } }
+// { dg-final { scan-assembler {\tbl\t__arm_tpidr2_restore\n} } }
+// { dg-final { scan-assembler-times {\tsmstart\tza\n} 2 } }
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/aarch64/sve/acle/general/perm_1.c
@@ -0,0 +1,14 @@
+/* { dg-options "-O2 -msve-vector-bits=256" } */
+
+#include <arm_sve.h>
+typedef svbfloat16_t vls_bfloat16_t __attribute__((arm_sve_vector_bits(32 * 8)));
+svbfloat16_t foo(vls_bfloat16_t a, vls_bfloat16_t b)
+{
+  svbfloat16_t zero = svreinterpret_bf16_f32 (svdup_n_f32 (0.0f));
+  return svzip2_bf16(zero, svuzp1_bf16(a,b));
+}
+
+
+/* { dg-final { scan-assembler-times {\tuzp1\t} 1 } } */
+/* { dg-final { scan-assembler-times {\tzip2\t} 1 } } */
+/* { dg-final { scan-assembler-not {\ttbl\t} } } */
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/aarch64/sve/acle/general/perm_2.c
@@ -0,0 +1,96 @@
+/* { dg-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include <arm_sve.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+** test1:
+**	...
+**	ptrue	(p[0-3])\.h, all
+**	...
+**	trn1	p0\.h, p[0-3]\.h, \1\.h
+**	ret
+*/
+svbool_t
+test1 ()
+{
+  return svtrn1_b16 (svptrue_b8 (), svptrue_b16 ());
+}
+
+/*
+** test2:
+**	...
+**	ptrue	(p[0-3])\.h, all
+**	...
+**	trn1	p0\.h, \1\.h, p[0-3]\.h
+**	ret
+*/
+svbool_t
+test2 ()
+{
+  return svtrn1_b16 (svptrue_b16 (), svptrue_b8 ());
+}
+
+/*
+** test3:
+**	...
+**	ptrue	(p[0-3])\.s, all
+**	...
+**	trn1	p0\.s, p[0-3]\.s, \1\.s
+**	ret
+*/
+svbool_t
+test3 ()
+{
+  return svtrn1_b32 (svptrue_b8 (), svptrue_b32 ());
+}
+
+/*
+** test4:
+**	...
+**	ptrue	(p[0-3])\.s, all
+**	...
+**	trn1	p0\.s, \1\.s, p[0-3]\.s
+**	ret
+*/
+svbool_t
+test4 ()
+{
+  return svtrn1_b32 (svptrue_b32 (), svptrue_b8 ());
+}
+
+/*
+** test5:
+**	...
+**	ptrue	(p[0-3])\.d, all
+**	...
+**	trn1	p0\.d, p[0-3]\.d, \1\.d
+**	ret
+*/
+svbool_t
+test5 ()
+{
+  return svtrn1_b64 (svptrue_b8 (), svptrue_b64 ());
+}
+
+/*
+** test6:
+**	...
+**	ptrue	(p[0-3])\.d, all
+**	...
+**	trn1	p0\.d, \1\.d, p[0-3]\.d
+**	ret
+*/
+svbool_t
+test6 ()
+{
+  return svtrn1_b64 (svptrue_b64 (), svptrue_b8 ());
+}
+
+#ifdef __cplusplus
+}
+#endif
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/aarch64/sve/acle/general/perm_3.c
@@ -0,0 +1,96 @@
+/* { dg-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include <arm_sve.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+** test1:
+**	...
+**	ptrue	(p[0-3])\.h, all
+**	...
+**	trn2	p0\.h, p[0-3]\.h, \1\.h
+**	ret
+*/
+svbool_t
+test1 ()
+{
+  return svtrn2_b16 (svptrue_b8 (), svptrue_b16 ());
+}
+
+/*
+** test2:
+**	...
+**	ptrue	(p[0-3])\.h, all
+**	...
+**	trn2	p0\.h, \1\.h, p[0-3]\.h
+**	ret
+*/
+svbool_t
+test2 ()
+{
+  return svtrn2_b16 (svptrue_b16 (), svptrue_b8 ());
+}
+
+/*
+** test3:
+**	...
+**	ptrue	(p[0-3])\.s, all
+**	...
+**	trn2	p0\.s, p[0-3]\.s, \1\.s
+**	ret
+*/
+svbool_t
+test3 ()
+{
+  return svtrn2_b32 (svptrue_b8 (), svptrue_b32 ());
+}
+
+/*
+** test4:
+**	...
+**	ptrue	(p[0-3])\.s, all
+**	...
+**	trn2	p0\.s, \1\.s, p[0-3]\.s
+**	ret
+*/
+svbool_t
+test4 ()
+{
+  return svtrn2_b32 (svptrue_b32 (), svptrue_b8 ());
+}
+
+/*
+** test5:
+**	...
+**	ptrue	(p[0-3])\.d, all
+**	...
+**	trn2	p0\.d, p[0-3]\.d, \1\.d
+**	ret
+*/
+svbool_t
+test5 ()
+{
+  return svtrn2_b64 (svptrue_b8 (), svptrue_b64 ());
+}
+
+/*
+** test6:
+**	...
+**	ptrue	(p[0-3])\.d, all
+**	...
+**	trn2	p0\.d, \1\.d, p[0-3]\.d
+**	ret
+*/
+svbool_t
+test6 ()
+{
+  return svtrn2_b64 (svptrue_b64 (), svptrue_b8 ());
+}
+
+#ifdef __cplusplus
+}
+#endif
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/aarch64/sve/acle/general/perm_4.c
@@ -0,0 +1,96 @@
+/* { dg-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include <arm_sve.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+** test1:
+**	...
+**	ptrue	(p[0-3])\.h, all
+**	...
+**	zip1	p0\.h, p[0-3]\.h, \1\.h
+**	ret
+*/
+svbool_t
+test1 ()
+{
+  return svzip1_b16 (svptrue_b8 (), svptrue_b16 ());
+}
+
+/*
+** test2:
+**	...
+**	ptrue	(p[0-3])\.h, all
+**	...
+**	zip1	p0\.h, \1\.h, p[0-3]\.h
+**	ret
+*/
+svbool_t
+test2 ()
+{
+  return svzip1_b16 (svptrue_b16 (), svptrue_b8 ());
+}
+
+/*
+** test3:
+**	...
+**	ptrue	(p[0-3])\.s, all
+**	...
+**	zip1	p0\.s, p[0-3]\.s, \1\.s
+**	ret
+*/
+svbool_t
+test3 ()
+{
+  return svzip1_b32 (svptrue_b8 (), svptrue_b32 ());
+}
+
+/*
+** test4:
+**	...
+**	ptrue	(p[0-3])\.s, all
+**	...
+**	zip1	p0\.s, \1\.s, p[0-3]\.s
+**	ret
+*/
+svbool_t
+test4 ()
+{
+  return svzip1_b32 (svptrue_b32 (), svptrue_b8 ());
+}
+
+/*
+** test5:
+**	...
+**	ptrue	(p[0-3])\.d, all
+**	...
+**	zip1	p0\.d, p[0-3]\.d, \1\.d
+**	ret
+*/
+svbool_t
+test5 ()
+{
+  return svzip1_b64 (svptrue_b8 (), svptrue_b64 ());
+}
+
+/*
+** test6:
+**	...
+**	ptrue	(p[0-3])\.d, all
+**	...
+**	zip1	p0\.d, \1\.d, p[0-3]\.d
+**	ret
+*/
+svbool_t
+test6 ()
+{
+  return svzip1_b64 (svptrue_b64 (), svptrue_b8 ());
+}
+
+#ifdef __cplusplus
+}
+#endif
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/aarch64/sve/acle/general/perm_5.c
@@ -0,0 +1,96 @@
+/* { dg-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include <arm_sve.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+** test1:
+**	...
+**	ptrue	(p[0-3])\.h, all
+**	...
+**	zip2	p0\.h, p[0-3]\.h, \1\.h
+**	ret
+*/
+svbool_t
+test1 ()
+{
+  return svzip2_b16 (svptrue_b8 (), svptrue_b16 ());
+}
+
+/*
+** test2:
+**	...
+**	ptrue	(p[0-3])\.h, all
+**	...
+**	zip2	p0\.h, \1\.h, p[0-3]\.h
+**	ret
+*/
+svbool_t
+test2 ()
+{
+  return svzip2_b16 (svptrue_b16 (), svptrue_b8 ());
+}
+
+/*
+** test3:
+**	...
+**	ptrue	(p[0-3])\.s, all
+**	...
+**	zip2	p0\.s, p[0-3]\.s, \1\.s
+**	ret
+*/
+svbool_t
+test3 ()
+{
+  return svzip2_b32 (svptrue_b8 (), svptrue_b32 ());
+}
+
+/*
+** test4:
+**	...
+**	ptrue	(p[0-3])\.s, all
+**	...
+**	zip2	p0\.s, \1\.s, p[0-3]\.s
+**	ret
+*/
+svbool_t
+test4 ()
+{
+  return svzip2_b32 (svptrue_b32 (), svptrue_b8 ());
+}
+
+/*
+** test5:
+**	...
+**	ptrue	(p[0-3])\.d, all
+**	...
+**	zip2	p0\.d, p[0-3]\.d, \1\.d
+**	ret
+*/
+svbool_t
+test5 ()
+{
+  return svzip2_b64 (svptrue_b8 (), svptrue_b64 ());
+}
+
+/*
+** test6:
+**	...
+**	ptrue	(p[0-3])\.d, all
+**	...
+**	zip2	p0\.d, \1\.d, p[0-3]\.d
+**	ret
+*/
+svbool_t
+test6 ()
+{
+  return svzip2_b64 (svptrue_b64 (), svptrue_b8 ());
+}
+
+#ifdef __cplusplus
+}
+#endif
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/aarch64/sve/acle/general/perm_6.c
@@ -0,0 +1,96 @@
+/* { dg-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include <arm_sve.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+** test1:
+**	...
+**	ptrue	(p[0-3])\.h, all
+**	...
+**	uzp1	p0\.h, p[0-3]\.h, \1\.h
+**	ret
+*/
+svbool_t
+test1 ()
+{
+  return svuzp1_b16 (svptrue_b8 (), svptrue_b16 ());
+}
+
+/*
+** test2:
+**	...
+**	ptrue	(p[0-3])\.h, all
+**	...
+**	uzp1	p0\.h, \1\.h, p[0-3]\.h
+**	ret
+*/
+svbool_t
+test2 ()
+{
+  return svuzp1_b16 (svptrue_b16 (), svptrue_b8 ());
+}
+
+/*
+** test3:
+**	...
+**	ptrue	(p[0-3])\.s, all
+**	...
+**	uzp1	p0\.s, p[0-3]\.s, \1\.s
+**	ret
+*/
+svbool_t
+test3 ()
+{
+  return svuzp1_b32 (svptrue_b8 (), svptrue_b32 ());
+}
+
+/*
+** test4:
+**	...
+**	ptrue	(p[0-3])\.s, all
+**	...
+**	uzp1	p0\.s, \1\.s, p[0-3]\.s
+**	ret
+*/
+svbool_t
+test4 ()
+{
+  return svuzp1_b32 (svptrue_b32 (), svptrue_b8 ());
+}
+
+/*
+** test5:
+**	...
+**	ptrue	(p[0-3])\.d, all
+**	...
+**	uzp1	p0\.d, p[0-3]\.d, \1\.d
+**	ret
+*/
+svbool_t
+test5 ()
+{
+  return svuzp1_b64 (svptrue_b8 (), svptrue_b64 ());
+}
+
+/*
+** test6:
+**	...
+**	ptrue	(p[0-3])\.d, all
+**	...
+**	uzp1	p0\.d, \1\.d, p[0-3]\.d
+**	ret
+*/
+svbool_t
+test6 ()
+{
+  return svuzp1_b64 (svptrue_b64 (), svptrue_b8 ());
+}
+
+#ifdef __cplusplus
+}
+#endif
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/aarch64/sve/acle/general/perm_7.c
@@ -0,0 +1,96 @@
+/* { dg-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include <arm_sve.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+** test1:
+**	...
+**	ptrue	(p[0-3])\.h, all
+**	...
+**	uzp2	p0\.h, p[0-3]\.h, \1\.h
+**	ret
+*/
+svbool_t
+test1 ()
+{
+  return svuzp2_b16 (svptrue_b8 (), svptrue_b16 ());
+}
+
+/*
+** test2:
+**	...
+**	ptrue	(p[0-3])\.h, all
+**	...
+**	uzp2	p0\.h, \1\.h, p[0-3]\.h
+**	ret
+*/
+svbool_t
+test2 ()
+{
+  return svuzp2_b16 (svptrue_b16 (), svptrue_b8 ());
+}
+
+/*
+** test3:
+**	...
+**	ptrue	(p[0-3])\.s, all
+**	...
+**	uzp2	p0\.s, p[0-3]\.s, \1\.s
+**	ret
+*/
+svbool_t
+test3 ()
+{
+  return svuzp2_b32 (svptrue_b8 (), svptrue_b32 ());
+}
+
+/*
+** test4:
+**	...
+**	ptrue	(p[0-3])\.s, all
+**	...
+**	uzp2	p0\.s, \1\.s, p[0-3]\.s
+**	ret
+*/
+svbool_t
+test4 ()
+{
+  return svuzp2_b32 (svptrue_b32 (), svptrue_b8 ());
+}
+
+/*
+** test5:
+**	...
+**	ptrue	(p[0-3])\.d, all
+**	...
+**	uzp2	p0\.d, p[0-3]\.d, \1\.d
+**	ret
+*/
+svbool_t
+test5 ()
+{
+  return svuzp2_b64 (svptrue_b8 (), svptrue_b64 ());
+}
+
+/*
+** test6:
+**	...
+**	ptrue	(p[0-3])\.d, all
+**	...
+**	uzp2	p0\.d, \1\.d, p[0-3]\.d
+**	ret
+*/
+svbool_t
+test6 ()
+{
+  return svuzp2_b64 (svptrue_b64 (), svptrue_b8 ());
+}
+
+#ifdef __cplusplus
+}
+#endif
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr121118_1.c
@@ -0,0 +1,16 @@
+/* { dg-options "-O2 -msve-vector-bits=512" } */
+
+typedef __SVBool_t fixed_bool __attribute__((arm_sve_vector_bits(512)));
+
+#define TEST_CONST(NAME, CONST)						\
+  fixed_bool								\
+  NAME ()								\
+  {									\
+    union { unsigned long long i; fixed_bool pg; } u = { CONST };	\
+    return u.pg;							\
+  }
+
+TEST_CONST (test1, 0x02aaaaaaaa)
+TEST_CONST (test2, 0x0155555557)
+TEST_CONST (test3, 0x0013333333333333ULL)
+TEST_CONST (test4, 0x0011111111111113ULL)
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/aarch64/sve/acle/general/rev_2.c
@@ -0,0 +1,27 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+#include <arm_sve.h>
+
+svbool_t test1()
+{
+  return svrev_b16 (svptrue_b16 ());
+}
+
+svbool_t test2()
+{
+  return svrev_b32 (svptrue_b32 ());
+}
+
+svbool_t test3()
+{
+  return svrev_b64 (svptrue_b64 ());
+}
+
+/* { dg-final { scan-assembler {\tptrue\tp[0-7]\.h} } } */
+/* { dg-final { scan-assembler {\tptrue\tp[0-7]\.s} } } */
+/* { dg-final { scan-assembler {\tptrue\tp[0-7]\.d} } } */
+/* { dg-final { scan-assembler-not {\tptrue\tp[0-7]\.b} } } */
+/* { dg-final { scan-assembler {\trev\tp0\.h} } } */
+/* { dg-final { scan-assembler {\trev\tp0\.s} } } */
+/* { dg-final { scan-assembler {\trev\tp0\.d} } } */
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/aarch64/sve/dwarf-bit-stride.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+// { dg-options "-g -dA" }
+// { dg-final { scan-assembler-times "DW_AT_name: \"__SVBool_t\"" 1 } }
+// { dg-final { scan-assembler-times ".byte	0x1	// DW_AT_bit_stride" 1 } }
+// { dg-final { scan-assembler-times ".byte	0x1	// DW_AT_bit_size" 1 } }
+
+#include <arm_sve.h>
+
+void fun ()
+{
+  volatile svbool_t pred8 = svwhilelt_b8_u32 (0u, 1u);
+  volatile svbool_t pred16 = svwhilelt_b16_u32 (0u, 3u);
+  volatile svbool_t pred32 = svwhilelt_b32_u32 (0u, 7u);
+  volatile svbool_t pred64 = svwhilelt_b64_u32 (0u, 11u);
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/aarch64/sve/permute_5.c
@@ -0,0 +1,10 @@
+/* { dg-options "-O -msve-vector-bits=256" } */
+
+typedef __SVBfloat16_t vbfloat16 __attribute__((arm_sve_vector_bits(256)));
+
+vbfloat16
+foo (vbfloat16 x, vbfloat16 y)
+{
+  return __builtin_shufflevector (x, y, 0, 2, 1, 3, 16, 19, 17, 18,
+				  8, 9, 10, 11, 23, 22, 21, 20);
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/aarch64/sve2/pr121599.c
@@ -0,0 +1,31 @@
+/* PR target/121599.  */
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" "" } } */
+
+#include <arm_sve.h>
+
+/*
+** foo:
+**	movi?	[vdz]([0-9]+)\.?b?, #0
+**	movprfx	z0\.b, p0/z, z0\.b
+**	usqadd	z0\.b, p0/m, z0\.b, z\1\.b
+**	ret
+*/
+svuint8_t foo (svbool_t pg, svuint8_t op1)
+{
+    return svsqadd_u8_z (pg, op1, svdup_s8 (0));
+}
+
+/*
+** bar:
+**	movi?	[vdz]([0-9]+)\.?b?, #0
+**	movprfx	z0\.b, p0/z, z0\.b
+**	suqadd	z0\.b, p0/m, z0\.b, z\1\.b
+**	ret
+*/
+svint8_t bar (svbool_t pg, svint8_t op1)
+{
+    return svuqadd_n_s8_z (pg, op1, 0);
+}
+
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/aarch64/torture/pr121772.c
@@ -0,0 +1,6 @@
+/* { dg-do compile } */
+/* { dg-options "-fchecking" } */
+#include <arm_neon.h>
+int16_t f(int16x4_t b) {
+  return vaddvq_s16(vcombine_s16(b, vdup_n_s16 (0)));
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/arm/cbz-range.c
@@ -0,0 +1,114 @@
+/* { dg-do assemble } */
+/* { dg-require-effective-target arm_arch_v7a_ok } */
+/* { dg-options "-O -mthumb" } */
+/* { dg-add-options arm_arch_v7a } */
+
+#define f "movw r0, #0;movw r0, #0;movw r0, #0;"
+#define f2 f f
+#define f4 f2 f2
+#define f8 f4 f4
+#define f16 f8 f8
+#define f32 f16 f16
+#define f64 f32 f32
+#define f128 f64 f64
+#define f256 f128 f128
+#define f512 f256 f256
+#define f1024 f512 f512
+#define f2048 f1024 f1024
+#define f4096 f2048 f2048
+#define f8192 f4096 f4096
+#define f16384 f8192 f8192
+#define f32768 f16384 f16384
+#define f65536 f32768 f32768
+#define f131072 f65536 f65536
+int a;
+
+int cbz1(int g)
+{
+  if (g)
+    asm(f8);
+  return a;
+}
+
+int cbz2(int g)
+{
+  asm ("": "+h"(g));
+  if (g)
+    asm(f8);
+  return a;
+}
+
+int cbz3(int g)
+{
+  if (g)
+    asm(f16);
+  return a;
+}
+
+int cbz4(int g)
+{
+  asm ("": "+h"(g));
+  if (g)
+    asm(f16);
+  return a;
+}
+
+int cbz5(int g)
+{
+  if (g)
+    asm(f131072);
+  return a;
+}
+
+int cbz6(int g)
+{
+  asm ("": "+h"(g));
+  if (g)
+    asm(f131072);
+  return a;
+}
+
+int cbnz1(int g)
+{
+  if (!g)
+    asm(f8);
+  return a;
+}
+
+int cbnz2(int g)
+{
+  asm ("": "+h"(g));
+  if (!g)
+    asm(f8);
+  return a;
+}
+
+int cbnz3(int g)
+{
+  if (!g)
+    asm(f16);
+  return a;
+}
+
+int cbnz4(int g)
+{
+  asm ("": "+h"(g));
+  if (!g)
+    asm(f16);
+  return a;
+}
+
+int cbnz5(int g)
+{
+  if (!g)
+    asm(f131072);
+  return a;
+}
+
+int cbnz6(int g)
+{
+  asm ("": "+h"(g));
+  if (!g)
+    asm(f131072);
+  return a;
+}
deleted file mode 100644
--- a/src/gcc/testsuite/gcc.target/arm/fp16-aapcs-1.c
+++ /dev/null
@@ -1,65 +0,0 @@
-/* { dg-do compile }  */
-/* { dg-require-effective-target arm_hard_vfp_ok }  */
-/* { dg-require-effective-target arm_fp16_ok } */
-/* { dg-options "-O2" }  */
-/* { dg-add-options arm_fp16_ieee } */
-/* { dg-final { check-function-bodies "**" "" "" } } */
-
-/* Test __fp16 arguments and return value in registers (hard-float).  */
-
-void
-swap (__fp16, __fp16);
-
-/*
-** F:
-** ...
-** (
-
-Below block is for non-armv8.1
-** (
-**	vmov\.f32	(s[3-9]|s1[0-5]), s0
-** ...
-**	vmov\.f32	s0, s1
-** ...
-**	vmov\.f32	s1, \1
-** |
-**	vmov\.f32	(s[3-9]|s1[0-5]), s1
-** ...
-**	vmov\.f32	s1, s0
-** ...
-**	vmov\.f32	s0, \2
-** )
-**	vstr\.32	s2, \[sp, #4\]	@ int
-**	bl	swap
-**	vldr\.32	s2, \[sp, #4\]	@ int
-**	vmov\.f32	s0, s2
-
-** |
-
-Below block is for armv8.1
-** (
-**	vmov	(s[3-9]|s1[0-5]), s0	@ __fp16
-** ...
-**	vmov	s0, s1	@ __fp16
-** ...
-**	vmov	s1, \3	@ __fp16
-** |
-**	vmov	(s[3-9]|s1[0-5]), s1	@ __fp16
-** ...
-**	vmov	s1, s0	@ __fp16
-** ...
-**	vmov	s0, \4	@ __fp16
-** )
-**	vstr\.32	s2, \[sp, #4\]	@ int
-**	bl	swap
-**	vldr\.16	s0, \[sp, #4\]
-
-** )
-** ...
-*/
-__fp16
-F (__fp16 a, __fp16 b, __fp16 c)
-{
-  swap (b, a);
-  return c;
-}
deleted file mode 100644
--- a/src/gcc/testsuite/gcc.target/arm/fp16-aapcs-2.c
+++ /dev/null
@@ -1,44 +0,0 @@
-/* { dg-do compile }  */
-/* { dg-require-effective-target arm_fp16_ok } */
-/* { dg-options "-mfloat-abi=softfp -O2 -mno-long-calls" }  */
-/* { dg-add-options arm_fp16_ieee } */
-/* { dg-skip-if "incompatible float-abi" { arm*-*-* } { "-mfloat-abi=hard" } } */
-/* { dg-final { check-function-bodies "**" "" "" } } */
-
-/* Test __fp16 arguments and return value in registers (softfp).  */
-
-void
-swap (__fp16, __fp16);
-
-/*
-** F:
-** ...
-** (
-**	mov	r3, r0	@ __fp16
-** ...
-**	mov	r0, r1	@ __fp16
-** ...
-**	mov	r1, r3	@ __fp16
-** |
-**	mov	r3, r1	@ __fp16
-** ...
-**	mov	r1, r0	@ __fp16
-** ...
-**	mov	r0, r3	@ __fp16
-** )
-** ...
-*/
-/*
-** F: { target arm_little_endian }
-** ...
-**	str	r2, \[sp, #4\]
-**	bl	swap
-**	ldrh	r0, \[sp, #4\]	@ __fp16
-** ...
-*/
-__fp16
-F (__fp16 a, __fp16 b, __fp16 c)
-{
-  swap (b, a);
-  return c;
-}
deleted file mode 100644
--- a/src/gcc/testsuite/gcc.target/arm/fp16-aapcs-3.c
+++ /dev/null
@@ -1,65 +0,0 @@
-/* { dg-do compile }  */
-/* { dg-require-effective-target arm_hard_vfp_ok }  */
-/* { dg-require-effective-target arm_fp16_alternative_ok } */
-/* { dg-options "-O2" }  */
-/* { dg-add-options arm_fp16_alternative } */
-/* { dg-final { check-function-bodies "**" "" "" } } */
-
-/* Test __fp16 arguments and return value in registers (hard-float).  */
-
-void
-swap (__fp16, __fp16);
-
-/*
-** F:
-** ...
-** (
-
-Below block is for non-armv8.1
-** (
-**	vmov\.f32	(s[3-9]|s1[0-5]), s0
-** ...
-**	vmov\.f32	s0, s1
-** ...
-**	vmov\.f32	s1, \1
-** |
-**	vmov\.f32	(s[3-9]|s1[0-5]), s1
-** ...
-**	vmov\.f32	s1, s0
-** ...
-**	vmov\.f32	s0, \2
-** )
-**	vstr\.32	s2, \[sp, #4\]	@ int
-**	bl	swap
-**	vldr\.32	s2, \[sp, #4\]	@ int
-**	vmov\.f32	s0, s2
-
-** |
-
-Below block is for armv8.1
-** (
-**	vmov	(s[3-9]|s1[0-5]), s0
-** ...
-**	vmov	s0, s1
-** ...
-**	vmov	s1, \3
-** |
-**	vmov	(s[3-9]|s1[0-5]), s1
-** ...
-**	vmov	s1, s0
-** ...
-**	vmov	s0, \4
-** )
-**	vstr\.32	s2, \[sp, #4\]	@ int
-**	bl	swap
-**	vldr\.16	s0, \[sp, #4\]
-
-** )
-** ...
-*/
-__fp16
-F (__fp16 a, __fp16 b, __fp16 c)
-{
-  swap (b, a);
-  return c;
-}
deleted file mode 100644
--- a/src/gcc/testsuite/gcc.target/arm/fp16-aapcs-4.c
+++ /dev/null
@@ -1,44 +0,0 @@
-/* { dg-do compile }  */
-/* { dg-require-effective-target arm_fp16_alternative_ok } */
-/* { dg-options "-mfloat-abi=softfp -O2" }  */
-/* { dg-add-options arm_fp16_alternative } */
-/* { dg-skip-if "incompatible float-abi" { arm*-*-* } { "-mfloat-abi=hard" } } */
-/* { dg-final { check-function-bodies "**" "" "" } } */
-
-/* Test __fp16 arguments and return value in registers (softfp).  */
-
-void
-swap (__fp16, __fp16);
-
-/*
-** F:
-** ...
-** (
-**	mov	r3, r0	@ __fp16
-** ...
-**	mov	r0, r1	@ __fp16
-** ...
-**	mov	r1, r3	@ __fp16
-** |
-**	mov	r3, r1	@ __fp16
-** ...
-**	mov	r1, r0	@ __fp16
-** ...
-**	mov	r0, r3	@ __fp16
-** )
-** ...
-*/
-/*
-** F: { target arm_little_endian }
-** ...
-**	str	r2, \[sp, #4\]
-**	bl	swap
-**	ldrh	r0, \[sp, #4\]	@ __fp16
-** ...
-*/
-__fp16
-F (__fp16 a, __fp16 b, __fp16 c)
-{
-  swap (b, a);
-  return c;
-}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/arm/fp16-aapcs.c
@@ -0,0 +1,24 @@
+/* { dg-do compile }  */
+/* { dg-require-effective-target arm_fp16_alternative_ok } */
+/* { dg-options "-O2" }  */
+/* { dg-add-options arm_fp16_alternative } */
+/* { dg-final { check-function-bodies "**" "" "" } } */
+
+/* Test __fp16 arguments and return value in registers.  */
+
+__fp16 f();
+void g(__fp16);
+void h();
+
+/*
+** test:
+** ...
+**	bl	f
+**	bl	g
+** ...
+*/
+int test()
+{
+    g(f());
+    h();
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/arm/mve/intrinsics/pr122223.c
@@ -0,0 +1,31 @@
+/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
+/* { dg-add-options arm_v8_1m_mve_fp } */
+/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+/* PR target/122223.  */
+
+#include <arm_mve.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+**	...
+**	vmov.f32	(q[0-9]+), #0.0  @ v4sf
+**	...
+**	vbic	q[0-9]+, q[0-9]+, \1
+**	...
+*/
+float32x4_t foo() {
+  float32x4_t a = vdupq_n_f32(1.0f); /* 0x3f800000 */
+  float32x4_t b = vbicq_f32(a, a);   /* 0x3f800000 & ~0x3f800000 => 0x00000000 */
+  float32x4_t c = vbicq_f32(a, b);   /* 0x3f800000 & ~0x00000000 => 0x3f800000 */
+  return c;
+}
+
+#ifdef __cplusplus
+}
+#endif
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/arm/neon-smax16.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_v8_2a_fp16_neon_ok } */
+/* { dg-add-options arm_v8_2a_fp16_neon } */
+/* { dg-additional-options "-std=c23 -Ofast" } */
+void foo(void);
+extern _Float16 main_in[];
+void bar() {
+  _Float16 out = 0.0;
+  for (int i = 0; i < 100; i++)
+    if (out < main_in[i])
+      out = main_in[i];
+  if (out)
+    foo();
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/arm/neon-smin16.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_v8_2a_fp16_neon_ok } */
+/* { dg-add-options arm_v8_2a_fp16_neon } */
+/* { dg-additional-options "-std=c23 -Ofast" } */
+void foo(void);
+extern _Float16 main_in[];
+void bar() {
+  _Float16 out = 0.0;
+  for (int i = 0; i < 100; i++)
+    if (out > main_in[i])
+      out = main_in[i];
+  if (out)
+    foo();
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/avr/cmpdi-1.c
@@ -0,0 +1,149 @@
+/* { dg-do run { target { ! avr_tiny } } } */
+/* { dg-additional-options { -std=gnu99 -Os -mcall-prologues } } */
+
+typedef __INT8_TYPE__   int8_t;
+typedef __UINT8_TYPE__  uint8_t;
+typedef __UINT16_TYPE__ uint16_t;
+typedef __UINT64_TYPE__ uint64_t;
+typedef __INT64_TYPE__  int64_t;
+
+#define ARRAY_SIZE(X) (sizeof(X) / sizeof(*X))
+
+const __flash uint64_t mant[] =
+  {
+    0x0000000000000,
+    0x0000000000001,
+    0x0000000000100,
+    0x0000000010000,
+    0x0000001000000,
+    0x0000100000000,
+    0x0010000000000,
+    0x1000000000000,
+    0x00000000000ff,
+    0x00000000000ff,
+    0x000000000ffff,
+    0x0000000ffffff,
+    0x00000ffffffff,
+    0x000ffffffffff,
+    0x0ffffffffffff,
+    0xfffffffffffff,
+    0xfffffffffff00,
+    0xfffffffff0000,
+    0xfffffff000000,
+    0xfffff00000000,
+    0xfff0000000000,
+    0xff00000000000,
+    0xf000000000000,
+    0x7ffffffffffff,
+    0x8000000000000,
+    0x8000000000001,
+    0xffffffffffffe
+  };
+
+const __flash uint16_t expo[] =
+  {
+    0x000,
+    0x001,
+    0x002,
+    0x7fe,
+    0x7ff
+  };
+
+#define SMASK ((uint64_t) 1 << 63)
+#define xNAN 0x7f
+
+char d64_nan_p (uint64_t a)
+{
+  return (a & ~SMASK) > (uint64_t) 0x7ff << 52;
+}
+
+int8_t cmp_d64 (uint64_t a, uint64_t b)
+{
+  if (d64_nan_p (a) || d64_nan_p (b))
+    return xNAN;
+
+  if (a & SMASK)     a = SMASK - a;
+  if (b & SMASK)     b = SMASK - b;
+  __asm ("" : "+r" (a));
+  __asm ("" : "+r" (b));
+
+  return a == b
+    ? 0
+    : (int64_t) a > (int64_t) b ? 1 : -1;
+}
+
+extern int8_t eq (uint64_t, uint64_t) __asm("__eqdf2");
+extern int8_t ne (uint64_t, uint64_t) __asm("__nedf2");
+extern int8_t ge (uint64_t, uint64_t) __asm("__gedf2");
+extern int8_t gt (uint64_t, uint64_t) __asm("__gtdf2");
+extern int8_t le (uint64_t, uint64_t) __asm("__ledf2");
+extern int8_t lt (uint64_t, uint64_t) __asm("__ltdf2");
+extern int8_t unord (uint64_t, uint64_t) __asm("__unorddf2");
+
+void test1 (uint64_t a, uint64_t b)
+{
+  int8_t d, c = cmp_d64 (a, b);
+  d = eq (a, b);
+  if (c == xNAN && d) __builtin_exit (1);
+  if (c != xNAN && d != (c == 0)) __builtin_exit (2);
+
+  d = ne (a, b);
+  if (c == xNAN && d) __builtin_exit (3);
+  if (c != xNAN && d != (c != 0)) __builtin_exit (4);
+
+  d = ge (a, b);
+  if (c == xNAN && d) __builtin_exit (5);
+  if (c != xNAN && d != (c >= 0)) __builtin_exit (6);
+
+  d = gt (a, b);
+  if (c == xNAN && d) __builtin_exit (7);
+  if (c != xNAN && d != (c > 0)) __builtin_exit (8);
+
+  d = le (a, b);
+  if (c == xNAN && d) __builtin_exit (9);
+  if (c != xNAN && d != (c <= 0)) __builtin_exit (10);
+
+  d = lt (a, b);
+  if (c == xNAN && d) __builtin_exit (11);
+  if (c != xNAN && d != (c < 0)) __builtin_exit (12);
+
+  d = unord (a, b);
+  if (c == xNAN && !d) __builtin_exit (13);
+  if (c != xNAN && d) __builtin_exit (14);
+}
+
+
+void testAB (uint64_t a, uint64_t b)
+{
+  test1 (a, b);
+  test1 (a, b ^ SMASK);
+  test1 (a ^ SMASK, b);
+  test1 (a ^ SMASK, b ^ SMASK);
+}
+
+void testA (uint64_t a)
+{
+  for (uint8_t i = 0; i < ARRAY_SIZE (mant); ++i)
+    {
+      uint64_t b = mant[i];
+      for (uint8_t j = 0; j < ARRAY_SIZE (expo); ++j)
+	testAB (a, b | ((uint64_t) expo[j] << 52));
+    }
+}
+
+void tests (void)
+{
+  for (uint8_t i = 0; i < ARRAY_SIZE (mant); ++i)
+    {
+      uint64_t a = mant[i];
+      for (uint8_t j = 0; j < ARRAY_SIZE (expo); ++j)
+	testA (a | ((uint64_t) expo[j] << 52));
+    }
+}
+
+
+int main (void)
+{
+  tests ();
+  return 0;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/avr/dtofx.c
@@ -0,0 +1,98 @@
+/* { dg-do run { target { ! avr_tiny } } } */
+/* { dg-additional-options { -std=gnu99 -Os -mcall-prologues -Wno-pedantic } } */
+
+#include <stdfix.h>
+
+#if __SIZEOF_LONG_DOUBLE__ == 8
+
+typedef long double D;
+
+volatile D d0 = 0;
+volatile D dm15 = -1.5;
+volatile D dp15 = +1.5;
+volatile D dm05 = -0.5;
+volatile D dp05 = +0.5;
+
+void test0 (void)
+{
+  if (0hk != (short accum) d0)
+    __builtin_exit (__LINE__);
+
+  if (0uhk != (unsigned short accum) d0)
+    __builtin_exit (__LINE__);
+
+  if (0hr != (short fract) d0)
+    __builtin_exit (__LINE__);
+
+  if (0uhr != (unsigned short fract) d0)
+    __builtin_exit (__LINE__);
+
+  if (0k != (accum) d0)
+    __builtin_exit (__LINE__);
+
+  if (0uk != (unsigned accum) d0)
+    __builtin_exit (__LINE__);
+
+  if (0r != (fract) d0)
+    __builtin_exit (__LINE__);
+
+  if (0ur != (unsigned fract) d0)
+    __builtin_exit (__LINE__);
+}
+
+void testp (void)
+{
+  if (0.5hr != (short fract) dp05)
+    __builtin_exit (__LINE__);
+
+  if (0.5uhr != (unsigned short fract) dp05)
+    __builtin_exit (__LINE__);
+
+  if (0.5r != (fract) dp05)
+    __builtin_exit (__LINE__);
+
+  if (0.5ur != (unsigned fract) dp05)
+    __builtin_exit (__LINE__);
+
+  if (1.5hk != (short accum) dp15)
+    __builtin_exit (__LINE__);
+
+  if (1.5uhk != (unsigned short accum) dp15)
+    __builtin_exit (__LINE__);
+
+  if (1.5k != (accum) dp15)
+    __builtin_exit (__LINE__);
+
+  if (1.5uk != (unsigned accum) dp15)
+    __builtin_exit (__LINE__);
+}
+
+void testm (void)
+{
+  if (-0.5hr != (short fract) dm05)
+    __builtin_exit (__LINE__);
+
+  if (-0.5r != (fract) dm05)
+    __builtin_exit (__LINE__);
+
+  if (-1.5hk != (short accum) dm15)
+    __builtin_exit (__LINE__);
+
+  if (-1.5k != (accum) dm15)
+    __builtin_exit (__LINE__);
+}
+
+int main (void)
+{
+  test0 ();
+  testp ();
+  testm ();
+
+  return 0;
+}
+#else
+int main (void)
+{
+  return 0;
+}
+#endif
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/avr/fminfmax-1.c
@@ -0,0 +1,116 @@
+/* { dg-do run { target { ! avr_tiny } } } */
+/* { dg-additional-options { -std=gnu99 -Os -mcall-prologues } } */
+
+typedef __INT8_TYPE__   int8_t;
+typedef __UINT8_TYPE__  uint8_t;
+typedef __UINT16_TYPE__ uint16_t;
+typedef __UINT64_TYPE__ uint64_t;
+typedef __INT64_TYPE__  int64_t;
+
+#define ARRAY_SIZE(X) (sizeof(X) / sizeof(*X))
+
+const __flash uint64_t vals[] =
+  {
+    // NaNs
+    0xffffffffffffffff,
+    0x7fffffffffffffff,
+    0xfff0000000000001,
+    0x7ff0000000000001,
+
+    // Some non-NaN doubles, increasing in magnitude.
+    0xfff0000000000000, // -Inf
+    0xffefffffffffffff,
+    0xffe0000000000000,
+    0x8010000000000000,
+    0x800fffffffffffff,
+    0x800ffffffffffffe,
+    0x8007fffffffffffe,
+    0x8000000000000001,
+    0x0000000000000000,
+    0x0000000000000001,
+    0x0007fffffffffffe,
+    0x000ffffffffffffe,
+    0x000fffffffffffff,
+    0x0010000000000000,
+    0x7fe0000000000000,
+    0x7fefffffffffffff,
+    0x7ff0000000000000  // +Inf
+  };
+
+#define SMASK ((uint64_t) 1 << 63)
+
+char d64_nan_p (uint64_t a)
+{
+  return (a & ~SMASK) > (uint64_t) 0x7ff << 52;
+}
+
+extern uint64_t xmin (uint64_t, uint64_t) __asm("__fmin");
+extern uint64_t xmax (uint64_t, uint64_t) __asm("__fmax");
+
+void test_fmin (uint8_t i, uint8_t j)
+{
+  uint64_t a = vals[i];
+  uint64_t b = vals[j];
+  uint64_t m = xmin (a, b);
+
+  char a_nan_p = d64_nan_p (a);
+  char b_nan_p = d64_nan_p (b);
+
+  if (a_nan_p + b_nan_p == 2)
+    {
+      if (!d64_nan_p (m))
+	__builtin_exit (__LINE__);
+    }
+  else
+    {
+      uint64_t r = 0?0
+	: a_nan_p ? b
+	: b_nan_p ? a
+	: i < j ? a : b;
+      if (r != m)
+	__builtin_exit (__LINE__);
+    }
+}
+
+
+void test_fmax (uint8_t i, uint8_t j)
+{
+  uint64_t a = vals[i];
+  uint64_t b = vals[j];
+  uint64_t m = xmax (a, b);
+
+  char a_nan_p = d64_nan_p (a);
+  char b_nan_p = d64_nan_p (b);
+
+  if (a_nan_p + b_nan_p == 2)
+    {
+      if (!d64_nan_p (m))
+	__builtin_exit (__LINE__);
+    }
+  else
+    {
+      uint64_t r = 0?0
+	: a_nan_p ? b
+	: b_nan_p ? a
+	: i > j ? a : b;
+      if (r != m)
+	__builtin_exit (__LINE__);
+    }
+}
+
+
+void tests (void)
+{
+  for (uint8_t i = 0; i < ARRAY_SIZE (vals); ++i)
+    for (uint8_t j = 0; j < ARRAY_SIZE (vals); ++j)
+      {
+	test_fmin (i, j);
+      }
+}
+
+
+int main (void)
+{
+  tests ();
+  return 0;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/avr/fxtod.c
@@ -0,0 +1,115 @@
+/* { dg-do run { target { ! avr_tiny } } } */
+/* { dg-additional-options { -std=gnu99 -Os -mcall-prologues -fwrapv -Wno-overflow } } */
+
+#include <stdfix.h>
+
+#if __SIZEOF_LONG_DOUBLE__ == 8
+
+#define NI __attribute__((noipa))
+
+typedef long double D;
+
+extern D ldexpl (D, int);
+
+typedef short fract hr_t;
+typedef unsigned short fract uhr_t;
+typedef fract r_t;
+typedef unsigned fract ur_t;
+
+typedef short accum hk_t;
+typedef unsigned short accum uhk_t;
+typedef accum k_t;
+typedef unsigned accum uk_t;
+
+#define FBITuhr 8
+#define FBIThr  7
+#define FBITur  16
+#define FBITr   15
+
+#define FBITuhk 8
+#define FBIThk  7
+#define FBITuk  16
+#define FBITk   15
+
+#define VALff(S) ((2ul << (8 * sizeof (S##bits(0)) - 1)) - 1)
+#define VAL80(S) (1ul << (8 * sizeof (S##bits(0)) - 1))
+#define VAL00(S) 0
+#define VAL01(S) 1
+
+
+#define TEST_U(S, V)				\
+  NI void test_##S##_##V (void)			\
+  {						\
+    S##_t x = S##bits (VAL##V (S));		\
+    __asm ("" : "+r" (x));			\
+    D d = (D) x;				\
+    D z = ldexpl (VAL##V (S), - FBIT##S);	\
+    if (d != z)					\
+      __builtin_exit (1);			\
+  }
+
+#define TEST_S(S, V)				\
+  NI void test_##S##_##V (void)			\
+  {						\
+    uint32_t u32 = (VAL##V (S) & VAL80 (S))	\
+      ? 1u + (VAL##V (S) ^ VALff (S))		\
+      : VAL##V (S);				\
+    S##_t x = S##bits (VAL##V (S));		\
+    __asm ("" : "+r" (x));			\
+    D d = (D) x;				\
+    D z = ldexpl (u32, - FBIT##S);		\
+    int s = (VAL##V (S) & VAL80 (S)) != 0;	\
+    if (s == 0 && d != z)			\
+      __builtin_exit (2);			\
+    if (s == 1 && d != -z)			\
+      __builtin_exit (3);			\
+  }
+
+#define TESTS_U(S)				\
+  TEST_U (S, 00)				\
+  TEST_U (S, 01)				\
+  TEST_U (S, ff)				\
+  TEST_U (S, 80)
+
+#define TESTS_S(S)				\
+  TEST_S (S, 00)				\
+  TEST_S (S, 01)				\
+  TEST_S (S, ff)				\
+  TEST_S (S, 80)
+
+TESTS_U (uhr)
+TESTS_U (ur)
+TESTS_U (uhk)
+TESTS_U (uk)
+
+TESTS_S (hr)
+TESTS_S (r)
+TESTS_S (hk)
+TESTS_S (k)
+
+#define RUN(S)		\
+  test_##S##_00 ();	\
+  test_##S##_01 ();	\
+  test_##S##_ff ();	\
+  test_##S##_80 ()
+  
+int main (void)
+{
+  RUN (uhr);
+  RUN (ur);
+  RUN (uhk);
+  RUN (uk);
+
+  RUN (hr);
+  RUN (r);
+  RUN (hk);
+  RUN (k);
+
+  return 0;
+}
+#else
+int main (void)
+{
+  return 0;
+}
+#endif
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/avr/pr122220.c
@@ -0,0 +1,23 @@
+/* { dg-do run { target { ! avr_tiny } } } */
+/* { dg-additional-options { -std=gnu99 -Os -mcall-prologues } } */
+
+#if __SIZEOF_LONG_DOUBLE__ == 8
+
+typedef long double D;
+typedef __INT32_TYPE__ int32_t;
+
+D dd = -0x1p31L;
+  
+int main (void)
+{
+  if ((int32_t) dd != -0x7fffffff - 1)
+    __builtin_abort();
+
+  return 0;
+}
+#else
+int main (void)
+{
+  return 0;
+}
+#endif
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/avr/pr122222-sitod.c
@@ -0,0 +1,60 @@
+/* { dg-do run { target { ! avr_tiny } } } */
+/* { dg-additional-options { -std=gnu99 -Os -mcall-prologues } } */
+
+#if __SIZEOF_LONG_DOUBLE__ == 8
+
+typedef long double D;
+typedef __INT32_TYPE__  int32_t;
+typedef __UINT32_TYPE__ uint32_t;
+typedef __UINT8_TYPE__  uint8_t;
+
+#define ARRAY_SIZE(X) (sizeof(X) / sizeof(*X))
+
+void testu (void)
+{
+  static const volatile __flash uint32_t vals[] =
+    {
+      0, 1ul, -1ul, (-1ul) << 1,
+      1ul << 31, 1ul << 30, 1ul << 29, 1ul << 28, 1ul << 27, 1ul << 26,
+      1ul << 25, 1ul << 24, 0xff, 123456789
+    };
+
+  for (uint8_t i = 0; i < ARRAY_SIZE (vals); ++i)
+    {
+      D x = (D) vals[i];
+      __asm ("" : "+r" (x));
+      if ((uint32_t) x != vals[i])
+	__builtin_exit (__LINE__);
+    }
+}
+
+void tests (void)
+{
+  static const volatile __flash int32_t vals[] =
+    {
+      0, 1L, -1L, 0x7fffffff, -0x7fffffff, -0x7fffffff - 1,
+      -123456789
+    };
+
+  for (uint8_t i = 0; i < ARRAY_SIZE (vals); ++i)
+    {
+      D x = (D) vals[i];
+      __asm ("" : "+r" (x));
+      if ((int32_t) x != vals[i])
+	__builtin_exit (__LINE__);
+    }
+}
+
+int main (void)
+{
+  testu ();
+  tests ();
+
+  return 0;
+}
+#else
+int main (void)
+{
+  return 0;
+}
+#endif
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/avr/sincos-1.c
@@ -0,0 +1,35 @@
+/* { dg-do run { target { ! avr_tiny } } } */
+/* { dg-additional-options { -std=gnu99 -Os -mcall-prologues } } */
+
+#if __SIZEOF_LONG_DOUBLE__ == 8
+typedef long double D;
+
+extern void sincosl (D, D*, D*);
+extern D sinl (D);
+extern D cosl (D);
+
+D s1, c1;
+
+int main (void)
+{
+  for (D x = -20; x < 20; x += 1.1)
+    {
+      sincosl (x, &s1, &c1);
+
+      __asm ("" : "+r" (x) :: "memory");
+
+      if (s1 != sinl (x))
+	__builtin_exit (1);
+
+      if (c1 != cosl (x))
+	__builtin_exit (2);
+    }
+
+  return 0;
+}
+#else
+int main (void)
+{
+  return 0;
+}
+#endif
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/avr/torture/pr122187.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-additional-options { -std=c99 } } */
+
+typedef __UINT32_TYPE__ uint32_t;
+typedef __UINT16_TYPE__ uint16_t;
+typedef __UINT8_TYPE__ uint8_t;
+
+#define PINB (*(volatile uint8_t*) (13 + __AVR_SFR_OFFSET__))
+#define PB1 1
+
+uint16_t fun (void)
+{
+    uint16_t h = 0;
+    for (uint32_t s = 0; s < 0x10000; ++s)
+        h += (PINB >> PB1) & 1;
+    return h;
+}
--- a/src/gcc/testsuite/gcc.target/i386/amxbf16-asmintel-1.c
+++ b/src/gcc/testsuite/gcc.target/i386/amxbf16-asmintel-1.c
@@ -1,7 +1,7 @@
 /* { dg-do compile { target { ! ia32 } } } */
 /* { dg-require-effective-target masm_intel } */
 /* { dg-options "-O2 -mamx-bf16 -masm=intel" } */
-/* { dg-final { scan-assembler "tdpbf16ps\[ \\t]+\[^\n\]*%tmm1+\[^\n\]*%tmm2+\[^\n\]*%tmm3"  } } */
+/* { dg-final { scan-assembler "tdpbf16ps\[ \\t]+\[^\n%\]*tmm1+\[^\n%\]*tmm2+\[^\n%\]*tmm3"  } } */
 #include <immintrin.h>
 
 void TEST ()
--- a/src/gcc/testsuite/gcc.target/i386/amxcomplex-asmintel-1.c
+++ b/src/gcc/testsuite/gcc.target/i386/amxcomplex-asmintel-1.c
@@ -1,8 +1,8 @@
 /* { dg-do compile { target { ! ia32 } } } */
 /* { dg-require-effective-target masm_intel } */
 /* { dg-options "-O2 -mamx-complex -masm=intel" } */
-/* { dg-final { scan-assembler "tcmmimfp16ps\[ \\t]+\[^\n\]*%tmm1+\[^\n\]*%tmm2+\[^\n\]*%tmm3"  } } */
-/* { dg-final { scan-assembler "tcmmrlfp16ps\[ \\t]+\[^\n\]*%tmm1+\[^\n\]*%tmm2+\[^\n\]*%tmm3"  } } */
+/* { dg-final { scan-assembler "tcmmimfp16ps\[ \\t]+\[^\n%\]*tmm1+\[^\n%\]*tmm2+\[^\n%\]*tmm3"  } } */
+/* { dg-final { scan-assembler "tcmmrlfp16ps\[ \\t]+\[^\n%\]*tmm1+\[^\n%\]*tmm2+\[^\n%\]*tmm3"  } } */
 #include <immintrin.h>
 
 void TEST()
--- a/src/gcc/testsuite/gcc.target/i386/amxfp16-asmintel-1.c
+++ b/src/gcc/testsuite/gcc.target/i386/amxfp16-asmintel-1.c
@@ -1,7 +1,7 @@
 /* { dg-do compile { target { ! ia32 } } } */
 /* { dg-require-effective-target masm_intel } */
 /* { dg-options "-O2 -mamx-fp16 -masm=intel" } */
-/* { dg-final { scan-assembler "tdpfp16ps\[ \\t]+\[^\n\]*%tmm1+\[^\n\]*%tmm2+\[^\n\]*%tmm3"  } } */
+/* { dg-final { scan-assembler "tdpfp16ps\[ \\t]+\[^\n%\]*tmm1+\[^\n%\]*tmm2+\[^\n%\]*tmm3"  } } */
 #include <immintrin.h>
 
 void TEST ()
--- a/src/gcc/testsuite/gcc.target/i386/amxint8-asmintel-1.c
+++ b/src/gcc/testsuite/gcc.target/i386/amxint8-asmintel-1.c
@@ -1,10 +1,10 @@
 /* { dg-do compile { target { ! ia32 } } } */
 /* { dg-require-effective-target masm_intel } */
 /* { dg-options "-O2 -mamx-int8 -masm=intel" } */
-/* { dg-final { scan-assembler "tdpbssd\[ \\t]+\[^\n\]*%tmm1+\[^\n\]*%tmm2+\[^\n\]*%tmm3"  } } */
-/* { dg-final { scan-assembler "tdpbsud\[ \\t]+\[^\n\]*%tmm1+\[^\n\]*%tmm2+\[^\n\]*%tmm3"  } } *
-/* { dg-final { scan-assembler "tdpbusd\[ \\t]+\[^\n\]*%tmm1+\[^\n\]*%tmm2+\[^\n\]*%tmm3"  } } */
-/* { dg-final { scan-assembler "tdpbuud\[ \\t]+\[^\n\]*%tmm1+\[^\n\]*%tmm2+\[^\n\]*%tmm3"  } } */
+/* { dg-final { scan-assembler "tdpbssd\[ \\t]+\[^\n%\]*tmm1+\[^\n%\]*tmm2+\[^\n%\]*tmm3"  } } */
+/* { dg-final { scan-assembler "tdpbsud\[ \\t]+\[^\n%\]*tmm1+\[^\n%\]*tmm2+\[^\n%\]*tmm3"  } } */
+/* { dg-final { scan-assembler "tdpbusd\[ \\t]+\[^\n%\]*tmm1+\[^\n%\]*tmm2+\[^\n%\]*tmm3"  } } */
+/* { dg-final { scan-assembler "tdpbuud\[ \\t]+\[^\n%\]*tmm1+\[^\n%\]*tmm2+\[^\n%\]*tmm3"  } } */
 #include <immintrin.h>
 
 void TEST ()
--- a/src/gcc/testsuite/gcc.target/i386/amxtile-asmintel-1.c
+++ b/src/gcc/testsuite/gcc.target/i386/amxtile-asmintel-1.c
@@ -4,10 +4,10 @@
 /* { dg-final { scan-assembler "ldtilecfg\[ \\t]"  } } */
 /* { dg-final { scan-assembler "sttilecfg\[ \\t]"  } } */
 /* { dg-final { scan-assembler "tilerelease"  } } */
-/* { dg-final { scan-assembler "tileloadd\[ \\t]%tmm\[0-9\]"  } } */
-/* { dg-final { scan-assembler "tileloaddt1\[ \\t]%tmm\[0-9\]"  } } */
-/* { dg-final { scan-assembler "tilestored\[ \\t]\[^\n\]+\[^\n\]*%tmm\[0-9\]"  } } */
-/* { dg-final { scan-assembler "tilezero\[ \\t]+\[^\n\]*%tmm\[0-9\]"  } } */
+/* { dg-final { scan-assembler "tileloadd\[ \\t]tmm\[0-9\]"  } } */
+/* { dg-final { scan-assembler "tileloaddt1\[ \\t]tmm\[0-9\]"  } } */
+/* { dg-final { scan-assembler "tilestored\[ \\t]\[^\n\]+\[^\n\]*tmm\[0-9\]"  } } */
+/* { dg-final { scan-assembler "tilezero\[ \\t]+\[^\n%\]*tmm\[0-9\]"  } } */
 #include <immintrin.h>
 
 extern int a[];
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/i386/apx-broadcast.c
@@ -0,0 +1,24 @@
+/* { dg-do assemble { target { apxf && { ! ia32 } } } } */
+/* { dg-options "-mavx512vl -mapxf -O2" } */
+
+#include <stdint.h>
+#include <immintrin.h>
+
+void broadcast_avx2(int *sx, __m256i *coeff, __m128i *temp) {
+  
+  __m256i semp[8];
+
+
+  for (int i = 0; i < 8; i++)
+    {
+      asm volatile ("" : : : "r8", "r9", "r10", "r11", "r12", "r13",
+		    "r14", "r15", "rax", "rcx", "rsi", "rdi", "rdx");
+      register volatile uint64_t sm asm ("%r16") = i;
+      semp[i] = _mm256_broadcastsi128_si256(temp[sm]);
+    }
+
+  coeff[0] = _mm256_unpacklo_epi64(semp[0], semp[1]);
+  coeff[1] = _mm256_unpackhi_epi64(semp[2], semp[3]);
+  coeff[2] = _mm256_unpacklo_epi64(semp[4], semp[5]);
+  coeff[3] = _mm256_unpackhi_epi64(semp[6], semp[7]);
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/i386/avx512f-pr124138-1.c
@@ -0,0 +1,24 @@
+/* PR target/124138 */
+/* { dg-do run } */
+/* { dg-options "-mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+#include "avx512f-helper.h"
+
+typedef __attribute__((__vector_size__ (64))) unsigned long long V;
+
+[[gnu::noipa]] V
+foo (V x)
+{
+  return __builtin_shuffle (x, (V) { 0, 1, 2, 5, 4, 5, 6, 7 });
+}
+
+void
+TEST ()
+{
+  V x = foo ((V) { 1, 2, 3, 4, 5, 6, 7, 8 });
+  if (x[0] != 1 || x[1] != 2 || x[2] != 3 || x[3] != 6
+      || x[4] != 5 || x[5] != 6 || x[6] != 7 || x[7] != 8)
+    __builtin_abort ();
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/i386/avx512f-pr124138-2.c
@@ -0,0 +1,25 @@
+/* PR target/124138 */
+/* { dg-do run } */
+/* { dg-options "-mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#define AVX512F
+#include "avx512f-helper.h"
+
+typedef __attribute__((__vector_size__ (64))) unsigned long long V;
+typedef __attribute__((__vector_size__ (64))) double W;
+
+[[gnu::noipa]] W
+foo (W x)
+{
+  return __builtin_shuffle (x, (V) { 0, 1, 2, 5, 4, 5, 6, 7 });
+}
+
+void
+TEST ()
+{
+  W x = foo ((W) { 1.5, 2.5, 3.5, 4.5, 5.5, 6.5, 7.5, 8.5 });
+  if (x[0] != 1.5 || x[1] != 2.5 || x[2] != 3.5 || x[3] != 6.5
+      || x[4] != 5.5 || x[5] != 6.5 || x[6] != 7.5 || x[7] != 8.5)
+    __builtin_abort ();
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/i386/avx512f-pr124315.c
@@ -0,0 +1,33 @@
+/* PR target/124315 */
+/* { dg-do compile { target masm_intel } } */
+/* { dg-options "-O2 -mavx512f -masm=intel" } */
+/* { dg-final { scan-assembler "\tvfmadd231sd\txmm0{k\[0-7]}, xmm1, xmm2, {ru-sae}" } } */
+/* { dg-final { scan-assembler "\tvfmsub231sd\txmm0{k\[0-7]}, xmm1, xmm2, {ru-sae}" } } */
+/* { dg-final { scan-assembler "\tvfnmadd231sd\txmm0{k\[0-7]}, xmm1, xmm2, {ru-sae}" } } */
+/* { dg-final { scan-assembler "\tvfnmsub231sd\txmm0{k\[0-7]}, xmm1, xmm2, {ru-sae}" } } */
+
+#include <x86intrin.h>
+
+__m128d
+foo (__m128d b, __m128d w, __m128d a,  __mmask8 u)
+{
+  return _mm_mask3_fmadd_round_sd (w, a, b, u, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC);
+}
+
+__m128d
+bar (__m128d b, __m128d w, __m128d a, __mmask8 u)
+{
+  return _mm_mask3_fmsub_round_sd (w, a, b, u, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC);
+}
+
+__m128d
+baz (__m128d b, __m128d w, __m128d a,  __mmask8 u)
+{
+  return _mm_mask3_fnmadd_round_sd (w, a, b, u, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC);
+}
+
+__m128d
+qux (__m128d b, __m128d w, __m128d a,  __mmask8 u)
+{
+  return _mm_mask3_fnmsub_round_sd (w, a, b, u, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC);
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/i386/avx512fp16-pr124335.c
@@ -0,0 +1,13 @@
+/* PR target/124335 */
+/* { dg-do assemble } */
+/* { dg-require-effective-target masm_intel } */
+/* { dg-options "-mavx512fp16 -masm=intel" } */
+/* { dg-require-effective-target avx512fp16 } */
+
+#include <x86intrin.h>
+
+__m128h
+foo (_Float16 const *x, __mmask8 y)
+{
+  return _mm_maskz_load_sh (y, x);
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/i386/builtin-copysign-2.c
@@ -0,0 +1,22 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mno-avx -msse2" } */
+/* Keep labels and directives ('.cfi_startproc', '.cfi_endproc').  */
+/* { dg-final { check-function-bodies "**" "" "" { target { ! ia32 } } {^\t?\.} } } */
+
+/*
+**foo:
+**.LFB[0-9]+:
+**	.cfi_startproc
+**	andps	.LC[0-9]+\(%rip\), %xmm0
+**	ret
+**...
+*/
+
+float
+foo (float x)
+{
+  return __builtin_copysignf (x, 0.0);
+}
+
+/* { dg-final { scan-assembler-times ".long	0" 3 { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler-times ".long	2147483647" 1 { target { ! ia32 } } } } */
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/i386/builtin-copysign-3.c
@@ -0,0 +1,22 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mno-avx -msse2" } */
+/* Keep labels and directives ('.cfi_startproc', '.cfi_endproc').  */
+/* { dg-final { check-function-bodies "**" "" "" { target { ! ia32 } } {^\t?\.} } } */
+
+/*
+**foo:
+**.LFB[0-9]+:
+**	.cfi_startproc
+**	orps	.LC[0-9]+\(%rip\), %xmm0
+**	ret
+**...
+*/
+
+float
+foo (float x)
+{
+  return __builtin_copysignf (x, -3.0);
+}
+
+/* { dg-final { scan-assembler-times ".long	0" 3 { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler-times ".long	-2147483648" 1 { target { ! ia32 } } } } */
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/i386/builtin-copysign-4.c
@@ -0,0 +1,22 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mno-avx -msse2" } */
+/* Keep labels and directives ('.cfi_startproc', '.cfi_endproc').  */
+/* { dg-final { check-function-bodies "**" "" "" { target { ! ia32 } } {^\t?\.} } } */
+
+/*
+**foo:
+**.LFB[0-9]+:
+**	.cfi_startproc
+**	pand	.LC[0-9]+\(%rip\), %xmm0
+**	ret
+**...
+*/
+
+__float128
+foo (__float128 x)
+{
+  return __builtin_copysignq (x, 0.0);
+}
+
+/* { dg-final { scan-assembler-times ".long	-1" 3 { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler-times ".long	2147483647" 1 { target { ! ia32 } } } } */
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/i386/builtin-copysign-5.c
@@ -0,0 +1,22 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mno-avx -msse2" } */
+/* Keep labels and directives ('.cfi_startproc', '.cfi_endproc').  */
+/* { dg-final { check-function-bodies "**" "" "" { target { ! ia32 } } {^\t?\.} } } */
+
+/*
+**foo:
+**.LFB[0-9]+:
+**	.cfi_startproc
+**	pand	.LC[0-9]+\(%rip\), %xmm0
+**	ret
+**...
+*/
+
+__float128
+foo (__float128 x)
+{
+  return __builtin_copysignq (0.0, x);
+}
+
+/* { dg-final { scan-assembler-times ".long	0" 3 { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler-times ".long	-2147483648" 1 { target { ! ia32 } } } } */
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/i386/builtin-copysign-6.c
@@ -0,0 +1,22 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mno-avx -msse2" } */
+/* Keep labels and directives ('.cfi_startproc', '.cfi_endproc').  */
+/* { dg-final { check-function-bodies "**" "" "" { target { ! ia32 } } {^\t?\.} } } */
+
+/*
+**foo:
+**.LFB[0-9]+:
+**	.cfi_startproc
+**	pand	.LC[0-9]+\(%rip\), %xmm0
+**	ret
+**...
+*/
+
+__float128
+foo (__float128 x)
+{
+  return __builtin_copysignq (x, 3.4);
+}
+
+/* { dg-final { scan-assembler-times ".long	-1" 3 { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler-times ".long	2147483647" 1 { target { ! ia32 } } } } */
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/i386/builtin-copysign-7.c
@@ -0,0 +1,20 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mno-avx -msse2" } */
+/* Keep labels and directives ('.cfi_startproc', '.cfi_endproc').  */
+/* { dg-final { check-function-bodies "**" "" "" { target { ! ia32 } } {^\t?\.} } } */
+
+/*
+**foo:
+**.LFB[0-9]+:
+**	.cfi_startproc
+**	pand	.LC[0-9]+\(%rip\), %xmm0
+**	por	.LC[0-9]+\(%rip\), %xmm0
+**	ret
+**...
+*/
+
+__float128
+foo (__float128 x)
+{
+  return __builtin_copysignq (3.4, x);
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/i386/builtin-copysign-8a.c
@@ -0,0 +1,21 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mno-avx -msse2" } */
+/* Keep labels and directives ('.cfi_startproc', '.cfi_endproc').  */
+/* { dg-final { check-function-bodies "**" "" "" { target { ! ia32 } } {^\t?\.} } } */
+
+/*
+**foo:
+**.LFB[0-9]+:
+**	.cfi_startproc
+**	pand	.LC[0-9]+\(%rip\), %xmm0
+**	pand	.LC[0-9]+\(%rip\), %xmm1
+**	por	%xmm1, %xmm0
+**	ret
+**...
+*/
+
+__float128
+foo (__float128 x, __float128 y)
+{
+  return __builtin_copysignq (x, y);
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/i386/builtin-copysign-8b.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mno-avx512f -mavx -mtune=generic" } */
+/* Keep labels and directives ('.cfi_startproc', '.cfi_endproc').  */
+/* { dg-final { check-function-bodies "**" "" "" { target { ! ia32 } } {^\t?\.} } } */
+
+/*
+**foo:
+**.LFB[0-9]+:
+**	.cfi_startproc
+**	vmovdqa	.LC[0-9]+\(%rip\), %xmm2
+**	vpandn	%xmm0, %xmm2, %xmm0
+**	vpand	%xmm2, %xmm1, %xmm1
+**	vpor	%xmm1, %xmm0, %xmm0
+**	ret
+**...
+*/
+
+#include "builtin-copysign-8a.c"
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/i386/builtin-fabs-1.c
@@ -0,0 +1,23 @@
+/* PR target/122323 */
+/* { dg-do compile } */
+/* { dg-options "-O2 -mno-avx -msse2" } */
+/* Keep labels and directives ('.cfi_startproc', '.cfi_endproc').  */
+/* { dg-final { check-function-bodies "**" "" "" { target { ! ia32 } } {^\t?\.} } } */
+
+/*
+**foo:
+**.LFB[0-9]+:
+**	.cfi_startproc
+**	orps	.LC[0-9]+\(%rip\), %xmm0
+**	ret
+**...
+*/
+
+float
+foo (float x)
+{
+  return -__builtin_fabsf (x);
+}
+
+/* { dg-final { scan-assembler-times ".long	0" 3 { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler-times ".long	-2147483648" 1 { target { ! ia32 } } } } */
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/i386/builtin-fabs-2.c
@@ -0,0 +1,28 @@
+/* PR target/99930 */
+/* { dg-do compile } */
+/* { dg-options "-O2 -mno-avx -msse2" } */
+/* Keep labels and directives ('.cfi_startproc', '.cfi_endproc').  */
+/* { dg-final { check-function-bodies "**" "" "" { target { ! ia32 } } {^\t?\.} } } */
+
+/*
+**foo:
+**...
+**	ja	.L[0-9]+
+**	movss	4\(%(e|r)di\), %xmm2
+**	orps	%xmm2, %xmm1
+**	comiss	%xmm1, %xmm0
+**	seta	%al
+**	ret
+**...
+*/
+
+#include <stdbool.h>
+
+bool
+foo (float n[2], float m)
+{
+  for (int i = 0; i < 2; i++)
+    if (m > -__builtin_fabsf (n[i]))
+      return true;
+  return false;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/i386/cet-pr124366.c
@@ -0,0 +1,31 @@
+/* PR target/124366 */
+/* { dg-do assemble { target { cet && masm_intel } } } */
+/* { dg-options "-O2 -mshstk -masm=intel" } */
+
+#include <x86intrin.h>
+
+void
+wrssd (unsigned int x, void *y)
+{
+  _wrssd (x, y);
+}
+
+void
+wrussd (unsigned int x, void *y)
+{
+  _wrussd (x, y);
+}
+
+#ifdef __x86_64__
+void
+wrssq (unsigned long long x, void *y)
+{
+  _wrssq (x, y);
+}
+
+void
+wrussq (unsigned long long x, void *y)
+{
+  _wrussq (x, y);
+}
+#endif
--- a/src/gcc/testsuite/gcc.target/i386/cold-attribute-4.c
+++ b/src/gcc/testsuite/gcc.target/i386/cold-attribute-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-O2" } */
+/* { dg-options "-Oz" } */
 #include <string.h>
 
 int
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/i386/keylocker-pr123217.c
@@ -0,0 +1,13 @@
+/* PR target/123217 */
+/* { dg-do compile } */
+/* { dg-options "-mkl -O0" } */
+
+__attribute__((__vector_size__(16))) long long v, w;
+
+unsigned
+foo (void *p, void *q)
+{
+  unsigned x = __builtin_ia32_encodekey128_u32 (0U, v, p);
+  unsigned y = __builtin_ia32_encodekey256_u32 (0U, v, w, q);
+  return x + y;
+}
--- a/src/gcc/testsuite/gcc.target/i386/pieces-memcpy-18.c
+++ b/src/gcc/testsuite/gcc.target/i386/pieces-memcpy-18.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-O2 -march=sapphirerapids" } */
+/* { dg-options "-O2 -march=znver5" } */
 
 extern char *dst, *src;
 
--- a/src/gcc/testsuite/gcc.target/i386/pieces-memcpy-21.c
+++ b/src/gcc/testsuite/gcc.target/i386/pieces-memcpy-21.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-O2 -mtune=sapphirerapids -march=x86-64 -mavx2" } */
+/* { dg-options "-O2 -mtune=znver5 -march=x86-64 -mavx2" } */
 
 extern char *dst, *src;
 
--- a/src/gcc/testsuite/gcc.target/i386/pieces-memset-46.c
+++ b/src/gcc/testsuite/gcc.target/i386/pieces-memset-46.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-O2 -march=sapphirerapids" } */
+/* { dg-options "-O2 -march=znver5" } */
 
 extern char *dst;
 
--- a/src/gcc/testsuite/gcc.target/i386/pieces-memset-49.c
+++ b/src/gcc/testsuite/gcc.target/i386/pieces-memset-49.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-O2 -mtune=sapphirerapids -march=x86-64 -mavx2" } */
+/* { dg-options "-O2 -mtune=znver5 -march=x86-64 -mavx2" } */
 
 extern char *dst;
 
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/i386/pr120427-1.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mtune=sapphirerapids" } */
+/* { dg-final { scan-assembler-not "and\[lq\]?\[\\t \]+\\\$0, \[0-9\]*\\(" } } */
+
+struct __pthread_mutex_s
+{
+  int __lock;
+  unsigned int __count;
+  int __owner;
+  unsigned int __nusers;
+  int __kind;
+  short __spins;
+  short __elision;
+  void *p[2];
+};
+typedef union
+{
+  struct __pthread_mutex_s __data;
+  char __size[40];
+  long int __align;
+} pthread_mutex_t;
+typedef struct { pthread_mutex_t mutex; } __rtld_lock_recursive_t;
+void
+foo (__rtld_lock_recursive_t *lock, int i)
+{
+  lock[i] = (__rtld_lock_recursive_t) {{ { 0, 0, 0, 0, 1,
+      0, 0, { ((void *)0) , ((void *)0) } } }};
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/i386/pr120427-2.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mtune=sapphirerapids" } */
+/* { dg-final { scan-assembler-not "or\[lq\]?\[\\t \]+\\\$-1, \[0-9\]*\\(" } } */
+
+struct __pthread_mutex_s
+{
+  int __lock;
+  unsigned int __count;
+  int __owner;
+  unsigned int __nusers;
+  int __kind;
+  short __spins;
+  short __elision;
+  void *p[2];
+};
+typedef union
+{
+  struct __pthread_mutex_s __data;
+  char __size[40];
+  long int __align;
+} pthread_mutex_t;
+typedef struct { pthread_mutex_t mutex; } __rtld_lock_recursive_t;
+void
+foo (__rtld_lock_recursive_t *lock, int i)
+{
+  lock[i] = (__rtld_lock_recursive_t) {{ { -1, -1, -1, -1, 1,
+      -1, -1, { ((void *)-1) , ((void *)-1) } } }};
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/i386/pr120427-3.c
@@ -0,0 +1,45 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+typedef int SItype __attribute__ ((mode (SI)));
+typedef unsigned int USItype __attribute__ ((mode (SI)));
+typedef unsigned int UDItype __attribute__ ((mode (DI)));
+typedef UDItype __attribute__ ((__may_alias__)) bar_t;
+
+static inline __attribute__((__always_inline__)) SItype
+bar (const bar_t **p, SItype prec)
+{
+  bar_t mslimb = 0;
+  SItype i = 20;
+  SItype n = ((USItype) prec) % 4;
+  if (n)
+    {
+      prec -= n;
+      if (prec == 0)
+	return 1;
+      mslimb = (*p)[i];
+    }
+  while (mslimb == 0)
+    {
+      prec -= 4;
+      if (prec == 0)
+	return 1;
+      --i;
+      mslimb = (*p)[i];
+    }
+  return prec;
+}
+UDItype
+foo (const bar_t *i, SItype iprec)
+{
+  iprec = bar (&i, iprec);
+  USItype aiprec = iprec < 0 ? -iprec : iprec;
+  bar_t msb = *i;
+  UDItype mantissa = 0;
+  if (aiprec % 4)
+    msb &= ((bar_t) 1 << aiprec) - 1;
+  if (aiprec >= 54)
+    mantissa = (UDItype) msb << 32;
+
+  return (mantissa ^ (UDItype) 0x20000000000000);
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/i386/pr120427-4.c
@@ -0,0 +1,6 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+#include "cold-attribute-4.c"
+
+/* { dg-final { scan-assembler "movl" } } */
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/i386/pr120427-5.c
@@ -0,0 +1,10 @@
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-Oz" } */
+
+long long
+func1 (void)
+{
+  return -1;
+}
+/* { dg-final { scan-assembler-times "pushq\[ \\t\]+\\\$-1" 1 } } */
+/* { dg-final { scan-assembler-times "popq\[ \\t\]+%rax" 1 } } */
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/i386/pr120908.c
@@ -0,0 +1,16 @@
+/* { dg-do compile { target { lp64 && fpic } } } */
+/* { dg-options "-O2 -fpic -mtls-dialect=gnu -mcmodel=large" } */
+
+extern __thread long bar1;
+long *
+foo1 (void)
+{
+  return &bar1;
+}
+
+static __thread long bar2;
+long *
+foo2 (void)
+{
+  return &bar2;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/i386/pr121208-1a.c
@@ -0,0 +1,15 @@
+/* { dg-do compile { target *-*-linux* } } */
+/* { dg-options "-O2 -fPIC -mno-sse -mno-mmx -mno-80387 -mtls-dialect=gnu" } */
+
+extern __thread int bar;
+extern void func (void);
+
+__attribute__((no_caller_saved_registers))
+void
+foo (int error)
+{
+  bar = 1; /* { dg-error -mtls-dialect=gnu2 } */
+  if (error == 0)
+    func ();
+  bar = 0;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/i386/pr121208-1b.c
@@ -0,0 +1,4 @@
+/* { dg-do compile { target *-*-linux* } } */
+/* { dg-options "-O2 -fPIC -mno-sse -mno-mmx -mno-80387 -mtls-dialect=gnu2" } */
+
+#include "pr121208-1a.c"
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/i386/pr121208-2a.c
@@ -0,0 +1,17 @@
+/* { dg-do compile { target *-*-linux* } } */
+/* { dg-options "-O2 -fPIC -mtls-dialect=gnu" } */
+
+typedef unsigned int uword_t __attribute__ ((mode (__word__)));
+extern __thread int bar;
+extern void func (void);
+
+__attribute__((target("general-regs-only")))
+__attribute__((interrupt))
+void
+foo (void *frame, uword_t error)
+{
+  bar = 1; /* { dg-error -mtls-dialect=gnu2 } */
+  if (error == 0)
+    func ();
+  bar = 0;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/i386/pr121208-2b.c
@@ -0,0 +1,4 @@
+/* { dg-do compile { target *-*-linux* } } */
+/* { dg-options "-O2 -fPIC -mtls-dialect=gnu2" } */
+
+#include "pr121208-2a.c"
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/i386/pr121208-3a.c
@@ -0,0 +1,17 @@
+/* { dg-do compile { target *-*-linux* } } */
+/* { dg-options "-O2 -fPIC -mtls-dialect=gnu" } */
+
+typedef unsigned int uword_t __attribute__ ((mode (__word__)));
+extern __thread int bar;
+extern void func (void);
+
+__attribute__((target("general-regs-only")))
+__attribute__((interrupt))
+void
+foo (void *frame)
+{
+  bar = 1; /* { dg-error -mtls-dialect=gnu2 } */
+  if (frame == 0)
+    func ();
+  bar = 0;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/i386/pr121208-3b.c
@@ -0,0 +1,4 @@
+/* { dg-do compile { target *-*-linux* } } */
+/* { dg-options "-O2 -fPIC -mtls-dialect=gnu2" } */
+
+#include "pr121208-3a.c"
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/i386/pr121274.c
@@ -0,0 +1,24 @@
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-march=x86-64-v4 -O2" } */
+/* { dg-final { scan-assembler-not "vpextrq" } } */
+/* { dg-final { scan-assembler-not "vpinsrq" } } */
+
+typedef int v16si __attribute__((vector_size(64)));
+typedef int v4si __attribute__((vector_size(16)));
+
+v4si f(v16si x)
+{
+  return __builtin_shufflevector(x, x, 0, 1, 2, 3);
+}
+
+v4si g(v16si x)
+{
+return __builtin_shufflevector(x, x, 4, 5, 6, 7);
+}
+
+v4si f1(__int128 *x)
+{
+  __int128 t = *x;
+  asm("":"+x"(t));
+  return (v4si)t;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/i386/pr122104.c
@@ -0,0 +1,12 @@
+/* PR tree-optimization/122104 */
+/* { dg-do compile } */
+/* { dg-options "-O2 -fdump-tree-widening_mul-alias" } */
+/* { dg-final { scan-tree-dump "\\.MUL_OVERFLOW" "widening_mul" } } */
+/* { dg-final { scan-tree-dump-not "# RANGE \\\[irange\\\] unsigned int \\\[1, " "widening_mul" } } */
+
+int
+foo (int x)
+{
+  int r = (unsigned) x * 35;
+  return x && ((unsigned) r / x) != 35U;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/i386/pr123121.c
@@ -0,0 +1,57 @@
+/* { dg-do run } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-options "-O3 -fno-ipa-cp -fschedule-insns" } */
+
+int a[256], d, e, f, g, h, j, v[] = {0, -6, 0};;
+unsigned c;
+unsigned k(int l, unsigned m) { return (l & 6777215) ^ a[(l ^ m) & 55]; }
+int n(int l, int m[]) {
+  int i = 0;
+  for (; i < l; ++i) {
+    e = c >> 8 ^ a[m[i] & 255];
+    d = e;
+    d = k(d, m[i] >> 8 & 255);
+    d = k(d, m[i] >> 6);
+    f = (d & 6777215) ^ a[d & 5];
+    c = f;
+  }
+  return f;
+}
+int o() {
+  n(8, (int[]){g});
+  return n(6, (int[]){h});
+}
+int p(int l, int m[], int q, int r) {
+  int s = r = j + 1;
+  s = -(4 % q - 1);
+  if (r)
+    goto t;
+ ad:
+  l = 6 - l;
+  if (l)
+    goto ae;
+ t:
+  m[0] = s;
+  j = r;
+  goto af;
+ ae:
+  if (o())
+    goto ad;
+ af:
+  r = -s - m[1] - 8;
+  s = 1 % m[0] - s;
+  m[1] = 1 / r;
+  int a[] = {l, m[0], m[1], m[2], q, r, r, s};
+  return n(8, a);
+}
+int main() {
+  for (int i = 0; i < 256; i++) {
+    unsigned b = i;
+    if (i & 1)
+      b = b >> 1 ^ 3988292384;
+    a[i] = b;
+  }
+  if (p(1, v, 5, 0) / 100000)
+    p(1, 0, 5, 0);
+  return 0;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/i386/pr123484.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512vl -mavx512fp16 " }*/
+typedef __attribute__((__vector_size__ (8))) _Float16 F;
+int a, b;
+F f, *p;
+
+void
+foo ()
+{
+  do
+    {
+      f /= b ? *p : (F) {40};
+l:
+    }
+  while (a);
+  goto l;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/i386/pr124056.c
@@ -0,0 +1,61 @@
+/* PR middle-end/124056 */
+/* { dg-do run } */
+/* { dg-options "-O2 -masm=att" } */
+
+int v;
+
+[[gnu::noipa]] void
+foo (void)
+{
+  v = 42;
+}
+
+[[gnu::noipa]] void
+bar (void)
+{
+  v = 43;
+}
+
+[[gnu::noipa]] int
+baz (void)
+{
+  _Bool err;
+  __asm goto ("movl %1, %%ecx\n\t"
+	       "test %%ecx, %%ecx\n\t"
+	       "js 1f\n\t"
+	       "jmp %l[lab]\n\t"
+	    "1: cmpl $-1, %%ecx"
+	       : "=@ccz" (err) : "m" (v) : "ecx" : lab);
+  if (err)
+    {
+      bar ();
+      return -1;
+    }
+  return 0;
+
+ lab:
+  if (err)
+    {
+      foo ();
+      return -2;
+    }
+
+  return 1;
+}
+
+int
+main ()
+{
+  v = 0;
+  if (baz () != -2 || v != 42)
+    __builtin_abort ();
+  v = 1;
+  if (baz () != 1 || v != 1)
+    __builtin_abort ();
+  v = -1;
+  if (baz () != -1 || v != 43)
+    __builtin_abort ();
+  v = -2;
+  if (baz () != 0 || v != -2)
+    __builtin_abort ();
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/i386/user_msr-pr123217.c
@@ -0,0 +1,10 @@
+/* PR target/123217 */
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-musermsr -O0" } */
+
+unsigned long long
+foo (unsigned long long x)
+{
+  unsigned long long y = __builtin_ia32_urdmsr (x);
+  return y;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/loongarch/attr-model-6.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-mexplicit-relocs=none -mcmodel=normal -O2 -fno-pic" } */
+/* { dg-final { scan-assembler "la.local\t\\\$r\[0-9\]+,\\\$r\[0-9\]+,x" } } */
+/* { dg-final { scan-assembler "la.local\t\\\$r\[0-9\]+,y" } } */
+/* { dg-final { scan-assembler "la.local\t\\\$r\[0-9\]+,\\\$r\[0-9\]+,counter" } } */
+
+#define ATTR_MODEL_TEST
+#include "attr-model-test.c"
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/loongarch/fnmam4-vec.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-options "-Ofast -mlasx -ftree-vectorize" } */
+/* { dg-require-effective-target loongarch_asx } */
+
+void
+foo (float *u, float x, float *y, float z)
+{
+  int i;
+  for (i = 0; i < 1024; i++)
+    *(u++) = (x - y[i] * z);
+}
+
+/* { dg-final { scan-assembler-not "\tvori.b"} } */
+/* { dg-final { scan-assembler-not "\txvori.b"} } */
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/loongarch/pr121064.c
@@ -0,0 +1,38 @@
+/* { dg-require-effective-target loongarch_sx_hw } */
+/* { dg-do run } */
+/* { dg-options "-march=loongarch64 -mfpu=64 -mlsx -O3" } */
+
+typedef __INT32_TYPE__ int32_t;
+typedef unsigned __INT32_TYPE__ uint32_t;
+
+__attribute__ ((noipa)) static int32_t
+long_filter_ehigh_3830_1 (int32_t *buffer, int length)
+{
+  int i, j;
+  int32_t dotprod = 0;
+  int32_t delay[4] = { 0 };
+  uint32_t coeffs[4] = { 0 };
+
+  for (i = 0; i < length; i++)
+    {
+      dotprod = 0;
+      for (j = 3; j >= 0; j--)
+        {
+          dotprod += delay[j] * coeffs[j];
+          coeffs[j] += ((delay[j] >> 31) | 1);
+        }
+      for (j = 3; j > 0; j--)
+        delay[j] = delay[j - 1];
+      delay[0] = buffer[i];
+    }
+
+  return dotprod;
+}
+
+int
+main ()
+{
+  int32_t buffer[] = { -1, 1 };
+  if (long_filter_ehigh_3830_1 (buffer, 2) != -1)
+    __builtin_trap ();
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/loongarch/pr121542.c
@@ -0,0 +1,54 @@
+/* { dg-do compile } */
+/* { dg-options "-mrecip=all  -mfrecipe -mabi=lp64d -march=loongarch64 -mfpu=64 -msimd=lasx -Ofast" } */
+
+typedef long unsigned int STRLEN;
+typedef struct sv SV;
+struct sv
+{
+  void *sv_any;
+  unsigned int sv_refcnt;
+  unsigned int sv_flags;
+};
+typedef struct xpv XPV;
+struct xpv
+{
+  char *xpv_pv;
+  STRLEN xpv_cur;
+  STRLEN xpv_len;
+};
+typedef unsigned long UV;
+extern char *PL_bufend;
+extern char *d;
+SV *Perl_newSV (STRLEN len);
+
+char *
+S_scan_const (char *start)
+{
+  register char *send = PL_bufend;
+  SV *sv = Perl_newSV (send - start);
+  register char *s = start;
+  UV uv;
+
+  while (s < send)
+    {
+      if (!(((UV)(uv)) < 0x80))
+        {
+          int hicount = 0;
+          unsigned char *c;
+          for (c = (unsigned char *)((XPV *)(sv)->sv_any)->xpv_pv;
+               c < (unsigned char *)d; c++)
+            {
+              if (!(((UV)(*c)) < 0x80))
+                {
+                  hicount++;
+                }
+            }
+          d += hicount;
+          *d++ = (char)uv;
+        }
+
+      s++;
+    }
+
+  return s;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/loongarch/pr122097.c
@@ -0,0 +1,270 @@
+/* { dg-do compile } */
+/* { dg-options "-O3 -mabi=lp64d -mlsx" } */
+
+typedef long unsigned int size_t;
+typedef unsigned char simde__mmask8;
+typedef long simde__m128i __attribute__ ((__aligned__ ((16))))
+__attribute__ ((__vector_size__ (16))) __attribute__ ((__may_alias__));
+typedef union
+{
+
+  __attribute__ ((__aligned__ ((16)))) long i64
+      __attribute__ ((__vector_size__ (16))) __attribute__ ((__may_alias__));
+} simde__m128i_private;
+typedef double simde_float64;
+typedef simde_float64 simde__m128d __attribute__ ((__aligned__ ((16))))
+__attribute__ ((__vector_size__ (16))) __attribute__ ((__may_alias__));
+typedef long int int_fast32_t;
+typedef union
+{
+
+  __attribute__ ((__aligned__ ((16)))) int_fast32_t i32f
+      __attribute__ ((__vector_size__ (16))) __attribute__ ((__may_alias__));
+  __attribute__ ((__aligned__ ((16)))) long i64
+      __attribute__ ((__vector_size__ (16))) __attribute__ ((__may_alias__));
+  __attribute__ ((__aligned__ ((16)))) simde_float64 f64
+      __attribute__ ((__vector_size__ (16))) __attribute__ ((__may_alias__));
+} simde__m128d_private;
+__attribute__ ((__always_inline__)) inline static simde__m128d
+simde__m128d_from_private (simde__m128d_private v)
+{
+  simde__m128d r;
+  __builtin_memcpy (&r, &v, sizeof (r));
+  return r;
+}
+
+__attribute__ ((__always_inline__)) inline static simde__m128d
+simde_mm_set_pd (simde_float64 e1, simde_float64 e0)
+{
+
+  simde__m128d_private r_;
+  r_.f64[0] = e0;
+  r_.f64[1] = e1;
+
+  return simde__m128d_from_private (r_);
+}
+__attribute__ ((__always_inline__)) inline static simde__m128i
+simde_mm_castpd_si128 (simde__m128d a)
+{
+  simde__m128i r;
+  __builtin_memcpy (&r, &a, sizeof (a));
+  return r;
+}
+
+__attribute__ ((__always_inline__)) inline static simde__m128i
+simde__m128i_from_private (simde__m128i_private v)
+{
+  simde__m128i r;
+  __builtin_memcpy (&r, &v, sizeof (r));
+  return r;
+}
+
+__attribute__ ((__always_inline__)) inline static simde__m128i_private
+simde__m128i_to_private (simde__m128i v)
+{
+  simde__m128i_private r;
+  __builtin_memcpy (&r, &v, sizeof (r));
+  return r;
+}
+__attribute__ ((__always_inline__)) inline static simde__m128d
+simde_mm_castsi128_pd (simde__m128i a)
+{
+  simde__m128d r;
+  __builtin_memcpy (&r, &a, sizeof (a));
+  return r;
+}
+
+__attribute__ ((__always_inline__)) inline static simde__m128i
+simde_mm_mask_mov_epi64 (simde__m128i src, simde__mmask8 k, simde__m128i a)
+{
+
+  simde__m128i_private src_ = simde__m128i_to_private (src),
+                       a_ = simde__m128i_to_private (a), r_;
+
+  for (size_t i = 0; i < (sizeof (r_.i64) / sizeof (r_.i64[0])); i++)
+    {
+      r_.i64[i] = ((k >> i) & 1) ? a_.i64[i] : src_.i64[i];
+    }
+
+  return simde__m128i_from_private (r_);
+}
+
+__attribute__ ((__always_inline__)) inline static simde__m128d
+simde_mm_mask_mov_pd (simde__m128d src, simde__mmask8 k, simde__m128d a)
+{
+  return simde_mm_castsi128_pd (simde_mm_mask_mov_epi64 (
+      simde_mm_castpd_si128 (src), k, simde_mm_castpd_si128 (a)));
+}
+
+static double
+simde_test_f64_precision_to_slop (int precision)
+{
+  return __builtin_expect (!!(precision == 0x7fffffff), 0)
+             ? 0.0
+             : __builtin_pow (10.0, -((double)(precision)));
+}
+__attribute__ ((__always_inline__)) inline static void
+simde_mm_storeu_pd (simde_float64 *mem_addr, simde__m128d a)
+{
+
+  __builtin_memcpy (mem_addr, &a, sizeof (a));
+}
+int simde_test_equal_f64 (simde_float64 a, simde_float64 b,
+                          simde_float64 slop);
+void simde_test_debug_printf_ (const char *format, ...);
+static int
+simde_assert_equal_vf64_ (size_t vec_len, simde_float64 const a[(vec_len)],
+                          simde_float64 const b[(vec_len)], simde_float64 slop,
+                          const char *filename, int line, const char *astr,
+                          const char *bstr)
+{
+  for (size_t i = 0; i < vec_len; i++)
+    {
+      if (__builtin_expect (!!(!simde_test_equal_f64 (a[i], b[i], slop)), 0))
+        {
+          simde_test_debug_printf_ (
+              "%s:%d: assertion failed: %s[%zu] ~= %s[%zu] (%f ~= %f)\n",
+              filename, line, astr, i, bstr, i, ((double)(a[i])),
+              ((double)(b[i])));
+          return 1;
+        }
+    }
+  return 0;
+}
+static int
+simde_test_x86_assert_equal_f64x2_ (simde__m128d a, simde__m128d b,
+                                    simde_float64 slop, const char *filename,
+                                    int line, const char *astr,
+                                    const char *bstr)
+{
+  simde_float64 a_[sizeof (a) / sizeof (simde_float64)],
+      b_[sizeof (a) / sizeof (simde_float64)];
+  simde_mm_storeu_pd (a_, a);
+  simde_mm_storeu_pd (b_, b);
+  return simde_assert_equal_vf64_ (sizeof (a_) / sizeof (a_[0]), a_, b_, slop,
+                                   filename, line, astr, bstr);
+}
+__attribute__ ((__always_inline__)) inline static simde__m128d_private
+simde__m128d_to_private (simde__m128d v)
+{
+  simde__m128d_private r;
+  __builtin_memcpy (&r, &v, sizeof (r));
+  return r;
+}
+__attribute__ ((__always_inline__)) inline static simde__m128d
+simde_mm_min_pd (simde__m128d a, simde__m128d b)
+{
+
+  simde__m128d_private r_, a_ = simde__m128d_to_private (a),
+                           b_ = simde__m128d_to_private (b);
+
+  for (size_t i = 0; i < (sizeof (r_.f64) / sizeof (r_.f64[0])); i++)
+    {
+      r_.f64[i] = (a_.f64[i] < b_.f64[i]) ? a_.f64[i] : b_.f64[i];
+    }
+
+  return simde__m128d_from_private (r_);
+}
+
+__attribute__ ((__always_inline__)) inline static simde__m128d
+simde_mm_max_pd (simde__m128d a, simde__m128d b)
+{
+
+  simde__m128d_private r_, a_ = simde__m128d_to_private (a),
+                           b_ = simde__m128d_to_private (b);
+
+  for (size_t i = 0; i < (sizeof (r_.f64) / sizeof (r_.f64[0])); i++)
+    {
+      r_.f64[i] = (a_.f64[i] > b_.f64[i]) ? a_.f64[i] : b_.f64[i];
+    }
+
+  return simde__m128d_from_private (r_);
+}
+
+__attribute__ ((__always_inline__)) inline static simde__m128d
+simde_x_mm_abs_pd (simde__m128d a)
+{
+
+  simde__m128d_private r_, a_ = simde__m128d_to_private (a);
+  for (size_t i = 0; i < (sizeof (r_.f64) / sizeof (r_.f64[0])); i++)
+    {
+      r_.f64[i] = __builtin_fabs (a_.f64[i]);
+    }
+
+  return simde__m128d_from_private (r_);
+}
+__attribute__ ((__always_inline__)) inline static simde__m128d
+simde_mm_cmple_pd (simde__m128d a, simde__m128d b)
+{
+
+  simde__m128d_private r_, a_ = simde__m128d_to_private (a),
+                           b_ = simde__m128d_to_private (b);
+
+  r_.i64 = ((__typeof__ (r_.i64))((a_.f64 <= b_.f64)));
+  return simde__m128d_from_private (r_);
+}
+
+__attribute__ ((__always_inline__)) inline static simde__m128d
+simde_x_mm_select_pd (simde__m128d a, simde__m128d b, simde__m128d mask)
+{
+  simde__m128d_private r_, a_ = simde__m128d_to_private (a),
+                           b_ = simde__m128d_to_private (b),
+                           mask_ = simde__m128d_to_private (mask);
+
+  r_.i64 = a_.i64 ^ ((a_.i64 ^ b_.i64) & mask_.i64);
+  return simde__m128d_from_private (r_);
+}
+simde__m128d simde_mm_cmpge_pd (simde__m128d a, simde__m128d b);
+
+simde__m128d
+simde_x_mm_copysign_pd (simde__m128d dest, simde__m128d src)
+{
+  simde__m128d_private r_, dest_ = simde__m128d_to_private (dest),
+                           src_ = simde__m128d_to_private (src);
+  for (size_t i = 0; i < (sizeof (r_.f64) / sizeof (r_.f64[0])); i++)
+    {
+      r_.f64[i] = __builtin_copysign (dest_.f64[i], src_.f64[i]);
+    }
+
+  return simde__m128d_from_private (r_);
+}
+simde__m128d simde_mm_or_pd (simde__m128d a, simde__m128d b);
+
+simde__m128d simde_mm_set1_pd (simde_float64 a);
+
+__attribute__ ((__always_inline__)) inline static simde__m128d
+simde_mm_range_pd (simde__m128d a, simde__m128d b, int imm8)
+{
+  simde__m128d r;
+
+  r = simde_x_mm_select_pd (
+      b, a, simde_mm_cmple_pd (simde_x_mm_abs_pd (a), simde_x_mm_abs_pd (b)));
+
+  r = simde_x_mm_copysign_pd (r, a);
+
+  return r;
+}
+int
+test_simde_mm_mask_range_pd (void)
+{
+
+  simde__m128d src, a, b, e, r;
+
+  src = simde_mm_set_pd (-2.92, -85.39);
+  a = simde_mm_set_pd (-47.59, -122.31);
+  b = simde_mm_set_pd (877.42, 69.15);
+  e = simde_mm_set_pd (-47.59, -69.15);
+  r = simde_mm_mask_mov_pd (src, 143, simde_mm_range_pd (a, b, 2));
+  do
+    {
+      if (simde_test_x86_assert_equal_f64x2_ (
+              r, e, simde_test_f64_precision_to_slop (1),
+              "../test/x86/avx512/range.c", 1454, "r", "e"))
+        {
+          return 1;
+        }
+    }
+  while (0);
+
+  return 0;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/loongarch/pr122695-1.c
@@ -0,0 +1,22 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mlasx" } */
+/* { dg-require-effective-target loongarch_asx_hw } */
+
+[[gnu::vector_size (32)]] char a, b, c;
+
+[[gnu::noipa]] void
+test (void)
+{
+  a = __builtin_shuffle (a, b, c);
+}
+
+int
+main (void)
+{
+  a = (typeof (a)){} + 5;
+  b = (typeof (a)){} + 6;
+  c = (typeof (a)){} + 64;
+  test ();
+  if (a[0] != 5)
+    __builtin_trap ();
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/loongarch/pr122695-2.c
@@ -0,0 +1,22 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mlasx" } */
+/* { dg-require-effective-target loongarch_asx_hw } */
+
+[[gnu::vector_size(32)]] short a, b, c;
+
+[[gnu::noipa]] void
+test (void)
+{
+  a = __builtin_shuffle(a, b, c) + c;
+}
+
+int
+main (void)
+{
+  a = (typeof (a)){} + 1;
+  b = (typeof (b)){} + 2;
+  c = (typeof (c)){} + 128;
+  test ();
+  if (a[0] != 129)
+    __builtin_trap ();
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/loongarch/vector/lasx/pr123521.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-O1 -msimd=lasx" } */
+
+typedef long long v4i64 __attribute__ ((vector_size (32), aligned (32)));
+extern long long *x_si;
+v4i64
+test (void)
+{
+  v4i64 a = { x_si[1], x_si[0], 0x411, 0x411 };
+  return a;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/loongarch/vector/lasx/pr123766.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mlasx  -Werror -Wextra" } */
+
+#include <lasxintrin.h>
+
+__m256i v = {0, 0, 0, 0};
+
+#define TEST(NAME)			  \
+  void test_##NAME (void)		  \
+  {					  \
+    long long r[4];			  \
+    __lasx_##NAME (v, r, 0);		  \
+  }
+
+TEST (xvst);
+TEST (xvstx);
+
+#define TEST1(NAME, TYPE, NUM)		  \
+  void test_##NAME (void)		  \
+  {					  \
+    TYPE r[NUM];			  \
+    __lasx_##NAME (v, r, 0, 0);		  \
+  }
+
+TEST1 (xvstelm_b, char, 32);
+TEST1 (xvstelm_h, short, 16);
+TEST1 (xvstelm_w, int, 8);
+TEST1 (xvstelm_d, long long, 4);
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/loongarch/vector/lsx/pr123766.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mlsx  -Werror -Wextra" } */
+
+#include <lsxintrin.h>
+
+__m128i v = {0, 0};
+
+#define TEST(NAME)			  \
+  void test_##NAME (void)		  \
+  {					  \
+    long long r[2];			  \
+    __lsx_##NAME (v, r, 0);		  \
+  }
+
+TEST (vst);
+TEST (vstx);
+
+#define TEST1(NAME, TYPE, NUM)		  \
+  void test_##NAME (void)		  \
+  {					  \
+    TYPE r[NUM];			  \
+    __lsx_##NAME (v, r, 0, 0);		  \
+  }
+
+TEST1 (vstelm_b, char, 16);
+TEST1 (vstelm_h, short, 8);
+TEST1 (vstelm_w, int, 4);
+TEST1 (vstelm_d, long long, 2);
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/loongarch/vector/lsx/pr123807.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-O0 -msimd=lsx" } */
+
+typedef long long v2i64 __attribute__ ((__vector_size__ (16)));
+v2i64 a, b;
+void
+test (int imm8)
+{
+  b = a << imm8;
+}
--- a/src/gcc/testsuite/gcc.target/powerpc/builtin_altivec_tr_stxvr_runnable.c
+++ b/src/gcc/testsuite/gcc.target/powerpc/builtin_altivec_tr_stxvr_runnable.c
@@ -27,10 +27,10 @@ int
 main () {
   int i;
   signed long sl;
-  signed char sc, expected_sc;
-  signed short ss, expected_ss;
-  signed int si, expected_si;
-  signed long long int sll, expected_sll;
+  signed char sc[2], expected_sc;
+  signed short ss[2], expected_ss;
+  signed int si[2], expected_si;
+  signed long long int sll[2], expected_sll;
   signed char *psc;
   signed short *pss;
   signed int *psi;
@@ -41,56 +41,56 @@ main () {
   printf("Data to store [%d] = 0x%llx %llx\n", i, val.ull[1], val.ull[0]);
 #endif
 
-  psc = &sc;
-  pss = &ss;
-  psi = &si;
-  psll = &sll;
+  psc = &sc[0];
+  pss = &ss[0];
+  psi = &si[0];
+  psll = &sll[0];
 
   sl = 1;
-  sc = 0xA1;
+  sc[0] = 0xA1;
   expected_sc = 0xA1;
   __builtin_altivec_tr_stxvrbx (store_data, sl, psc);
 
-  if (expected_sc != sc & 0xFF)
+  if (expected_sc != sc[0] & 0xFF)
 #if DEBUG
     printf(" ERROR: Signed char = 0x%x doesn't match expected value 0x%x\n",
-	   sc & 0xFF, expected_sc);
+	   sc[0] & 0xFF, expected_sc);
 #else
     abort();
 #endif
 
-  ss = 0x52;
+  ss[0] = 0x52;
   expected_ss = 0x1752;
   __builtin_altivec_tr_stxvrhx (store_data, sl, pss);
 
-  if (expected_ss != ss & 0xFFFF)
+  if (expected_ss != ss[0] & 0xFFFF)
 #if DEBUG
     printf(" ERROR: Signed short = 0x%x doesn't match expected value 0x%x\n",
-	   ss, expected_ss) & 0xFFFF;
+	   ss[0], expected_ss) & 0xFFFF;
 #else
     abort();
 #endif
 
-  si = 0x21;
+  si[0] = 0x21;
   expected_si = 0x54321721;
   __builtin_altivec_tr_stxvrwx (store_data, sl, psi);
 
-  if (expected_si != si)
+  if (expected_si != si[0])
 #if DEBUG
     printf(" ERROR: Signed int = 0x%x doesn't match expected value 0x%x\n",
-	   si, expected_si);
+	   si[0], expected_si);
 #else
     abort();
 #endif
 
-  sll = 0x12FFULL;
+  sll[0] = 0x12FFULL;
   expected_sll = 0xdcba9876543217FF;
   __builtin_altivec_tr_stxvrdx (store_data, sl, psll);
 
-  if (expected_sll != sll)
+  if (expected_sll != sll[0])
 #if DEBUG
     printf(" ERROR: Signed long long int = 0x%llx doesn't match expected value 0x%llx\n",
-	   sll, expected_sll);
+	   sll[0], expected_sll);
 #else
     abort();
 #endif
--- a/src/gcc/testsuite/gcc.target/powerpc/builtins-1-p9-runnable.c
+++ b/src/gcc/testsuite/gcc.target/powerpc/builtins-1-p9-runnable.c
@@ -16,13 +16,8 @@ int main() {
   vfb = (vector float){10.0, -2.0, 70.0, 999.0 };
 
   /* Expected results.  */
-#ifdef __BIG_ENDIAN__
-  vexpected = (vector unsigned short) { 0x4900, 0xc000, 0x5460, 0x63ce,
-					0x3666, 0x3e66, 0x4d00, 0x563e };
-#else
   vexpected = (vector unsigned short) { 0x3666, 0x3e66, 0x4d00, 0x563e,
 					0x4900, 0xc000, 0x5460, 0x63ce };
-#endif
 
 /*
      vresult = vec_pack_to_short_fp32 (vfa, vfb);
--- a/src/gcc/testsuite/gcc.target/powerpc/float128-cmp2-runnable.c
+++ b/src/gcc/testsuite/gcc.target/powerpc/float128-cmp2-runnable.c
@@ -1,6 +1,5 @@
 /* { dg-do run } */
-/* { dg-require-effective-target ppc_float128_sw } */
-/* { dg-require-effective-target p9vector_hw } */
+/* { dg-require-effective-target ppc_float128_hw } */
 /* { dg-options "-O2 -mdejagnu-cpu=power9 " } */
 
 #define NAN_Q __builtin_nanq ("")
--- a/src/gcc/testsuite/gcc.target/powerpc/vsx-builtin-7.c
+++ b/src/gcc/testsuite/gcc.target/powerpc/vsx-builtin-7.c
@@ -1,7 +1,15 @@
 /* { dg-do compile { target { powerpc*-*-* } } } */
 /* { dg-skip-if "" { powerpc*-*-darwin* } } */
 /* { dg-require-effective-target powerpc_vsx_ok } */
-/* { dg-options "-O2 -mdejagnu-cpu=power7 -fno-inline-functions" } */
+/* { dg-options "-O2 -mdejagnu-cpu=power7 -fno-inline-functions -fno-ipa-icf" } */
+
+/* PR testsuite/119382
+   Note: Added -fno-ipa-icf to disable Interprocedural Identical Code
+   Folding (ICF). Without this, insert_di_0_v2 is merged with insert_di_0
+   due to improved alias analysis introduced in commit r15-7961-gdc47161c1f32c3.
+   This results in the compiler replacing insert_di_0_v2 with a tail call to
+   insert_di_0, altering expected test behavior. Disabling ICF ensures correct
+   execution of the test.  */
 
 /* Test simple extract/insert/slat operations.  Make sure all types are
    supported with various options.  */
--- a/src/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-1.c
+++ b/src/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-1.c
@@ -4,8 +4,6 @@
 /* { dg-options "-mdejagnu-cpu=power7 -O2 -ftree-vectorize -fno-tree-loop-distribute-patterns -fno-vect-cost-model -fdump-tree-vect-details" } */
 
 /* Taken from vect/vect-align-1.c.  */
-#include <stdlib.h>
-#include <stdarg.h>
 
 /* Compile time known misalignment. Cannot use loop peeling to align
    the store.  */
@@ -28,23 +26,6 @@ main1 (struct foo * __restrict__ p)
     {
       p->y[i] = x[i];
     }
-
-  /* check results:  */
-  for (i = 0; i < N; i++)
-    {
-      if (p->y[i] != x[i])
-	abort ();
-    }
-  return 0;
-}
-
-
-int main (void)
-{
-  int i;
-  struct foo *p = malloc (2*sizeof (struct foo));
-  
-  main1 (p);
   return 0;
 }
 
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-10.c
@@ -0,0 +1,39 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -ftree-vectorize -fno-vect-cost-model -fdump-tree-vect-details" } */
+
+/* Taken from vect/vect-95.c.  */
+#include <stdlib.h>
+#include <stdarg.h>
+
+#include "vsx-vectorize-2.c"
+
+__attribute__ ((noinline))
+void bar (float *pd, float *pa, float *pb, float *pc) 
+{
+  int i;
+
+  /* check results:  */
+  for (i = 0; i < N; i++)
+    {
+      if (pa[i] != (pb[i] * pc[i]))
+	abort ();
+      if (pd[i] != 5.0)
+	abort ();
+    }
+
+  return;
+}
+
+int main (void)
+{
+  int i;
+  float a[N] __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__)));
+  float d[N+1] __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__)));
+  float b[N] = {0,3,6,9,12,15,18,21,24,27,30,33,36,39,42,45,48,51,54,57};
+  float c[N] = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19};
+
+  main1 (N,&d[1],a,b,c);
+  main1 (N-2,&d[1],a,b,c);
+
+  return 0;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-11.c
@@ -0,0 +1,36 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -ftree-vectorize -fno-vect-cost-model -fdump-tree-vect-details" } */
+
+/* Taken from vect/vect-95.c.  */
+#include <stdlib.h>
+#include <stdarg.h>
+
+#include "vsx-vectorize-3.c"
+
+__attribute__ ((noinline))
+void bar (short *pa, short *pb, short *pc) 
+{
+  int i;
+
+  /* check results:  */
+  for (i = 0; i < N; i++)
+    {
+      if (pa[i] != (pb[i] * pc[i]))
+	abort ();
+    }
+
+  return;
+}
+
+int main (void)
+{
+  int i;
+  short a[N] __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__)));
+  short b[N] = {0,3,6,9,12,15,18,21,24,27,30,33,36,39,42,45,48,51,54,57};
+  short c[N] = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19};
+
+  main1 (N,a,b,c);
+  main1 (N-2,a,b,c);
+
+  return 0;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-12.c
@@ -0,0 +1,36 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -ftree-vectorize -fno-vect-cost-model -fdump-tree-vect-details" } */
+
+/* Taken from vect/vect-95.c.  */
+#include <stdlib.h>
+#include <stdarg.h>
+
+#include "vsx-vectorize-4.c"
+
+__attribute__ ((noinline))
+void bar (double *pa, double *pb, double *pc) 
+{
+  int i;
+
+  /* check results:  */
+  for (i = 0; i < N; i++)
+    {
+      if (pa[i] != (pb[i] * pc[i]))
+	abort ();
+    }
+
+  return;
+}
+
+int main (void)
+{
+  int i;
+  double a[N] __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__)));
+  double b[N] = {0,3,6,9,12,15,18,21,24,27,30,33,36,39,42,45,48,51,54,57};
+  double c[N] = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19};
+
+  main1 (N,a,b,c);
+  main1 (N-2,a,b,c);
+
+  return 0;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-13.c
@@ -0,0 +1,36 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -ftree-vectorize -fno-vect-cost-model -fdump-tree-vect-details" } */
+
+/* Taken from vect/vect-95.c.  */
+#include <stdlib.h>
+#include <stdarg.h>
+
+#include "vsx-vectorize-5.c"
+
+__attribute__ ((noinline))
+void bar (char *pa, char *pb, char *pc) 
+{
+  int i;
+
+  /* check results:  */
+  for (i = 0; i < N; i++)
+    {
+      if (pa[i] != (pb[i] + pc[i]))
+	abort ();
+    }
+
+  return;
+}
+
+int main (void)
+{
+  int i;
+  char a[N] __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__)));
+  char b[N] = {0,3,6,9,12,15,18,21,24,27,30,33,36,39,42,45,48,51,54,57};
+  char c[N] = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19};
+
+  main1 (N,a,b,c);
+  main1 (N-2,a,b,c);
+
+  return 0;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-14.c
@@ -0,0 +1,39 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -ftree-vectorize -fno-vect-cost-model -fdump-tree-vect-details" } */
+
+/* Taken from vect/vect-95.c.  */
+#include <stdlib.h>
+#include <stdarg.h>
+
+#include "vsx-vectorize-6.c"
+
+__attribute__ ((noinline))
+void bar (double *pd, double *pa, double *pb, double *pc) 
+{
+  int i;
+
+  /* check results:  */
+  for (i = 0; i < N; i++)
+    {
+      if (pa[i] != (pb[i] * pc[i]))
+	abort ();
+      if (pd[i] != 5.0)
+	abort ();
+    }
+
+  return;
+}
+
+int main (void)
+{
+  int i;
+  double a[N] __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__)));
+  double d[N+1] __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__)));
+  double b[N] = {0,3,6,9,12,15,18,21,24,27,30,33,36,39,42,45,48,51,54,57};
+  double c[N] = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19};
+
+  main1 (N,&d[1],a,b,c);
+  main1 (N-2,&d[1],a,b,c);
+
+  return 0;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-15.c
@@ -0,0 +1,39 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -ftree-vectorize -fno-vect-cost-model -fdump-tree-vect-details" } */
+
+/* Taken from vect/vect-95.c.  */
+#include <stdlib.h>
+#include <stdarg.h>
+
+#include "vsx-vectorize-7.c"
+
+__attribute__ ((noinline))
+void bar (int *pd, int *pa, int *pb, int *pc) 
+{
+  int i;
+
+  /* check results:  */
+  for (i = 0; i < N; i++)
+    {
+      if (pa[i] != (pb[i] * pc[i]))
+	abort ();
+      if (pd[i] != 5.0)
+	abort ();
+    }
+
+  return;
+}
+
+int main (void)
+{
+  int i;
+  int a[N] __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__)));
+  int d[N+1] __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__)));
+  int b[N] = {0,3,6,9,12,15,18,21,24,27,30,33,36,39,42,45,48,51,54,57};
+  int c[N] = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19};
+
+  main1 (N,&d[1],a,b,c);
+  main1 (N-2,&d[1],a,b,c);
+
+  return 0;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-16.c
@@ -0,0 +1,39 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -ftree-vectorize -fno-vect-cost-model -fdump-tree-vect-details" } */
+
+/* Taken from vect/vect-95.c.  */
+#include <stdlib.h>
+#include <stdarg.h>
+
+#include "vsx-vectorize-8.c"
+
+__attribute__ ((noinline))
+void bar (short *pd, short *pa, short *pb, short *pc) 
+{
+  int i;
+
+  /* check results:  */
+  for (i = 0; i < N; i++)
+    {
+      if (pa[i] != (pb[i] * pc[i]))
+	abort ();
+      if (pd[i] != 5.0)
+	abort ();
+    }
+
+  return;
+}
+
+int main (void)
+{
+  int i;
+  short a[N] __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__)));
+  short d[N+1] __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__)));
+  short b[N] = {0,3,6,9,12,15,18,21,24,27,30,33,36,39,42,45,48,51,54,57};
+  short c[N] = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19};
+
+  main1 (N,&d[1],a,b,c);
+  main1 (N-2,&d[1],a,b,c);
+
+  return 0;
+}
--- a/src/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-2.c
+++ b/src/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-2.c
@@ -4,28 +4,10 @@
 /* { dg-options "-mdejagnu-cpu=power7 -O2 -ftree-vectorize -fno-vect-cost-model -fdump-tree-vect-details" } */
 
 /* Taken from vect/vect-95.c.  */
-#include <stdlib.h>
-#include <stdarg.h>
 
 #define N 256
 
-__attribute__ ((noinline))
-void bar (float *pd, float *pa, float *pb, float *pc) 
-{
-  int i;
-
-  /* check results:  */
-  for (i = 0; i < N; i++)
-    {
-      if (pa[i] != (pb[i] * pc[i]))
-	abort ();
-      if (pd[i] != 5.0)
-	abort ();
-    }
-
-  return;
-}
-
+void bar (float *pd, float *pa, float *pb, float *pc);
 
 __attribute__ ((noinline)) int
 main1 (int n, float * __restrict__ pd, float * __restrict__ pa, float * __restrict__ pb, float * __restrict__ pc)
@@ -43,20 +25,6 @@ main1 (int n, float * __restrict__ pd, float * __restrict__ pa, float * __restri
   return 0;
 }
 
-int main (void)
-{
-  int i;
-  float a[N] __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__)));
-  float d[N+1] __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__)));
-  float b[N] = {0,3,6,9,12,15,18,21,24,27,30,33,36,39,42,45,48,51,54,57};
-  float c[N] = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19};
-
-  main1 (N,&d[1],a,b,c);
-  main1 (N-2,&d[1],a,b,c);
-
-  return 0;
-}
-
 /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
 /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 0 "vect" {xfail { {! vect_hw_misalign } || powerpc*-*-* } } } } */
 /* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 0 "vect" } } */
--- a/src/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-3.c
+++ b/src/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-3.c
@@ -4,26 +4,10 @@
 /* { dg-options "-mdejagnu-cpu=power7 -O2 -ftree-vectorize -fno-vect-cost-model -fdump-tree-vect-details" } */
 
 /* Taken from vect/vect-95.c.  */
-#include <stdlib.h>
-#include <stdarg.h>
 
 #define N 256
 
-__attribute__ ((noinline))
-void bar (short *pa, short *pb, short *pc) 
-{
-  int i;
-
-  /* check results:  */
-  for (i = 0; i < N; i++)
-    {
-      if (pa[i] != (pb[i] * pc[i]))
-	abort ();
-    }
-
-  return;
-}
-
+void bar (short *pa, short *pb, short *pc);
 
 __attribute__ ((noinline)) int
 main1 (int n, short * __restrict__ pa, short * __restrict__ pb, short * __restrict__ pc)
@@ -40,19 +24,6 @@ main1 (int n, short * __restrict__ pa, short * __restrict__ pb, short * __restri
   return 0;
 }
 
-int main (void)
-{
-  int i;
-  short a[N] __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__)));
-  short b[N] = {0,3,6,9,12,15,18,21,24,27,30,33,36,39,42,45,48,51,54,57};
-  short c[N] = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19};
-
-  main1 (N,a,b,c);
-  main1 (N-2,a,b,c);
-
-  return 0;
-}
-
 /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
 /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" } } */
 /* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 0 "vect" } } */
--- a/src/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-4.c
+++ b/src/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-4.c
@@ -4,26 +4,10 @@
 /* { dg-options "-mdejagnu-cpu=power7 -O2 -ftree-vectorize -fno-vect-cost-model -fdump-tree-vect-details" } */
 
 /* Taken from vect/vect-95.c.  */
-#include <stdlib.h>
-#include <stdarg.h>
 
 #define N 256
 
-__attribute__ ((noinline))
-void bar (double *pa, double *pb, double *pc) 
-{
-  int i;
-
-  /* check results:  */
-  for (i = 0; i < N; i++)
-    {
-      if (pa[i] != (pb[i] * pc[i]))
-	abort ();
-    }
-
-  return;
-}
-
+void bar (double *pa, double *pb, double *pc);
 
 __attribute__ ((noinline)) int
 main1 (int n, double * __restrict__ pa, double * __restrict__ pb, double * __restrict__ pc)
@@ -40,19 +24,6 @@ main1 (int n, double * __restrict__ pa, double * __restrict__ pb, double * __res
   return 0;
 }
 
-int main (void)
-{
-  int i;
-  double a[N] __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__)));
-  double b[N] = {0,3,6,9,12,15,18,21,24,27,30,33,36,39,42,45,48,51,54,57};
-  double c[N] = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19};
-
-  main1 (N,a,b,c);
-  main1 (N-2,a,b,c);
-
-  return 0;
-}
-
 /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
 /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 0 "vect" { xfail { {! vect_hw_misalign } || powerpc*-*-* } } } } */
 /* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 0 "vect" { xfail { powerpc*-*-aix* } } } } */
--- a/src/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-5.c
+++ b/src/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-5.c
@@ -4,26 +4,10 @@
 /* { dg-options "-mdejagnu-cpu=power7 -O2 -ftree-vectorize -fno-vect-cost-model -fdump-tree-vect-details" } */
 
 /* Taken from vect/vect-95.c.  */
-#include <stdlib.h>
-#include <stdarg.h>
 
 #define N 256
 
-__attribute__ ((noinline))
-void bar (char *pa, char *pb, char *pc) 
-{
-  int i;
-
-  /* check results:  */
-  for (i = 0; i < N; i++)
-    {
-      if (pa[i] != (pb[i] + pc[i]))
-	abort ();
-    }
-
-  return;
-}
-
+void bar (char *pa, char *pb, char *pc);
 
 __attribute__ ((noinline)) int
 main1 (int n, char * __restrict__ pa, char * __restrict__ pb, char * __restrict__ pc)
@@ -40,19 +24,6 @@ main1 (int n, char * __restrict__ pa, char * __restrict__ pb, char * __restrict_
   return 0;
 }
 
-int main (void)
-{
-  int i;
-  char a[N] __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__)));
-  char b[N] = {0,3,6,9,12,15,18,21,24,27,30,33,36,39,42,45,48,51,54,57};
-  char c[N] = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19};
-
-  main1 (N,a,b,c);
-  main1 (N-2,a,b,c);
-
-  return 0;
-}
-
 /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
 /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" } } */
 /* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 0 "vect" } } */
--- a/src/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-6.c
+++ b/src/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-6.c
@@ -4,28 +4,10 @@
 /* { dg-options "-mdejagnu-cpu=power7 -O2 -ftree-vectorize -fno-vect-cost-model -fdump-tree-vect-details" } */
 
 /* Taken from vect/vect-95.c.  */
-#include <stdlib.h>
-#include <stdarg.h>
 
 #define N 256
 
-__attribute__ ((noinline))
-void bar (double *pd, double *pa, double *pb, double *pc) 
-{
-  int i;
-
-  /* check results:  */
-  for (i = 0; i < N; i++)
-    {
-      if (pa[i] != (pb[i] * pc[i]))
-	abort ();
-      if (pd[i] != 5.0)
-	abort ();
-    }
-
-  return;
-}
-
+void bar (double *pd, double *pa, double *pb, double *pc);
 
 __attribute__ ((noinline)) int
 main1 (int n, double * __restrict__ pd, double * __restrict__ pa, double * __restrict__ pb, double * __restrict__ pc)
@@ -43,20 +25,6 @@ main1 (int n, double * __restrict__ pd, double * __restrict__ pa, double * __res
   return 0;
 }
 
-int main (void)
-{
-  int i;
-  double a[N] __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__)));
-  double d[N+1] __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__)));
-  double b[N] = {0,3,6,9,12,15,18,21,24,27,30,33,36,39,42,45,48,51,54,57};
-  double c[N] = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19};
-
-  main1 (N,&d[1],a,b,c);
-  main1 (N-2,&d[1],a,b,c);
-
-  return 0;
-}
-
 /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
 /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 0 "vect" { xfail { {! vect_hw_misalign } || powerpc*-*-* } } } } */
 /* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 0 "vect" { xfail { powerpc*-*-aix* } } } } */
--- a/src/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-7.c
+++ b/src/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-7.c
@@ -4,28 +4,10 @@
 /* { dg-options "-mdejagnu-cpu=power7 -O2 -ftree-vectorize -fno-vect-cost-model -fdump-tree-vect-details" } */
 
 /* Taken from vect/vect-95.c.  */
-#include <stdlib.h>
-#include <stdarg.h>
 
 #define N 256
 
-__attribute__ ((noinline))
-void bar (int *pd, int *pa, int *pb, int *pc) 
-{
-  int i;
-
-  /* check results:  */
-  for (i = 0; i < N; i++)
-    {
-      if (pa[i] != (pb[i] * pc[i]))
-	abort ();
-      if (pd[i] != 5.0)
-	abort ();
-    }
-
-  return;
-}
-
+void bar (int *pd, int *pa, int *pb, int *pc);
 
 __attribute__ ((noinline)) int
 main1 (int n, int * __restrict__ pd, int * __restrict__ pa, int * __restrict__ pb, int * __restrict__ pc)
@@ -43,20 +25,6 @@ main1 (int n, int * __restrict__ pd, int * __restrict__ pa, int * __restrict__ p
   return 0;
 }
 
-int main (void)
-{
-  int i;
-  int a[N] __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__)));
-  int d[N+1] __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__)));
-  int b[N] = {0,3,6,9,12,15,18,21,24,27,30,33,36,39,42,45,48,51,54,57};
-  int c[N] = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19};
-
-  main1 (N,&d[1],a,b,c);
-  main1 (N-2,&d[1],a,b,c);
-
-  return 0;
-}
-
 /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
 /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 0 "vect" {xfail { {! vect_hw_misalign } || powerpc*-*-* } } } } */
 /* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 0 "vect" } } */
--- a/src/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-8.c
+++ b/src/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-8.c
@@ -4,28 +4,10 @@
 /* { dg-options "-mdejagnu-cpu=power7 -O2 -ftree-vectorize -fno-vect-cost-model -fdump-tree-vect-details" } */
 
 /* Taken from vect/vect-95.c.  */
-#include <stdlib.h>
-#include <stdarg.h>
 
 #define N 256
 
-__attribute__ ((noinline))
-void bar (short *pd, short *pa, short *pb, short *pc) 
-{
-  int i;
-
-  /* check results:  */
-  for (i = 0; i < N; i++)
-    {
-      if (pa[i] != (pb[i] * pc[i]))
-	abort ();
-      if (pd[i] != 5.0)
-	abort ();
-    }
-
-  return;
-}
-
+void bar (short *pd, short *pa, short *pb, short *pc);
 
 __attribute__ ((noinline)) int
 main1 (int n, short * __restrict__ pd, short * __restrict__ pa, short * __restrict__ pb, short * __restrict__ pc)
@@ -43,20 +25,6 @@ main1 (int n, short * __restrict__ pd, short * __restrict__ pa, short * __restri
   return 0;
 }
 
-int main (void)
-{
-  int i;
-  short a[N] __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__)));
-  short d[N+1] __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__)));
-  short b[N] = {0,3,6,9,12,15,18,21,24,27,30,33,36,39,42,45,48,51,54,57};
-  short c[N] = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19};
-
-  main1 (N,&d[1],a,b,c);
-  main1 (N-2,&d[1],a,b,c);
-
-  return 0;
-}
-
 /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
 /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 0 "vect" } } */
 /* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 2 "vect" } } */
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-9.c
@@ -0,0 +1,24 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -ftree-vectorize -fno-tree-loop-distribute-patterns -fno-vect-cost-model -fdump-tree-vect-details" } */
+
+/* Taken from vect/vect-align-1.c.  */
+#include <stdlib.h>
+#include <stdarg.h>
+
+#include "vsx-vectorize-1.c"
+
+int main (void)
+{
+  int i;
+  struct foo *p = malloc (2*sizeof (struct foo));
+  
+  main1 (p);
+
+  /* check results:  */
+  for (i = 0; i < N; i++)
+    {
+      if (p->y[i] != x[i])
+	abort ();
+    }
+  return 0;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/s390/vector/vec-cmp-emu-1.c
@@ -0,0 +1,35 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mzarch -march=z13" } */
+/* { dg-require-effective-target int128 } */
+/* { dg-final { check-function-bodies "**" "" "" } } */
+
+typedef __attribute__ ((vector_size (16))) signed __int128 v1ti;
+typedef __attribute__ ((vector_size (16))) unsigned __int128 uv1ti;
+
+/*
+** eq:
+**	vceqg	(%v[0-9]+),%v[0-9]+,%v[0-9]+
+**	vpdi	(%v[0-9]+),\1,\1,4
+**	vn	%v24,(\1,\2|\2,\1)
+**	br	%r14
+*/
+
+v1ti
+eq (v1ti x, v1ti y)
+{
+  return x == y;
+}
+
+/*
+** ueq:
+**	vceqg	(%v[0-9]+),%v[0-9]+,%v[0-9]+
+**	vpdi	(%v[0-9]+),\1,\1,4
+**	vn	%v24,(\1,\2|\2,\1)
+**	br	%r14
+*/
+
+uv1ti
+ueq (uv1ti x, uv1ti y)
+{
+  return x == y;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/s390/vector/vec-cmp-emu-2.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-O3 -mzarch -march=z13" } */
+/* { dg-require-effective-target int128 } */
+/* { dg-final { scan-assembler-times {\tvchg\t} 1 } } */
+/* { dg-final { scan-assembler-times {\tvchlg\t} 1 } } */
+/* { dg-final { scan-assembler-times {\tvceqg\t} 1 } } */
+/* { dg-final { scan-assembler-times {\tvpdi\t} 1 } } */
+/* { dg-final { scan-assembler-times {\tvn\t} 1 } } */
+/* { dg-final { scan-assembler-times {\tvo\t} 1 } } */
+/* { dg-final { scan-assembler-times {\tvrepg\t} 1 } } */
+
+typedef __attribute__ ((vector_size (16))) __int128 v1ti;
+
+v1ti
+gt (v1ti x, v1ti y)
+{
+  return x > y;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gcc.target/s390/vector/vec-cmp-emu-3.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-O3 -mzarch -march=z13" } */
+/* { dg-require-effective-target int128 } */
+/* { dg-final { scan-assembler-times {\tvchlg\t} 1 } } */
+/* { dg-final { scan-assembler-times {\tvceqg\t} 1 } } */
+/* { dg-final { scan-assembler-times {\tvpdi\t} 1 } } */
+/* { dg-final { scan-assembler-times {\tvn\t} 1 } } */
+/* { dg-final { scan-assembler-times {\tvo\t} 1 } } */
+/* { dg-final { scan-assembler-times {\tvrepg\t} 1 } } */
+
+typedef __attribute__ ((vector_size (16))) unsigned __int128 uv1ti;
+
+uv1ti
+gt (uv1ti x, uv1ti y)
+{
+  return x > y;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gdc.dg/driver_debuglib.d
@@ -0,0 +1,2 @@
+// { dg-do compile }
+// { dg-additional-options "-debuglib=a -debuglib=b" }
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gdc.dg/driver_defaultlib.d
@@ -0,0 +1,2 @@
+// { dg-do compile }
+// { dg-additional-options "-defaultlib=a -defaultlib=b" }
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gdc.dg/pr121477.d
@@ -0,0 +1,12 @@
+// { dg-do compile }
+// { dg-additional-options "-fpreview=bitfields" }
+struct S121477
+{
+    int x : 4;
+}
+
+void f121477(S121477 s)
+{
+    asm {"%0" :: "m" (s.x); } // { dg-error "cannot take address of bit-field" }
+    asm {"%0" : "=m" (s.x); } // { dg-error "cannot take address of bit-field" }
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gdc.dg/pr123046.d
@@ -0,0 +1,10 @@
+// { dg-do compile }
+ulong pure_hashOf(const ref typeof(*null) key)
+{
+    return hashOf(key);
+}
+
+ulong hashOf(const typeof(*null) val)
+{
+    return 0;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gdc.dg/pr123264.d
@@ -0,0 +1,8 @@
+// { dg-do compile }
+// { dg-options "-fdump-tree-original" }
+struct S123264
+{
+    void infinite(const S123264) { }
+    auto fn = &infinite;
+}
+// { dg-final { scan-tree-dump "const struct S123264" "original" } }
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gdc.dg/pr123407a.d
@@ -0,0 +1,4 @@
+// { dg-do compile }
+module pr123407;
+pragma(mangle, "ice") int fun();
+pragma(mangle, "ice") int var; // { dg-error "matches conflicting symbols" }
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gdc.dg/pr123407b.d
@@ -0,0 +1,4 @@
+// { dg-do compile }
+module pr123407;
+int fun();
+extern(C) int _D8pr1234073funFZi; // { dg-error "matches conflicting symbols" }
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gdc.dg/pr123419.d
@@ -0,0 +1,9 @@
+// { dg-do compile }
+struct S123419 {}
+
+void t123419(T)(T _) {}
+
+void f123419()
+{
+    t123419(__traits(initSymbol, S123419));
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gdc.dg/pr123798.d
@@ -0,0 +1,14 @@
+// { dg-do compile }
+// { dg-additional-options "-fpreview=bitfields" }
+class C123798
+{
+    int a : 4;
+    long b : 8;
+}
+
+struct S123798
+{
+    int a = 1;
+    int b : 4;
+    long c : 8;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gdc.dg/pr124026.d
@@ -0,0 +1,21 @@
+// { dg-do compile }
+struct UDA
+{
+    int delegate() foo;
+}
+
+static UDA getUDA(alias S)()
+{
+    return __traits(getAttributes, S)[0];
+}
+
+struct S124026
+{
+    @UDA({ return 42; }) int a;
+}
+
+void f124026()
+{
+    S124026 m;
+    enum uda = getUDA!(m.a);
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gdc.dg/torture/imports/pr119799c.c
@@ -0,0 +1,4 @@
+inline void fn119799()
+{
+    static struct {} s119799;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gdc.dg/torture/pr119799.d
@@ -0,0 +1,9 @@
+// { dg-do compile }
+// { dg-additional-files "imports/pr119799c.c" }
+// { dg-additional-options "-I[srcdir]" }
+import imports.pr119799c;
+
+void test()
+{
+    fn119799;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gdc.dg/torture/pr120096.d
@@ -0,0 +1,18 @@
+// { dg-do run }
+// { dg-additional-options "-fpreview=dip1000" }
+// { dg-skip-if "needs gcc/config.d" { ! d_runtime } }
+struct S
+{
+    this(int p) nothrow @nogc @safe
+    { f = p; }
+    int f;
+}
+
+int main() nothrow @nogc @safe
+{
+    scope S[] sa = [S(1), S(2)];
+
+    assert(sa[0].f == 1);
+    assert(sa[1].f == 2);
+    return 0;
+}
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gdc.dg/torture/pr123422.d
@@ -0,0 +1,25 @@
+// { dg-do run }
+// { dg-skip-if "needs gcc/config.d" { ! d_runtime } }
+struct S123422
+{
+    S123422* ptr;
+    this(int) { ptr = &this; }
+    this(ref inout S123422) { ptr = &this; }
+}
+
+struct V123422
+{
+    S123422 s;
+    this(int) { s = S123422(1); }
+}
+
+S123422 foo()
+{
+    return V123422(1).s;
+}
+
+void main()
+{
+    S123422 s = foo();
+    assert(&s == s.ptr);
+}
--- a/src/gcc/testsuite/gfortran.dg/alloc_comp_auto_array_3.f90
+++ b/src/gcc/testsuite/gfortran.dg/alloc_comp_auto_array_3.f90
@@ -25,6 +25,6 @@ contains
     allocate (array(1)%bigarr)
   end function
 end
-! { dg-final { scan-tree-dump-times "builtin_malloc" 3 "original" } }
+! { dg-final { scan-tree-dump-times "builtin_malloc" 4 "original" } }
 ! { dg-final { scan-tree-dump-times "builtin_free" 3 "original" } }
-! { dg-final { scan-tree-dump-times "while \\(1\\)" 4 "original" } }
+! { dg-final { scan-tree-dump-times "while \\(1\\)" 5 "original" } }
--- a/src/gcc/testsuite/gfortran.dg/alloc_comp_class_3.f03
+++ b/src/gcc/testsuite/gfortran.dg/alloc_comp_class_3.f03
@@ -45,11 +45,10 @@ contains
     type(c), value :: d
   end subroutine
 
-  type(c) function c_init()  ! { dg-warning "not set" }
+  type(c) function c_init()
   end function
 
   subroutine sub(d)
     type(u), value :: d
   end subroutine
 end program test_pr58586
-
--- a/src/gcc/testsuite/gfortran.dg/alloc_comp_class_4.f03
+++ b/src/gcc/testsuite/gfortran.dg/alloc_comp_class_4.f03
@@ -51,14 +51,14 @@ contains
     type(t), value :: d
   end subroutine
 
-  type(c) function c_init() ! { dg-warning "not set" }
+  type(c) function c_init()
   end function
 
   class(c) function c_init2() ! { dg-warning "not set" }
     allocatable :: c_init2
   end function
 
-  type(c) function d_init(this) ! { dg-warning "not set" }
+  type(c) function d_init(this)
     class(d) :: this
   end function
 
@@ -71,7 +71,7 @@ contains
     allocatable :: t_init
   end function
 
-  type(t) function static_t_init() ! { dg-warning "not set" }
+  type(t) function static_t_init()
   end function
 end module test_pr58586_mod
 
@@ -102,4 +102,3 @@ program test_pr58586
   call add_c(oe%init())
   deallocate(oe)
 end program
-
--- a/src/gcc/testsuite/gfortran.dg/allocate_with_source_14.f03
+++ b/src/gcc/testsuite/gfortran.dg/allocate_with_source_14.f03
@@ -210,5 +210,5 @@ program main
   call v%free()
   deallocate(av)
 end program
-! { dg-final { scan-tree-dump-times "__builtin_malloc" 22 "original" } }
+! { dg-final { scan-tree-dump-times "__builtin_malloc" 23 "original" } }
 ! { dg-final { scan-tree-dump-times "__builtin_free" 29 "original" } }
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gfortran.dg/associate_75.f90
@@ -0,0 +1,50 @@
+! { dg-do run }
+!
+! Test fix for PR121060.
+!
+! Contributed by Damian Rouson  <damian@archaeologic.codes>
+!
+module subdomain_m
+  implicit none
+
+  type subdomain_t 
+    real :: s_ = 99.
+  contains
+    generic :: operator(.laplacian.) => laplacian
+    procedure laplacian
+  end type
+
+contains
+
+  function laplacian(rhs)
+    class(subdomain_t), intent(in) :: rhs
+    type(subdomain_t) laplacian
+    laplacian%s_ = rhs%s_ + 42
+  end function
+
+end module
+
+  use subdomain_m
+  implicit none
+
+  type operands_t
+    real :: s_
+  end type
+
+  type(subdomain_t) phi
+  type(operands_t) operands
+
+  associate(laplacian_phi => .laplacian. phi) ! ICE because specific not found.
+    operands = approximates(laplacian_phi%s_)
+  end associate
+
+  if (int (operands%s_) /= 42) stop 1
+contains
+
+  function approximates(actual)
+    real actual 
+    type(operands_t) approximates
+    approximates%s_ = actual - 99
+  end function
+
+end
--- a/src/gcc/testsuite/gfortran.dg/derived_constructor_comps_6.f90
+++ b/src/gcc/testsuite/gfortran.dg/derived_constructor_comps_6.f90
@@ -129,5 +129,5 @@ contains
     prt_spec = name
   end function new_prt_spec3
 end program main
-! { dg-final { scan-tree-dump-times "__builtin_malloc" 15 "original" } }
+! { dg-final { scan-tree-dump-times "__builtin_malloc" 16 "original" } }
 ! { dg-final { scan-tree-dump-times "__builtin_free" 33 "original" } }
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gfortran.dg/derived_result_3.f90
@@ -0,0 +1,158 @@
+! { dg-do run }
+! PR fortran/98454 - default-initialization of derived-type function results
+
+program test
+  implicit none
+  type t
+     integer :: unit = -1
+  end type t
+  type u
+     integer, allocatable :: unit(:)
+  end type u
+  type(t) :: x, x3(3)
+  type(u) :: y, y4(4)
+
+  ! Scalar function result, DT with default initializer
+  x = t(42)
+  if (x% unit /= 42) stop 1
+  x = g()
+  if (x% unit /= -1) stop 2
+  x = t(42)
+  x = f()
+  if (x% unit /= -1) stop 3
+  x = t(42)
+  x = h()
+  if (x% unit /= -1) stop 4
+  x = t(42)
+  x = k()
+  if (x% unit /= -1) stop 5
+
+  ! Array function result, DT with default initializer
+  x3 = t(13)
+  if (any (x3% unit /= 13)) stop 11
+  x3 = f3()
+  if (any (x3% unit /= -1)) stop 12
+  x3 = t(13)
+  x3 = g3()
+  if (any (x3% unit /= -1)) stop 13
+  x3 = t(13)
+  x3 = h3()
+  if (any (x3% unit /= -1)) stop 14
+  x3 = t(13)
+  x3 = k3()
+  if (any (x3% unit /= -1)) stop 15
+
+  ! Scalar function result, DT with allocatable component
+  y = u()
+  if (allocated (y% unit)) stop 21
+  allocate (y% unit(42))
+  y = m()
+  if (allocated (y% unit)) stop 22
+  allocate (y% unit(42))
+  y = n()
+  if (allocated (y% unit)) stop 23
+  allocate (y% unit(42))
+  y = o()
+  if (allocated (y% unit)) stop 24
+  allocate (y% unit(42))
+  y = p()
+  if (allocated (y% unit)) stop 25
+
+  ! Array function result, DT with allocatable component
+  y4 = u()
+  if (allocated (y4(1)% unit)) stop 31
+  allocate (y4(1)% unit(42))
+  y4 = m4()
+  if (allocated (y4(1)% unit)) stop 32
+  y4 = u()
+  allocate (y4(1)% unit(42))
+  y4 = n4()
+  if (allocated (y4(1)% unit)) stop 33
+
+  y4 = u()
+  allocate (y4(1)% unit(42))
+  y4 = o4()
+  if (allocated (y4(1)% unit)) stop 34
+  y4 = u()
+  allocate (y4(1)% unit(42))
+  y4 = p4()
+  if (allocated (y4(1)% unit)) stop 35
+
+contains
+
+  ! Function result not referenced within function body
+  function f()
+    type(t) :: f
+  end function f
+
+  function k() result (f)
+    type(t) :: f
+  end function k
+
+  ! Function result referenced within function body
+  function g()
+    type(t) :: g
+    if (g% unit /= -1) stop 41
+  end function g
+
+  function h() result (g)
+    type(t) :: g
+    if (g% unit /= -1) stop 42
+  end function h
+
+  ! Function result not referenced within function body
+  function f3 ()
+    type(t) :: f3(3)
+  end function f3
+
+  function k3() result (f3)
+    type(t) :: f3(3)
+  end function k3
+
+  ! Function result referenced within function body
+  function g3()
+    type(t) :: g3(3)
+    if (any (g3% unit /= -1)) stop 43
+  end function g3
+
+  function h3() result (g3)
+    type(t) :: g3(3)
+    if (any (g3% unit /= -1)) stop 44
+  end function h3
+
+  function m()
+    type(u) :: m
+  end function m
+
+  function n() result (f)
+    type(u) :: f
+  end function n
+
+  function o()
+    type(u) :: o
+    if (allocated (o% unit)) stop 71
+  end function o
+
+  function p() result (f)
+    type(u) :: f
+    if (allocated (f% unit)) stop 72
+  end function p
+
+  function m4()
+    type(u) :: m4(4)
+  end function m4
+
+  function n4() result (f)
+    type(u) :: f(4)
+  end function n4
+
+  function o4()
+    type(u) :: o4(4)
+    if (allocated (o4(1)% unit)) stop 73
+  end function o4
+
+  function p4() result (f)
+    type(u) :: f(4)
+    if (allocated (f(1)% unit)) stop 74
+  end function p4
+end
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gfortran.dg/derived_result_5.f90
@@ -0,0 +1,123 @@
+! { dg-do run }
+! { dg-additional-options "-O2 -Wreturn-type" }
+!
+! PR fortran/85750 - default-initialization and functions returning derived type
+
+module bar
+  implicit none
+  type ilist
+    integer          :: count = 42
+    integer, pointer :: ptr(:) => null()
+  end type ilist
+
+  type jlist
+    real, allocatable :: a(:)
+    integer           :: count = 23
+  end type jlist
+
+contains
+
+  function make_list(i)
+    integer,     intent(in)   :: i
+    type(ilist), dimension(2) :: make_list
+    make_list(i)%count = i
+  end function make_list
+
+  function make_list_res(i) result(list)
+    integer,     intent(in)   :: i
+    type(ilist), dimension(2) :: list
+    list(i)%count = i
+  end function make_list_res
+
+  function make_jlist(i)
+    integer,     intent(in)   :: i
+    type(jlist), dimension(2) :: make_jlist
+    make_jlist(i)%count = i
+  end function make_jlist
+
+  function make_jlist_res(i) result(list)
+    integer,     intent(in)   :: i
+    type(jlist), dimension(2) :: list
+    list(i)%count = i
+  end function make_jlist_res
+
+  function empty_ilist()
+    type(ilist), dimension(2) :: empty_ilist
+  end function
+
+  function empty_jlist()
+    type(jlist), dimension(2) :: empty_jlist
+  end function
+
+  function empty_ilist_res() result (res)
+    type(ilist), dimension(2) :: res
+  end function
+
+  function empty_jlist_res() result (res)
+    type(jlist), dimension(2) :: res
+  end function
+
+end module bar
+
+program foo
+  use bar
+  implicit none
+  type(ilist)              :: mylist(2) = ilist(count=-2)
+  type(jlist), allocatable :: yourlist(:)
+
+  mylist = ilist(count=-1)
+  if (any (mylist%count /= [-1,-1])) stop 1
+  mylist = empty_ilist()
+  if (any (mylist%count /= [42,42])) stop 2
+  mylist = ilist(count=-1)
+  mylist = empty_ilist_res()
+  if (any (mylist%count /= [42,42])) stop 3
+
+  allocate(yourlist(1:2))
+  if (any (yourlist%count /= [23,23])) stop 4
+  yourlist = jlist(count=-1)
+  if (any (yourlist%count /= [-1,-1])) stop 5
+  yourlist = empty_jlist()
+  if (any (yourlist%count /= [23,23])) stop 6
+  yourlist = jlist(count=-1)
+  yourlist = empty_jlist_res()
+  if (any (yourlist%count /= [23,23])) stop 7
+
+  mylist = make_list(1)
+  if (any (mylist%count /= [1,42])) stop 11
+  mylist = make_list(2)
+  if (any (mylist%count /= [42,2])) stop 12
+  mylist = (make_list(1))
+  if (any (mylist%count /= [1,42])) stop 13
+  mylist = [make_list(2)]
+  if (any (mylist%count /= [42,2])) stop 14
+
+  mylist = make_list_res(1)
+  if (any (mylist%count /= [1,42])) stop 21
+  mylist = make_list_res(2)
+  if (any (mylist%count /= [42,2])) stop 22
+  mylist = (make_list_res(1))
+  if (any (mylist%count /= [1,42])) stop 23
+  mylist = [make_list_res(2)]
+  if (any (mylist%count /= [42,2])) stop 24
+
+  yourlist = make_jlist(1)
+  if (any (yourlist%count /= [1,23])) stop 31
+  yourlist = make_jlist(2)
+  if (any (yourlist%count /= [23,2])) stop 32
+  yourlist = (make_jlist(1))
+  if (any (yourlist%count /= [1,23])) stop 33
+  yourlist = [make_jlist(2)]
+  if (any (yourlist%count /= [23,2])) stop 34
+
+  yourlist = make_jlist_res(1)
+  if (any (yourlist%count /= [1,23])) stop 41
+  yourlist = make_jlist_res(2)
+  if (any (yourlist%count /= [23,2])) stop 42
+  yourlist = (make_jlist_res(1))
+  if (any (yourlist%count /= [1,23])) stop 43
+  yourlist = [make_jlist_res(2)]
+  if (any (yourlist%count /= [23,2])) stop 44
+
+  deallocate (yourlist)
+end program foo
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gfortran.dg/implied_do_io_9.f90
@@ -0,0 +1,72 @@
+! { dg-do run }
+! { dg-additional-options "-O2" }
+!
+! PR fortran/107968
+!
+! Verify that array I/O optimization is not used for a section
+! of an array pointer as the pointee can be non-contiguous
+!
+! Contributed by Nils Dreier
+
+PROGRAM foo
+  implicit none
+
+  TYPE t_geographical_coordinates
+     REAL :: lon
+     REAL :: lat
+  END TYPE t_geographical_coordinates
+
+  TYPE t_vertices
+     REAL, POINTER          :: vlon(:) => null()
+     REAL, POINTER          :: vlat(:) => null()
+  END TYPE t_vertices
+
+  TYPE(t_geographical_coordinates), TARGET :: vertex(2)
+  TYPE(t_vertices), POINTER :: vertices_pointer
+  TYPE(t_vertices), TARGET  :: vertices_target
+
+  character(24)           :: s0, s1, s2
+  character(*), parameter :: fmt = '(2f8.3)'
+
+  ! initialization
+  vertex%lon = [1,3]
+  vertex%lat = [2,4]
+
+  ! obtain pointer to (non-contiguous) field
+  vertices_target%vlon => vertex%lon
+
+  ! reference output of write
+  write (s0,fmt) vertex%lon
+
+  ! set pointer vertices_pointer in a subroutine
+  CALL set_vertices_pointer(vertices_target)
+
+  write (s1,fmt) vertices_pointer%vlon
+  write (s2,fmt) vertices_pointer%vlon(1:)
+  if (s1 /= s0 .or. s2 /= s0) then
+     print *, s0, s1, s2
+     stop 3
+  end if
+
+CONTAINS
+
+  SUBROUTINE set_vertices_pointer(vertices)
+    TYPE(t_vertices), POINTER, INTENT(IN) :: vertices
+
+    vertices_pointer => vertices
+
+    write (s1,fmt) vertices        %vlon
+    write (s2,fmt) vertices        %vlon(1:)
+    if (s1 /= s0 .or. s2 /= s0) then
+       print *, s0, s1, s2
+       stop 1
+    end if
+
+    write (s1,fmt) vertices_pointer%vlon
+    write (s2,fmt) vertices_pointer%vlon(1:)
+    if (s1 /= s0 .or. s2 /= s0) then
+       print *, s0, s1, s2
+       stop 2
+    end if
+  END SUBROUTINE set_vertices_pointer
+END PROGRAM foo
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gfortran.dg/interface_63.f90
@@ -0,0 +1,97 @@
+! { dg-do compile }
+! PR fortran/120784 - fix checking of renamed-on-use interface name
+!
+! Contributed by Matt Thompson  <matthew.thompson at nasa dot gov>
+
+module A_mod
+  implicit none
+
+  interface Get
+     procedure :: get_1
+     procedure :: get_2
+  end interface Get
+
+contains
+
+  subroutine get_1(i)
+    integer :: i
+    i = 5
+  end subroutine get_1
+
+  subroutine get_2(x)
+    real :: x
+    x = 4
+  end subroutine get_2
+end module A_mod
+
+module B_mod
+  use A_mod, only : MyGet => Get
+  implicit none
+
+  interface MyGet
+     procedure :: other_get
+  end interface MyGet
+
+contains
+
+  subroutine other_get(c)
+    character(1) :: c
+    c = 'a'
+  end subroutine other_get
+
+  subroutine check_get ()
+    character :: c
+    integer   :: i
+    real      :: r
+    call myget (c)
+    call myget (i)
+    call myget (r)
+  end subroutine check_get
+
+end module B_MOD
+
+program p
+  use b_mod, only: myget
+  implicit none
+  character :: c
+  integer   :: i
+  real      :: r
+  call myget (c)
+  call myget (i)
+  call myget (r)
+end
+
+! Check that we do not regress on the following:
+
+module mod1
+  implicit none
+
+  interface local
+    module procedure local_data
+  end interface local
+
+contains
+
+  logical function local_data (data) result (local)
+    real, intent(in) :: data
+    local = .true.
+  end function local_data
+
+end module mod1
+
+module mod2
+  use mod1, only: local
+  implicit none
+
+  interface local
+     module procedure local_invt
+  end interface local
+
+contains
+
+  logical function local_invt (invt) result (local)
+    integer, intent(in) :: invt
+    local = .true.
+  end function local_invt
+
+end module mod2
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gfortran.dg/interface_abstract_6.f90
@@ -0,0 +1,53 @@
+! { dg-do compile }
+! { dg-options "-fdump-tree-original" }
+!
+! PR fortran/122206
+!
+! Verify that procedure interfaces are "stable"
+
+module test_example
+  use, intrinsic :: iso_c_binding, only: c_double, c_int
+  implicit none
+
+  abstract interface
+     function simple_interface(iarg1, arg2) bind(c) result(res)
+       import c_double, c_int
+       integer(c_int), value, intent(in) :: iarg1
+       real(c_double), value, intent(in) :: arg2
+       real(c_double) :: res
+     end function simple_interface
+  end interface
+
+  procedure(simple_interface), bind(c,name="simple_function") :: simple_function
+
+  interface
+     function other_interface(iarg1, arg2) result(res)
+       import c_double, c_int
+       integer(c_int), value, intent(in) :: iarg1
+       real(c_double), value, intent(in) :: arg2
+       real(c_double) :: res
+     end function other_interface
+  end interface
+
+  procedure(other_interface) :: other_function
+
+contains
+  subroutine test_example_interface
+    implicit none
+    integer(c_int) :: iarg1 = 2
+    real(c_double) :: arg2  = 10.
+    real(c_double) :: val1, val2
+
+    val1 = simple_function(iarg1, arg2)
+    val2 = simple_function(iarg1, arg2)
+    if (val1 /= val2) stop 1
+
+    val1 = other_function(iarg1, arg2)
+    val2 = other_function(iarg1, arg2)
+    if (val1 /= val2) stop 2
+
+  end subroutine test_example_interface
+end module test_example
+
+! { dg-final { scan-tree-dump-times "simple_function \\(iarg1, arg2\\);" 2 "original"} }
+! { dg-final { scan-tree-dump-times "other_function \\(iarg1, arg2\\);" 2 "original"} }
--- a/src/gcc/testsuite/gfortran.dg/pdt_26.f03
+++ b/src/gcc/testsuite/gfortran.dg/pdt_26.f03
@@ -43,4 +43,4 @@ program test_pdt
   if (any (c(1)%foo .ne. [13,15,17])) STOP 2
 end program test_pdt
 ! { dg-final { scan-tree-dump-times "__builtin_free" 8 "original" } }
-! { dg-final { scan-tree-dump-times "__builtin_malloc" 8 "original" } }
+! { dg-final { scan-tree-dump-times "__builtin_malloc" 9 "original" } }
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gfortran.dg/pointer_check_15.f90
@@ -0,0 +1,46 @@
+! { dg-do run }
+! { dg-additional-options "-O -fcheck=pointer -fdump-tree-original" }
+!
+! PR fortran/121145
+! Erroneous runtime error: Proc-pointer actual argument 'ptr' is not associated
+!
+! Contributed by Federico Perini.
+
+module m
+  implicit none
+
+  abstract interface
+     subroutine fun(x)
+       real, intent(in) :: x
+     end subroutine fun
+  end interface   
+
+contains
+
+  subroutine with_fun(sub)
+    procedure(fun), optional :: sub
+    if (present(sub)) stop 1
+  end subroutine   
+
+  subroutine with_non_optional(sub)
+    procedure(fun) :: sub
+  end subroutine   
+
+end module m
+
+program p
+  use m
+  implicit none
+
+  procedure(fun), pointer :: ptr1 => null()
+  procedure(fun), pointer :: ptr2 => null()
+  
+  call with_fun()
+  call with_fun(sub=ptr1)               ! no runtime check here
+
+  if (associated (ptr2)) then
+     call with_non_optional(sub=ptr2)   ! runtime check here
+  end if
+end  
+
+! { dg-final { scan-tree-dump-times "Proc-pointer actual argument .'ptr2.'" 1 "original" } }
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gfortran.dg/pr106946.f90
@@ -0,0 +1,30 @@
+! { dg-do compile }
+! PR fortran/106946
+! ICE in resolve_component on invalid CLASS declaration with missing comma.
+!
+! The bad declarations below should diagnose and continue without leaving
+! behind dangling CLASS container symbols in the surrounding namespace.
+
+program p
+  type :: u
+  end type
+
+  type :: v
+  end type
+
+  type :: w
+  end type
+
+  type :: t1
+    class(u), allocatable :: a b  ! { dg-error "Syntax error in data declaration" }
+  end type
+
+  type :: t2
+    class(v), pointer :: p q  ! { dg-error "Syntax error in data declaration" }
+  end type
+
+  type :: t3
+    class(w), allocatable :: ok
+    class(w), allocatable :: x y  ! { dg-error "Syntax error in data declaration" }
+  end type
+end
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gfortran.dg/pr124450.f90
@@ -0,0 +1,14 @@
+! PR fortran/124450
+! { dg-do compile }
+
+  type ta
+    integer(kind=4) :: a(1)
+    integer(kind=4) :: b(1)
+  end type ta
+  type tb
+    type(ta) :: c(1) = ta(1, 2)
+  end type tb
+  type(tb) :: e = tb(ta(3, 4))
+
+  print *, e
+end
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gfortran.dg/pr89092.f90
@@ -0,0 +1,49 @@
+! { dg-do compile }
+! { dg-options "-fdump-tree-original" }
+module AModule
+   implicit none
+   private
+   public Foo
+
+   interface Foo
+      module procedure FooPrivate
+   end interface
+contains
+   subroutine FooPrivate(x)
+      integer :: x
+
+      write(*,*) 'Foo(integer)'
+   end subroutine
+end module
+module BModule
+   implicit none
+   private
+
+   type, public :: BType
+   contains
+      procedure :: Foo
+   end type
+contains
+   subroutine Foo(self)
+      class(BType) :: self
+
+      write(*,*) 'Foo(BType)'
+   end subroutine
+end module
+program iface_tbp_test
+   use AModule
+   implicit none
+
+   call test()
+
+contains
+   subroutine test()
+      use BModule
+
+      type(BType) :: y
+
+      call y%Foo()
+      call Foo(1)
+   end subroutine
+end program
+! { dg-final { scan-tree-dump-times "foo \\(&class.2\\)" 1 "original" } }
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gfortran.dg/transfer_class_5.f90
@@ -0,0 +1,53 @@
+! { dg-do run }
+! PR fortran/121263 - fix TRANSFER with rank 1 unlimited polymorhpic
+!
+! Based on original testcase by Chris Cox.
+
+module stdlib_hashmap_wrappers
+  implicit none
+contains
+  subroutine set_rank_one_key_int( key, value )
+    integer, allocatable, intent(inout) :: key(:)
+    class(*), intent(in)                :: value(:)
+    key = transfer( value, key )
+  end subroutine
+
+  subroutine set_rank_one_key_cx ( key, value )
+    complex, allocatable, intent(inout) :: key(:)
+    class(*), intent(in)                :: value(:)
+    key = transfer( value, key )
+  end subroutine
+
+  subroutine set_first_key_int   ( key, value )
+    integer, intent(inout) :: key
+    class(*), intent(in)   :: value(:)
+    key = transfer( value(1), key )
+  end subroutine
+end module
+
+program p
+  use stdlib_hashmap_wrappers
+  implicit none
+  integer, allocatable :: a(:), b(:)
+  complex, allocatable :: c(:), d(:)
+  class(*),allocatable :: z(:)
+  integer :: m
+  a = [1, 2, 3, 4, 5]
+  c = cmplx (a, -a)
+  call set_rank_one_key_int (b, a)
+  call set_rank_one_key_cx  (d, c)
+  call set_first_key_int    (m, a)
+! print *, b
+! print *, d
+  if (size (a) /= size (b)) stop 1
+  if (any  (a  /=       b)) stop 2
+  if (size (c) /= size (d)) stop 3
+  if (any  (c  /=       d)) stop 4
+  if (m /= 1) stop 5
+  deallocate (d)
+  z = c
+  d = transfer (z, d)
+  if (size (c) /= size (d)) stop 6
+  if (any  (c  /=       d)) stop 7
+  deallocate (a, b, c, d, z)
+end program p
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gfortran.target/aarch64/aarch64.exp
@@ -0,0 +1,45 @@
+#   Copyright (C) 2025 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+# 
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+# 
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+# GCC testsuite that uses the `dg.exp' driver.
+
+# Exit immediately if this isn't a aarch64 target.
+if { ![istarget aarch64*-*-*] } then {
+  return
+}
+
+# Make sure there is a fortran compiler to test.
+if { ![check_no_compiler_messages fortran_available assembly {
+! Fortran
+program P
+  stop
+end program P
+} ""] } {
+    return
+}
+
+# Load support procs.
+load_lib gfortran-dg.exp
+
+# Initialize `dg'.
+dg-init
+
+# Main loop.
+gfortran-dg-runtest [lsort \
+   [glob -nocomplain $srcdir/$subdir/*.\[fF\]{,90,95,03,08} ] ] "" ""
+
+# All done.
+dg-finish
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gfortran.target/aarch64/pr122408_1.f90
@@ -0,0 +1,61 @@
+! { dg-do compile }
+! { dg-additional-options "-O2 -march=armv8.3-a" }
+
+subroutine c_add_ab(n, a, c, b)         ! C += A * B
+  use iso_fortran_env, only: real64
+  implicit none
+  !GCC$ ATTRIBUTES noinline :: c_add_ab
+  integer, intent(in) :: n
+  complex(real64), intent(in)    :: a
+  complex(real64), intent(inout) :: c(*)
+  complex(real64), intent(in)    :: b(*)
+  integer :: k
+  do k = 1, n
+    c(k) = c(k) + a * b(k)
+  end do
+end subroutine c_add_ab
+
+subroutine c_sub_ab(n, a, c, b)         ! C -= A * B
+  use iso_fortran_env, only: real64
+  implicit none
+  !GCC$ ATTRIBUTES noinline :: c_sub_ab
+  integer, intent(in) :: n
+  complex(real64), intent(in)    :: a
+  complex(real64), intent(inout) :: c(*)
+  complex(real64), intent(in)    :: b(*)
+  integer :: k
+  do k = 1, n
+    c(k) = c(k) - a * b(k)
+  end do
+end subroutine c_sub_ab
+
+subroutine c_add_a_conjb(n, a, c, b)    ! C += A * conj(B)
+  use iso_fortran_env, only: real64
+  implicit none
+  !GCC$ ATTRIBUTES noinline :: c_add_a_conjb
+  integer, intent(in) :: n
+  complex(real64), intent(in)    :: a
+  complex(real64), intent(inout) :: c(*)
+  complex(real64), intent(in)    :: b(*)
+  integer :: k
+  do k = 1, n
+    c(k) = c(k) + a * conjg(b(k))
+  end do
+end subroutine c_add_a_conjb
+
+subroutine c_sub_a_conjb(n, a, c, b)    ! C -= A * conj(B)
+  use iso_fortran_env, only: real64
+  implicit none
+  !GCC$ ATTRIBUTES noinline :: c_sub_a_conjb
+  integer, intent(in) :: n
+  complex(real64), intent(in)    :: a
+  complex(real64), intent(inout) :: c(*)
+  complex(real64), intent(in)    :: b(*)
+  integer :: k
+  do k = 1, n
+    c(k) = c(k) - a * conjg(b(k))
+  end do
+end subroutine c_sub_a_conjb
+
+! { dg-final { scan-assembler-times {fcmla\s+v[0-9]+.2d, v[0-9]+.2d, v[0-9]+.2d, #0} 2 } }
+! { dg-final { scan-assembler-times {fcmla\s+v[0-9]+.2d, v[0-9]+.2d, v[0-9]+.2d, #270} 2 } }
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gfortran.target/aarch64/pr122408_2.f90
@@ -0,0 +1,140 @@
+! { dg-do run }
+! { dg-additional-options "-O2" }
+! { dg-additional-options "-O2 -march=armv8.3-a" { target arm_v8_3a_complex_neon_hw } }
+
+module util
+  use iso_fortran_env, only: real64, int64
+  implicit none
+contains
+  pure logical function bitwise_eq(x, y)
+    complex(real64), intent(in) :: x, y
+    integer(int64) :: xr, xi, yr, yi
+    xr = transfer(real(x,kind=real64), 0_int64)
+    xi = transfer(aimag(x),             0_int64)
+    yr = transfer(real(y,kind=real64),  0_int64)
+    yi = transfer(aimag(y),              0_int64)
+    bitwise_eq = (xr == yr) .and. (xi == yi)
+  end function bitwise_eq
+
+  subroutine check_equal(tag, got, ref, nfail)
+    character(*), intent(in) :: tag
+    complex(real64), intent(in) :: got(:), ref(:)
+    integer, intent(inout) :: nfail
+    integer :: i
+    do i = 1, size(got)
+      if (.not. bitwise_eq(got(i), ref(i))) then
+        nfail = nfail + 1
+        write(*,'(A,": mismatch at i=",I0, "  got=",2ES16.8,"  ref=",2ES16.8)') &
+             trim(tag), i, real(got(i)), aimag(got(i)), real(ref(i)), aimag(ref(i))
+      end if
+    end do
+  end subroutine check_equal
+end module util
+
+module fcmla_ops
+  use iso_fortran_env, only: real64
+  implicit none
+contains
+  subroutine c_add_ab(n, a, c, b)         ! C += A * B
+    !GCC$ ATTRIBUTES noinline :: c_add_ab
+    integer, intent(in) :: n
+    complex(real64), intent(in)    :: a
+    complex(real64), intent(inout) :: c(*)
+    complex(real64), intent(in)    :: b(*)
+    integer :: k
+    do k = 1, n
+      c(k) = c(k) + a * b(k)
+    end do
+  end subroutine c_add_ab
+
+  subroutine c_sub_ab(n, a, c, b)         ! C -= A * B
+    !GCC$ ATTRIBUTES noinline :: c_sub_ab
+    integer, intent(in) :: n
+    complex(real64), intent(in)    :: a
+    complex(real64), intent(inout) :: c(*)
+    complex(real64), intent(in)    :: b(*)
+    integer :: k
+    do k = 1, n
+      c(k) = c(k) - a * b(k)
+    end do
+  end subroutine c_sub_ab
+
+  subroutine c_add_a_conjb(n, a, c, b)    ! C += A * conj(B)
+    !GCC$ ATTRIBUTES noinline :: c_add_a_conjb
+    integer, intent(in) :: n
+    complex(real64), intent(in)    :: a
+    complex(real64), intent(inout) :: c(*)
+    complex(real64), intent(in)    :: b(*)
+    integer :: k
+    do k = 1, n
+      c(k) = c(k) + a * conjg(b(k))
+    end do
+  end subroutine c_add_a_conjb
+
+  subroutine c_sub_a_conjb(n, a, c, b)    ! C -= A * conj(B)
+    !GCC$ ATTRIBUTES noinline :: c_sub_a_conjb
+    integer, intent(in) :: n
+    complex(real64), intent(in)    :: a
+    complex(real64), intent(inout) :: c(*)
+    complex(real64), intent(in)    :: b(*)
+    integer :: k
+    do k = 1, n
+      c(k) = c(k) - a * conjg(b(k))
+    end do
+  end subroutine c_sub_a_conjb
+end module fcmla_ops
+
+program fcmla_accum_pairs
+  use iso_fortran_env, only: real64
+  use util
+  use fcmla_ops
+  implicit none
+
+  integer, parameter :: n = 4
+  complex(real64) :: a, b(n), c0(n)
+  complex(real64) :: c_add_ab_got(n),      c_add_ab_ref(n)
+  complex(real64) :: c_sub_ab_got(n),      c_sub_ab_ref(n)
+  complex(real64) :: c_add_conjb_got(n),   c_add_conjb_ref(n)
+  complex(real64) :: c_sub_conjb_got(n),   c_sub_conjb_ref(n)
+  integer :: i, fails
+
+  ! Constants (include a signed-zero lane)
+  a    = cmplx( 2.0_real64, -3.0_real64, kind=real64)
+  b(1) = cmplx( 1.5_real64, -2.0_real64, kind=real64)
+  b(2) = cmplx(-4.0_real64,  5.0_real64, kind=real64)
+  b(3) = cmplx(-0.0_real64,  0.0_real64, kind=real64)
+  b(4) = cmplx( 0.25_real64, 3.0_real64, kind=real64)
+
+  c0(1) = cmplx( 1.0_real64, -2.0_real64, kind=real64)
+  c0(2) = cmplx( 3.0_real64, -4.0_real64, kind=real64)
+  c0(3) = cmplx(-5.0_real64,  6.0_real64, kind=real64)
+  c0(4) = cmplx( 0.0_real64,  0.0_real64, kind=real64)
+
+  ! Run each form
+  c_add_ab_got    = c0; call c_add_ab     (n, a, c_add_ab_got,    b)
+  c_sub_ab_got    = c0; call c_sub_ab     (n, a, c_sub_ab_got,    b)
+  c_add_conjb_got = c0; call c_add_a_conjb(n, a, c_add_conjb_got, b)
+  c_sub_conjb_got = c0; call c_sub_a_conjb(n, a, c_sub_conjb_got, b)
+
+  ! Scalar references
+  do i = 1, n
+    c_add_ab_ref(i)    = c0(i) + a * b(i)
+    c_sub_ab_ref(i)    = c0(i) - a * b(i)
+    c_add_conjb_ref(i) = c0(i) + a * conjg(b(i))
+    c_sub_conjb_ref(i) = c0(i) - a * conjg(b(i))
+  end do
+
+  ! Bitwise checks
+  fails = 0
+  call check_equal("C +=  A*B       ", c_add_ab_got,    c_add_ab_ref,    fails)
+  call check_equal("C -=  A*B       ", c_sub_ab_got,    c_sub_ab_ref,    fails)
+  call check_equal("C +=  A*conj(B) ", c_add_conjb_got, c_add_conjb_ref, fails)
+  call check_equal("C -=  A*conj(B) ", c_sub_conjb_got, c_sub_conjb_ref, fails)
+
+  if (fails == 0) then
+    stop 0
+  else
+    stop 1
+  end if
+end program fcmla_accum_pairs
+
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gnat.dg/lto30.adb
@@ -0,0 +1,31 @@
+-- { dg-do compile }
+-- { dg-options "-flto" { target lto } }
+
+with Ada.Unchecked_Conversion;
+with System;
+
+package body Lto30 is
+
+   generic
+      type T is private;
+   package Unbounded_Arrays is
+      type Unbounded_Array is array (Natural range 1 .. Natural'Last) of T;
+      type Unbounded_Array_Access is access Unbounded_Array;
+      function Convert is new
+         Ada.Unchecked_Conversion (System.Address, Unbounded_Array_Access);
+   end Unbounded_Arrays;
+
+   package Atom_Arrays is new Unbounded_Arrays (Ptr);
+   use Atom_Arrays;
+
+   procedure Proc is
+      procedure Foo (Targets : access Unbounded_Array_Access);
+      pragma Import (Ada, Foo, "Foo");
+
+      Output : aliased Unbounded_Array_Access;
+
+   begin
+      Foo (Output'Unchecked_Access);
+   end;
+
+end Lto30;
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gnat.dg/lto30.ads
@@ -0,0 +1,13 @@
+package Lto30 is
+
+   type Rec is private;
+
+   type Ptr is access all Rec;
+
+   procedure Proc;
+
+private
+
+   type Rec is null record;
+
+end Lto30;
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gnat.dg/protected_deref1.adb
@@ -0,0 +1,32 @@
+-- { dg-do run }
+
+with Ada.Text_IO;
+
+procedure Protected_Deref1 is
+
+   protected type Fallback_Hit_Counter_Type is
+      procedure Handler;
+   end Fallback_Hit_Counter_Type;
+
+   protected body Fallback_Hit_Counter_Type is
+      procedure Handler is
+      begin
+         Ada.Text_IO.Put_Line ("Test");
+      end Handler;
+   end Fallback_Hit_Counter_Type;
+
+   Fallback_Hit_Counter : access Fallback_Hit_Counter_Type :=
+     new Fallback_Hit_Counter_Type;
+
+   type X is access protected procedure;
+
+   A : X := Fallback_Hit_Counter.all.Handler'Access;
+   B : X := Fallback_Hit_Counter.Handler'Access;
+
+begin
+   A.all;
+   B.all;
+   if A /= B then
+      raise Program_Error;
+   end if;
+end;
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gnat.dg/reduce2.adb
@@ -0,0 +1,18 @@
+-- { dg-do compile }
+-- { dg-options "-gnat2022" }
+
+procedure Reduce2 is
+
+  subtype Value is Natural range 0 .. 255;
+
+  function Do_Something (Accumulator : Value; Symbol : Character) return Value
+    is (((Accumulator + Character'Pos (Symbol)) * 17) mod 256);
+
+  function Do_It_By_Reduction (S : String) return Value is
+    (S'Reduce (Do_Something, 0));
+
+  Test_It : constant Value := Do_It_By_Reduction ("Hello, world!");
+
+begin
+  null;
+end;
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gnat.dg/reduce4.adb
@@ -0,0 +1,9 @@
+-- { dg-do compile }
+-- { dg-options "-gnat2022" }
+
+procedure Reduce4 (S : String) is
+begin
+  if [for E of S => 1]'Reduce ("+", 0) = 3 then
+    null;
+  end if;
+end;
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gnat.dg/reduce5.adb
@@ -0,0 +1,36 @@
+-- { dg-do compile }
+-- { dg-options "-gnat2022" }
+
+with Ada.Text_IO; use Ada.Text_IO;
+
+procedure Reduce5 is
+   subtype Chunk_Number is Natural range 1 .. 8;
+   Grid  : array (1 .. 80, 1 .. 100) of Boolean := (others => (others => False));
+   Partial_Sum, Partial_Max : array (Chunk_Number) of Natural := (others => 0);
+   Partial_Min              : array (Chunk_Number) of Natural := (others => Natural'Last);
+
+begin
+   for I in Grid'Range (1) loop
+      Grid (I, 1) := (for all J in Grid'Range (2) => Grid (I, J) = True);
+   end loop;
+
+   for I in Grid'Range (1) loop
+      declare
+         True_Count : constant Natural :=
+           [for J in Grid'Range(2) => (if Grid (I, J) then 1 else 0)]'Reduce("+",0);
+      begin
+         Partial_Sum (I) := @ + True_Count;
+         Partial_Min (I) := Natural'Min (@, True_Count);
+         Partial_Max (I) := Natural'Max (@, True_Count);
+      end;
+   end loop;
+
+  Put_Line ("Total=" & Natural'Image (Partial_Sum'Reduce ("+", 0)) &
+            ", Min=" & Natural'Image (Partial_Min'Reduce(Natural'Min, Natural'Last)) &
+            ", Max=" & Natural'Image (Partial_Max'Reduce(Natural'Max, 0)));
+
+  Put_Line ("Total=" & Partial_Sum'Reduce ("+", 0)'Image &
+            ", Min=" & Partial_Min'Reduce(Natural'Min, Natural'Last)'Image &
+            ", Max=" & Partial_Max'Reduce(Natural'Max, 0)'Image);
+
+end;
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gnat.dg/renaming18.adb
@@ -0,0 +1,24 @@
+-- { dg-do compile }
+-- { dg-options "-gnatwu" }
+
+procedure Renaming18 is
+
+  type T is record
+    Item : Integer;
+  end record;
+
+  A_T : T;
+  Item : Integer renames A_T.Item;
+
+  type VFA_T is record
+    Item : Integer;
+  end record
+  with Volatile_Full_Access;
+
+  A_VFA_T : VFA_T;
+  VFA_Item : Integer renames A_VFA_T.Item; -- { dg-bogus "is not referenced" }
+
+begin
+  Item := 42;
+  VFA_Item := 42;
+end;
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gnat.dg/specs/aggr9.ads
@@ -0,0 +1,26 @@
+-- PR ada/123289
+-- { dg-do compile }
+-- { dg-options "-gnat2022" }
+
+package Aggr9 is
+
+   type JSON_Value is tagged null record;
+   type JSON_Object is new JSON_Value with null record
+     with Aggregate => (Empty => Empty, Add_Named => Insert); -- { dg-error "exactly one" }
+   type JSON_Integer is new JSON_Value with null record
+     with Integer_Literal => From_Universal_Image;
+
+   function Empty return JSON_Object
+   is (null record);
+
+   procedure Insert
+      (O : in out JSON_Object; Key : String; Value : JSON_Integer'Class)
+   is null;
+
+   procedure Insert (O : in out JSON_Object; Key : String; Value : String)
+   is null;
+
+   function From_Universal_Image (Value : String) return JSON_Integer
+   is (null record);
+
+end Aggr9;
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gnat.dg/specs/limited_with3-child-grandchild-grandgrandchild.ads
@@ -0,0 +1,5 @@
+package Limited_With3.Child.Grandchild.Grandgrandchild is
+
+  function F return T is (Three);
+
+end Limited_With3.Child.Grandchild.Grandgrandchild;
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gnat.dg/specs/limited_with3-child-grandchild.ads
@@ -0,0 +1,5 @@
+package Limited_With3.Child.Grandchild is
+
+  function F return T is (Two);
+
+end Limited_With3.Child.Grandchild;
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gnat.dg/specs/limited_with3-child.ads
@@ -0,0 +1,7 @@
+package Limited_With3.Child is
+
+  type T is (One, Two, Three);
+
+  function F return T is (One);
+
+end Limited_With3.Child;
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gnat.dg/specs/limited_with3.ads
@@ -0,0 +1,4 @@
+limited with Limited_With3.Child;
+
+package Limited_With3 is
+end Limited_With3;
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gnat.dg/specs/opt7.ads
@@ -0,0 +1,15 @@
+-- { dg-do compile }
+-- { dg-options "-O2 -gnatn" }
+
+with Opt7_Pkg; use Opt7_Pkg;
+
+package Opt7 is
+
+  type Rec is record
+    E : Enum;
+  end record;
+
+  function Image (R : Rec) return String is
+    (if R.E = A then Image (R.E) else "");
+
+end Opt7;
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gnat.dg/specs/opt7_pkg.adb
@@ -0,0 +1,15 @@
+package body Opt7_Pkg is
+
+  type Constant_String_Access is access constant String;
+
+  type Enum_Name is array (Enum) of Constant_String_Access;
+
+  Enum_Name_Table : constant Enum_Name :=
+    (A => new String'("A"), B => new String'("B"));
+
+  function Image (E : Enum) return String is
+  begin
+    return Enum_Name_Table (E).all;
+  end Image;
+
+end Opt7_Pkg;
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gnat.dg/specs/opt7_pkg.ads
@@ -0,0 +1,9 @@
+-- { dg-excess-errors "no code generated" }
+
+package Opt7_Pkg is
+
+  type Enum is (A, B);
+
+  function Image (E : Enum) return String with Inline;
+
+end Opt7_Pkg;
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gnat.dg/specs/unchecked_union3.ads
@@ -0,0 +1,80 @@
+-- { dg-do compile }
+
+with Interfaces;
+
+package Unchecked_Union3 is
+
+   type T_CAN_ID is mod 2**29 with
+      Default_Value => 0,
+      Size          => 29;
+
+   type T_Node_ID is mod 2**7 with
+      Size          => 7,
+      Default_Value => 0;
+
+   type T_Message_Type_ID is new Interfaces.Unsigned_16;
+
+   type T_Service_Type_ID is new Interfaces.Unsigned_8;
+
+   type T_Priority is mod 2**5 with
+      Size          => 5,
+      Default_Value => 0;
+
+   type T_Format_Selector is
+     (CAN_Fields,
+      DroneCAN_Fields);
+
+   type T_Frame_Selector is
+     (Message_Frame,
+      Anonymous_Frame,
+      Service_Frame);
+
+   type Unsigned_2 is mod 2**2 with
+      Size          => 2,
+      Default_Value => 0;
+
+   type Unsigned_14 is mod 2**14 with
+      Size          => 14,
+      Default_Value => 0;
+
+   type T_Header (Format_Selector : T_Format_Selector := DroneCAN_Fields;
+      Frame_Selector              : T_Frame_Selector  := Message_Frame) is record
+      case Format_Selector is
+         when CAN_Fields =>
+            CAN_ID : T_CAN_ID;
+
+         when DroneCAN_Fields =>
+            Source_Node_ID      : T_Node_ID;
+            Service_Not_Message : Boolean := False;
+            Priority            : T_Priority;
+
+            case Frame_Selector is
+               when Message_Frame =>
+                  Message_Type_ID : T_Message_Type_ID;
+               when Anonymous_Frame =>
+                  Message_Type_ID_Lower_Bits : Unsigned_2;
+                  Discriminator              : Unsigned_14;
+               when Service_Frame =>
+                  Destination_Node_ID  : T_Node_ID;
+                  Request_Not_Response : Boolean := False;
+                  Service_Type_ID      : T_Service_Type_ID;
+            end case;
+      end case;
+   end record with
+      Unchecked_Union,
+      Size => 29;
+
+   for T_Header use record
+      CAN_ID                     at 0 range  0 .. 28;
+      Source_Node_ID             at 0 range  0 ..  6;
+      Service_Not_Message        at 0 range  7 ..  7;
+      Priority                   at 0 range 24 .. 28;
+      Message_Type_ID            at 0 range  8 .. 23;
+      Message_Type_ID_Lower_Bits at 0 range  8 ..  9;
+      Discriminator              at 0 range 10 .. 23;
+      Destination_Node_ID        at 0 range  8 .. 14;
+      Request_Not_Response       at 0 range 15 .. 15;
+      Service_Type_ID            at 0 range 16 .. 23;
+   end record;
+
+end Unchecked_Union3;
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/gnat.dg/sso20.adb
@@ -0,0 +1,29 @@
+--  { dg-do run }
+--  { dg-options "-O" }
+
+with Ada.Unchecked_Conversion;
+with Interfaces;  use Interfaces;
+with System;      use System;
+
+procedure SSO20 is
+
+  type Bytes_Ref is array (1 .. 4) of Unsigned_8
+    with Convention => Ada_Pass_By_Reference;
+
+  type U32_BE is record
+    Value : Unsigned_32;
+  end record
+    with
+      Pack,
+      Bit_Order            => High_Order_First,
+      Scalar_Storage_Order => High_Order_First;
+
+  function Conv is new Ada.Unchecked_Conversion (Bytes_Ref, U32_BE);
+
+  function Value (B : Bytes_Ref) return Unsigned_32 is (Conv (B).Value);
+
+begin
+  if Value ((16#11#, 16#22#, 16#33#, 16#44#)) /= 16#11223344# then
+     raise Program_Error;
+  end if;
+end;
--- a/src/gcc/testsuite/lib/lto.exp
+++ b/src/gcc/testsuite/lib/lto.exp
@@ -309,6 +309,43 @@ proc lto-obj { source dest optall optfile optstr xfaildata } {
     ${tool}_check_compile "$testcase $dest assemble" $optstr $dest $comp_output
 }
 
+proc lto-build-archive { testname objlist dest } {
+    global testcase
+    global tool
+    global GCC_UNDER_TEST
+
+    upvar dg-messages-by-file dg-messages-by-file
+
+    verbose "lto-build-archive" 2
+    file_on_host delete $dest
+
+    # Check that all of the objects were built successfully.
+    foreach obj [split $objlist] {
+	if ![file_on_host exists $obj] then {
+	    unresolved "$testcase $testname build-archive"
+	    return
+	}
+    }
+
+    # Hack up the gcc-ar command from $GCC_UNDER_TEST.
+    set ar_cmd [file dirname [lindex $GCC_UNDER_TEST 0]]
+    set ar_cmd "$ar_cmd/gcc-ar [lrange $GCC_UNDER_TEST 1 end]"
+    set ar_output [remote_exec host "$ar_cmd rcs $dest $objlist"]
+    set retval [lindex $ar_output 0]
+    set retmsg [lindex $ar_output 1]
+
+    # If any message remains, we fail.  Don't bother overriding tool since
+    # we're not really looking to match any specific error or warning patterns
+    # here.
+    if ![string match "0" $retval] then {
+	${tool}_fail $testcase "ar returned $retval: $retmsg"
+	return 0
+    } else {
+	${tool}_pass $testcase "archive"
+	return 0
+    }
+}
+
 # lto-link-and-maybe-run -- link the object files and run the executable
 # if compile_type is set to "run"
 #
@@ -379,7 +416,8 @@ proc lto-link-and-maybe-run { testname objlist dest optall optfile optstr } {
     }
 
     # Return if we only needed to link.
-    if { ![string compare "link" $compile_type] } {
+    if { ![string compare "link" $compile_type] \
+        || ![string compare "ar-link" $compile_type] } {
 	return
     }
 
@@ -510,6 +548,8 @@ proc lto-get-options-main { src } {
 		set compile_type "run"
 	    } elseif { ![string compare "link" $dgdo] } {
 		set compile_type "link"
+	    } elseif { ![string compare "ar-link" $dgdo] } {
+		set compile_type "ar-link"
 	    } else {
 		warning "lto.exp does not support dg-lto-do $dgdo"
 	    }
@@ -691,6 +731,12 @@ proc lto-execute-1 { src1 sid } {
     # Get the base name of this test, for use in messages.
     set testcase [lindex ${src_list} 0]
 
+    # The test needs to build all but the main file into an archive and then
+    # link them all together.
+    if { ![string compare "ar-link" $compile_type] } {
+        set arname "${sid}_${base}.a"
+    }
+
     # Remove the $srcdir and $tmpdir prefixes from $src1.  (It would
     # be possible to use "regsub" here, if we were careful to escape
     # all regular expression characters in $srcdir and $tmpdir, but
@@ -755,8 +801,24 @@ proc lto-execute-1 { src1 sid } {
 	    incr i
 	}
 
+	# Bundle all but the main file into an archive. Update objlist to only
+	# have the archive and the last file.
+	if { ![string compare "ar-link" $compile_type] } {
+	    set mainsrc [lindex $obj_list 0]
+	    set obj_list [lrange $obj_list 1 end]
+	    lto-build-archive \
+		"[lindex $obj_list 1]-[lindex $obj_list end]" \
+		$obj_list $arname
+
+	    set obj_list ""
+	    lappend obj_list $mainsrc
+	    lappend obj_list $arname
+	    set num_srcs 2
+	}
+
 	# Link (using the compiler under test), run, and clean up tests.
 	if { ![string compare "run" $compile_type] \
+	     || ![string compare "ar-link" $compile_type] \
 	     || ![string compare "link" $compile_type] } {
 
 	    # Filter out any link options we were asked to suppress.
@@ -772,6 +834,10 @@ proc lto-execute-1 { src1 sid } {
 		    "[lindex $obj_list 0]-[lindex $obj_list end]" \
 		    $obj_list $execname $filtered ${dg-extra-ld-options} \
 		    $filtered
+
+	    if (![string compare "ar-link" $compile_type]) {
+		file_on_host delete $arname
+	      }
 	}
 
 
@@ -818,6 +884,7 @@ proc lto-execute-1 { src1 sid } {
 	unset testname_with_flags
 	
 	if { ![string compare "run" $compile_type] \
+	     || ![string compare "ar-link" $compile_type] \
 	     || ![string compare "link" $compile_type] } {
 	    file_on_host delete $execname
 	}
--- a/src/gcc/testsuite/lib/multiline.exp
+++ b/src/gcc/testsuite/lib/multiline.exp
@@ -153,6 +153,9 @@ proc handle-multiline-outputs { text } {
     # If dg-enable-nn-line-numbers was provided, then obscure source-margin
     # line numbers by converting them to "NN" form.
     set text [maybe-handle-nn-line-numbers $text]
+
+    # Remove Windows .exe suffix
+    regsub -all "(as|cc1|cc1plus|collect2|f951|ld|lto-wrapper)\.exe?:" $text {\1:} text
     
     set index 0
     foreach entry $multiline_expected_outputs {
--- a/src/gcc/testsuite/lib/target-supports.exp
+++ b/src/gcc/testsuite/lib/target-supports.exp
@@ -5388,6 +5388,13 @@ proc add_options_for_aarch64_sve { flags } {
     return "$flags -march=armv8.2-a+sve"
 }
 
+proc add_options_for_aarch64_sme { flags } {
+    if { ![istarget aarch64*-*-*] || [check_effective_target_aarch64_sme] } {
+	return "$flags"
+    }
+    return "$flags -march=armv9-a+sme"
+}
+
 # Return 1 if this is an ARM target supporting the FP16 alternative
 # format.  Some multilibs may be incompatible with the options needed.  Also
 # set et_arm_fp16_alternative_flags to the best options to add.
@@ -6037,6 +6044,22 @@ foreach N { 128 256 512 1024 2048 } {
     }]
 }
 
+# Return true if this is an AArch64 target that can run SME code.
+
+proc check_effective_target_aarch64_sme_hw { } {
+    if { ![istarget aarch64*-*-*] } {
+	return 0
+    }
+    return [check_runtime aarch64_sme_hw_available {
+	int
+	main (void)
+	{
+	  asm volatile ("rdsvl x0, #1");
+	  return 0;
+	}
+    } [add_options_for_aarch64_sme ""]]
+}
+
 proc check_effective_target_arm_neonv2_hw { } {
     return [check_runtime arm_neon_hwv2_available {
 	#include "arm_neon.h"
@@ -12986,7 +13009,7 @@ proc add_options_for_arm_v8_3a_fp16_complex_neon { flags } {
 
 proc check_effective_target_arm_v8_3a_complex_neon_hw { } {
     if { ![check_effective_target_arm_v8_3a_complex_neon_ok] } {
-        return 1;
+	return 0;
     }
     return [check_runtime arm_v8_3a_complex_neon_hw_available {
         #include "arm_neon.h"
new file mode 100644
--- /dev/null
+++ b/src/gcc/testsuite/sparseset.supp
@@ -0,0 +1,10 @@
+{
+   SPARSESET1
+   Memcheck:Cond
+   fun:sparseset_bit_p
+}
+{
+   SPARSESET2
+   Memcheck:Value8
+   fun:sparseset_bit_p
+}
--- a/src/gcc/tree-chrec.cc
+++ b/src/gcc/tree-chrec.cc
@@ -1490,7 +1490,7 @@ convert_affine_scev (class loop *loop, tree type,
   new_step = *step;
   if (TYPE_PRECISION (step_type) > TYPE_PRECISION (ct) && TYPE_UNSIGNED (ct))
     {
-      tree signed_ct = build_nonstandard_integer_type (TYPE_PRECISION (ct), 0);
+      tree signed_ct = signed_type_for (ct);
       new_step = chrec_convert (signed_ct, new_step, at_stmt,
                                 use_overflow_semantics);
     }
--- a/src/gcc/tree-inline.cc
+++ b/src/gcc/tree-inline.cc
@@ -5232,7 +5232,20 @@ expand_call_inline (basic_block bb, gimple *stmt, copy_body_data *id,
   if (use_retvar && gimple_call_lhs (stmt))
     {
       gimple *old_stmt = stmt;
-      stmt = gimple_build_assign (gimple_call_lhs (stmt), use_retvar);
+      tree lhs = gimple_call_lhs (stmt);
+      if (!is_gimple_reg (lhs)
+	  && !is_gimple_reg (use_retvar)
+	  && is_gimple_reg_type (TREE_TYPE (lhs)))
+	{
+	  /* If both lhs and use_retvar aren't gimple regs, yet have
+	     gimple reg type, copy through a temporary SSA_NAME.  */
+	  gimple *g = gimple_build_assign (make_ssa_name (TREE_TYPE (lhs)),
+					   use_retvar);
+	  gimple_set_location (g, gimple_location (old_stmt));
+	  gsi_insert_before (&stmt_gsi, g, GSI_SAME_STMT);
+	  use_retvar = gimple_assign_lhs (g);
+	}
+      stmt = gimple_build_assign (lhs, use_retvar);
       gimple_set_location (stmt, gimple_location (old_stmt));
       gsi_replace (&stmt_gsi, stmt, false);
       maybe_clean_or_replace_eh_stmt (old_stmt, stmt);
--- a/src/gcc/tree-object-size.cc
+++ b/src/gcc/tree-object-size.cc
@@ -319,9 +319,11 @@ object_sizes_set_temp (struct object_size_info *osi, unsigned varno)
   tree val = object_sizes_get (osi, varno);
 
   if (size_initval_p (val, osi->object_size_type))
-    object_sizes_set (osi, varno,
-		      make_ssa_name (sizetype),
-		      make_ssa_name (sizetype));
+    {
+      val = make_ssa_name (sizetype);
+      tree wholeval = make_ssa_name (sizetype);
+      object_sizes_set (osi, varno, val, wholeval);
+    }
 }
 
 /* Initialize OFFSET_LIMIT variable.  */
--- a/src/gcc/tree-scalar-evolution.cc
+++ b/src/gcc/tree-scalar-evolution.cc
@@ -669,6 +669,17 @@ scev_dfs::add_to_evolution_1 (tree chrec_before, tree to_add, gimple *at_stmt)
 	  to_add = chrec_convert (type, to_add, at_stmt);
 	  right = chrec_convert_rhs (type, right, at_stmt);
 	  right = chrec_fold_plus (chrec_type (right), right, to_add);
+	  /* When we have an evolution in a non-wrapping type and
+	     in the process of accumulating CHREC_RIGHT there was
+	     overflow this indicates in the association that happened
+	     in building the CHREC clearly involved UB.  Avoid this.
+	     In building a CHREC we basically turn (a + INCR1) + INCR2
+	     into a + (INCR1 + INCR2) which is not always valid.
+	     Note this check only catches few invalid cases.  */
+	  if ((INTEGRAL_TYPE_P (type) && ! TYPE_OVERFLOW_WRAPS (type))
+	      && TREE_CODE (right) == INTEGER_CST
+	      && TREE_OVERFLOW (right))
+	    return chrec_dont_know;
 	  return build_polynomial_chrec (var, left, right);
 	}
       else
--- a/src/gcc/tree-sra.cc
+++ b/src/gcc/tree-sra.cc
@@ -2480,6 +2480,12 @@ sort_and_splice_var_accesses (tree var)
 		}
 	      unscalarizable_region = true;
 	    }
+	  /* If there the same place is accessed with two incompatible
+	     aggregate types, trying to base total scalarization on either of
+	     them can be wrong.  */
+	  if (!first_scalar && !types_compatible_p (access->type, ac2->type))
+	    bitmap_set_bit (cannot_scalarize_away_bitmap,
+			    DECL_UID (access->base));
 
 	  if (grp_same_access_path
 	      && (!ac2->grp_same_access_path
@@ -2865,7 +2871,10 @@ analyze_access_subtree (struct access *root, struct access *parent,
 
   for (child = root->first_child; child; child = child->next_sibling)
     {
-      hole |= covered_to < child->offset;
+      if (totally)
+	covered_to = child->offset;
+      else
+	hole |= covered_to < child->offset;
       sth_created |= analyze_access_subtree (child, root,
 					     allow_replacements && !scalar
 					     && !root->grp_partial_lhs,
@@ -2876,6 +2885,8 @@ analyze_access_subtree (struct access *root, struct access *parent,
 	covered_to += child->size;
       else
 	hole = true;
+      if (totally && !hole)
+	covered_to = limit;
     }
 
   if (allow_replacements && scalar && !root->first_child
@@ -2948,7 +2959,7 @@ analyze_access_subtree (struct access *root, struct access *parent,
 	root->grp_total_scalarization = 0;
     }
 
-  if (!hole || totally)
+  if (!hole)
     root->grp_covered = 1;
   else if (root->grp_write || comes_initialized_p (root->base))
     root->grp_unscalarized_data = 1; /* not covered and written to */
@@ -3217,6 +3228,7 @@ propagate_subaccesses_from_rhs (struct access *lacc, struct access *racc)
 	}
 
       if (rchild->grp_unscalarizable_region
+	  || (rchild->size % BITS_PER_UNIT) != 0
 	  || !budget_for_propagation_access (lacc->base))
 	{
 	  if (!lacc->grp_write && access_or_its_child_written (rchild))
@@ -3276,6 +3288,7 @@ propagate_subaccesses_from_lhs (struct access *lacc, struct access *racc)
       HOST_WIDE_INT norm_offset = lchild->offset + norm_delta;
 
       if (lchild->grp_unscalarizable_region
+	  || (lchild->size % BITS_PER_UNIT) != 0
 	  || child_would_conflict_in_acc (racc, norm_offset, lchild->size,
 					  &matching_acc)
 	  || !budget_for_propagation_access (racc->base))
--- a/src/gcc/tree-ssa-dse.cc
+++ b/src/gcc/tree-ssa-dse.cc
@@ -182,10 +182,10 @@ initialize_ao_ref_for_dse (gimple *stmt, ao_ref *write, bool may_def_ok = false)
 	       can provide a may-def variant.  */
 	    if (may_def_ok)
 	      {
-		ao_ref_init_from_ptr_and_size (
-		  write, gimple_call_arg (stmt, 0),
-		  TYPE_SIZE_UNIT (
-		    TREE_TYPE (gimple_call_arg (stmt, stored_value_index))));
+		ao_ref_init_from_ptr_and_range (
+		  write, gimple_call_arg (stmt, 0), true, 0, -1,
+		  tree_to_poly_int64 (TYPE_SIZE (
+		    TREE_TYPE (gimple_call_arg (stmt, stored_value_index)))));
 		return true;
 	      }
 	    break;
--- a/src/gcc/tree-ssa-loop-unswitch.cc
+++ b/src/gcc/tree-ssa-loop-unswitch.cc
@@ -1511,7 +1511,8 @@ hoist_guard (class loop *loop, edge guard)
 
   if (skip_count > e->count ())
     {
-      fprintf (dump_file, "  Capping count; expect profile inconsistency\n");
+      if (dump_file && (dump_flags & TDF_DETAILS))
+	fprintf (dump_file, "  Capping count; expect profile inconsistency\n");
       skip_count = e->count ();
     }
   if (dump_enabled_p ())
--- a/src/gcc/tree-ssa-math-opts.cc
+++ b/src/gcc/tree-ssa-math-opts.cc
@@ -1052,6 +1052,7 @@ pass_cse_reciprocals::execute (function *fun)
 		    continue;
 
 		  gimple_replace_ssa_lhs (call, arg1);
+		  reset_flow_sensitive_info (arg1);
 		  if (gimple_call_internal_p (call) != (ifn != IFN_LAST))
 		    {
 		      auto_vec<tree, 4> args;
@@ -3037,6 +3038,11 @@ convert_plusminus_to_widen (gimple_stmt_iterator *gsi, gimple *stmt,
   if (to_mode == from_mode)
     return false;
 
+  /* For fixed point types, the mode classes could be different
+     so reject that case. */
+  if (GET_MODE_CLASS (from_mode) != GET_MODE_CLASS (to_mode))
+    return false;
+
   from_unsigned1 = TYPE_UNSIGNED (type1);
   from_unsigned2 = TYPE_UNSIGNED (type2);
   optype = type1;
@@ -3867,6 +3873,7 @@ maybe_optimize_guarding_check (vec<gimple *> &mul_stmts, gimple *cond_stmt,
   else
     gimple_cond_make_false (zero_cond);
   update_stmt (zero_cond);
+  reset_flow_sensitive_info_in_bb (bb);
   *cfg_changed = true;
 }
 
@@ -4977,7 +4984,11 @@ match_uaddc_usubc (gimple_stmt_iterator *gsi, gimple *stmt, tree_code code)
 			TYPE_MODE (type)) == CODE_FOR_nothing
       || (rhs[2]
 	  && optab_handler (code == PLUS_EXPR ? uaddc5_optab : usubc5_optab,
-			    TYPE_MODE (type)) == CODE_FOR_nothing))
+			    TYPE_MODE (type)) == CODE_FOR_nothing)
+      || !types_compatible_p (type,
+			      TREE_TYPE (TREE_TYPE (gimple_call_lhs (ovf1))))
+      || !types_compatible_p (type,
+			      TREE_TYPE (TREE_TYPE (gimple_call_lhs (ovf2)))))
     return false;
   tree arg1, arg2, arg3 = NULL_TREE;
   gimple *re1 = NULL, *re2 = NULL;
--- a/src/gcc/tree-ssa-phiopt.cc
+++ b/src/gcc/tree-ssa-phiopt.cc
@@ -2824,10 +2824,8 @@ spaceship_replacement (basic_block cond_bb, basic_block middle_bb,
 	    {
 	      if (has_cast_debug_uses)
 		{
-		  tree temp3 = make_node (DEBUG_EXPR_DECL);
-		  DECL_ARTIFICIAL (temp3) = 1;
-		  TREE_TYPE (temp3) = TREE_TYPE (orig_use_lhs);
-		  SET_DECL_MODE (temp3, TYPE_MODE (type));
+		  tree temp3
+		    = build_debug_expr_decl (TREE_TYPE (orig_use_lhs));
 		  t = fold_convert (TREE_TYPE (temp3), temp2);
 		  g = gimple_build_debug_bind (temp3, t, phi);
 		  gsi_insert_before (&gsi, g, GSI_SAME_STMT);
@@ -3048,16 +3046,36 @@ cond_removal_in_builtin_zero_pattern (basic_block cond_bb,
       || arg != gimple_cond_lhs (cond))
     return false;
 
-  /* Canonicalize.  */
-  if ((e2->flags & EDGE_TRUE_VALUE
-       && gimple_cond_code (cond) == NE_EXPR)
-      || (e1->flags & EDGE_TRUE_VALUE
-	  && gimple_cond_code (cond) == EQ_EXPR))
+  edge true_edge, false_edge;
+  /* We need to know which is the true edge and which is the false
+     edge so that we know when to invert the condition below.  */
+  extract_true_false_edges_from_block (cond_bb, &true_edge, &false_edge);
+
+  /* Forward the edges over the middle basic block.  */
+  if (true_edge->dest == middle_bb)
+    true_edge = EDGE_SUCC (true_edge->dest, 0);
+  if (false_edge->dest == middle_bb)
+    false_edge = EDGE_SUCC (false_edge->dest, 0);
+
+  /* Canonicalize the args with respect to the edges,
+     arg0 is from the true edge and arg1 is from the
+     false edge.
+     That is `cond ? arg0 : arg1`.*/
+  if (true_edge == e1)
+    gcc_assert (false_edge == e2);
+  else
     {
+      gcc_assert (false_edge == e1);
+      gcc_assert (true_edge == e2);
       std::swap (arg0, arg1);
-      std::swap (e1, e2);
     }
 
+  /* Canonicalize the args such that we get:
+     `arg != 0 ? arg0 : arg1`. So swap arg0/arg1
+     around if cond was an equals.  */
+  if (gimple_cond_code (cond) == EQ_EXPR)
+    std::swap (arg0, arg1);
+
   /* Check PHI arguments.  */
   if (lhs != arg0
       || TREE_CODE (arg1) != INTEGER_CST)
--- a/src/gcc/tree-ssa-propagate.cc
+++ b/src/gcc/tree-ssa-propagate.cc
@@ -1011,6 +1011,8 @@ substitute_and_fold_engine::substitute_and_fold (basic_block block)
   while (!walker.stmts_to_fixup.is_empty ())
     {
       gimple *stmt = walker.stmts_to_fixup.pop ();
+      if (!gimple_bb (stmt))
+	continue;
       if (dump_file && dump_flags & TDF_DETAILS)
 	{
 	  fprintf (dump_file, "Fixing up noreturn call ");
--- a/src/gcc/tree-ssa-sccvn.cc
+++ b/src/gcc/tree-ssa-sccvn.cc
@@ -1592,6 +1592,8 @@ fully_constant_vn_reference_p (vn_reference_t ref)
 	      ++i;
 	      break;
 	    }
+	  if (operands[i].reverse)
+	    return NULL_TREE;
 	  if (known_eq (operands[i].off, -1))
 	    return NULL_TREE;
 	  off += operands[i].off;
@@ -2807,7 +2809,8 @@ vn_reference_lookup_3 (ao_ref *ref, tree vuse, void *data_,
          we find a VN result with exactly the same value as the
 	 possible clobber.  In this case we can ignore the clobber
 	 and return the found value.  */
-      if (is_gimple_reg_type (TREE_TYPE (lhs))
+      if (!gimple_has_volatile_ops (def_stmt)
+	  && is_gimple_reg_type (TREE_TYPE (lhs))
 	  && types_compatible_p (TREE_TYPE (lhs), vr->type)
 	  && (ref->ref || data->orig_ref.ref)
 	  && !data->mask
@@ -3091,7 +3094,8 @@ vn_reference_lookup_3 (ao_ref *ref, tree vuse, void *data_,
   else if (is_gimple_reg_type (vr->type)
 	   && gimple_assign_single_p (def_stmt)
 	   && gimple_assign_rhs_code (def_stmt) == CONSTRUCTOR
-	   && CONSTRUCTOR_NELTS (gimple_assign_rhs1 (def_stmt)) == 0)
+	   && CONSTRUCTOR_NELTS (gimple_assign_rhs1 (def_stmt)) == 0
+	   && !TREE_THIS_VOLATILE (gimple_assign_lhs (def_stmt)))
     {
       tree base2;
       poly_int64 offset2, size2, maxsize2;
@@ -3147,6 +3151,7 @@ vn_reference_lookup_3 (ao_ref *ref, tree vuse, void *data_,
 	   && !reverse_storage_order_for_component_p (vr->operands)
 	   && !contains_storage_order_barrier_p (vr->operands)
 	   && gimple_assign_single_p (def_stmt)
+	   && !TREE_THIS_VOLATILE (gimple_assign_lhs (def_stmt))
 	   && CHAR_BIT == 8
 	   && BITS_PER_UNIT == 8
 	   && BYTES_BIG_ENDIAN == WORDS_BIG_ENDIAN
@@ -3305,6 +3310,7 @@ vn_reference_lookup_3 (ao_ref *ref, tree vuse, void *data_,
 	   && !reverse_storage_order_for_component_p (vr->operands)
 	   && !contains_storage_order_barrier_p (vr->operands)
 	   && gimple_assign_single_p (def_stmt)
+	   && !TREE_THIS_VOLATILE (gimple_assign_lhs (def_stmt))
 	   && TREE_CODE (gimple_assign_rhs1 (def_stmt)) == SSA_NAME)
     {
       tree lhs = gimple_assign_lhs (def_stmt);
@@ -3516,6 +3522,7 @@ vn_reference_lookup_3 (ao_ref *ref, tree vuse, void *data_,
      the copy kills ref.  */
   else if (data->vn_walk_kind == VN_WALKREWRITE
 	   && gimple_assign_single_p (def_stmt)
+	   && !gimple_has_volatile_ops (def_stmt)
 	   && (DECL_P (gimple_assign_rhs1 (def_stmt))
 	       || TREE_CODE (gimple_assign_rhs1 (def_stmt)) == MEM_REF
 	       || handled_component_p (gimple_assign_rhs1 (def_stmt))))
--- a/src/gcc/tree-ssa-strlen.cc
+++ b/src/gcc/tree-ssa-strlen.cc
@@ -4011,8 +4011,16 @@ strlen_pass::handle_builtin_memcmp ()
 	  tree ptrtype = build_pointer_type_for_mode (char_type_node,
 						      ptr_mode, true);
 	  off = build_int_cst (ptrtype, 0);
-	  arg1 = build2_loc (loc, MEM_REF, type, arg1, off);
-	  arg2 = build2_loc (loc, MEM_REF, type, arg2, off);
+
+	  /* Create unaligned types if needed. */
+	  tree type1 = type, type2 = type;
+	  if (TYPE_ALIGN (type1) > align1)
+	    type1 = build_aligned_type (type1, align1);
+	  if (TYPE_ALIGN (type2) > align2)
+	    type2 = build_aligned_type (type2, align2);
+
+	  arg1 = build2_loc (loc, MEM_REF, type1, arg1, off);
+	  arg2 = build2_loc (loc, MEM_REF, type2, arg2, off);
 	  tree tem1 = fold_const_aggregate_ref (arg1);
 	  if (tem1)
 	    arg1 = tem1;
--- a/src/gcc/tree-ssa-structalias.cc
+++ b/src/gcc/tree-ssa-structalias.cc
@@ -3615,7 +3615,10 @@ get_constraint_for_1 (tree t, vec<ce_s> *results, bool address_p,
 		    size = -1;
 		  for (; curr; curr = vi_next (curr))
 		    {
-		      if (curr->offset - vi->offset < size)
+		      /* The start of the access might happen anywhere
+			 within vi, so conservatively assume it was
+			 at its end.  */
+		      if (curr->offset - (vi->offset + vi->size - 1) < size)
 			{
 			  cs.var = curr->id;
 			  results->safe_push (cs);
--- a/src/gcc/tree-switch-conversion.cc
+++ b/src/gcc/tree-switch-conversion.cc
@@ -716,7 +716,7 @@ void
 switch_conversion::build_arrays ()
 {
   tree arr_index_type;
-  tree tidx, sub, utype, tidxtype;
+  tree tidx, uidx, sub, utype, tidxtype;
   gimple *stmt;
   gimple_stmt_iterator gsi;
   gphi_iterator gpi;
@@ -741,19 +741,25 @@ switch_conversion::build_arrays ()
     tidxtype = utype;
 
   arr_index_type = build_index_type (m_range_size);
-  tidx = make_ssa_name (tidxtype);
+  uidx = make_ssa_name (utype);
   sub = fold_build2_loc (loc, MINUS_EXPR, utype,
 			 fold_convert_loc (loc, utype, m_index_expr),
 			 fold_convert_loc (loc, utype, m_range_min));
-  sub = fold_convert (tidxtype, sub);
   sub = force_gimple_operand_gsi (&gsi, sub,
 				  false, NULL, true, GSI_SAME_STMT);
-  stmt = gimple_build_assign (tidx, sub);
+  stmt = gimple_build_assign (uidx, sub);
 
   gsi_insert_before (&gsi, stmt, GSI_SAME_STMT);
-  update_stmt (stmt);
   m_arr_ref_first = stmt;
 
+  tidx = uidx;
+  if (tidxtype != utype)
+    {
+      tidx = make_ssa_name (tidxtype);
+      stmt = gimple_build_assign (tidx, NOP_EXPR, uidx);
+      gsi_insert_before (&gsi, stmt, GSI_SAME_STMT);
+    }
+
   for (gpi = gsi_start_phis (m_final_bb), i = 0;
        !gsi_end_p (gpi); gsi_next (&gpi))
     {
--- a/src/gcc/tree-vect-data-refs.cc
+++ b/src/gcc/tree-vect-data-refs.cc
@@ -7058,7 +7058,8 @@ vect_can_force_dr_alignment_p (const_tree decl, poly_uint64 alignment)
     return false;
 
   if (decl_in_symtab_p (decl)
-      && !symtab_node::get (decl)->can_increase_alignment_p ())
+      && (!symtab_node::get (decl)
+	  || !symtab_node::get (decl)->can_increase_alignment_p ()))
     return false;
 
   if (TREE_STATIC (decl))
--- a/src/gcc/tree-vect-loop.cc
+++ b/src/gcc/tree-vect-loop.cc
@@ -6134,7 +6134,8 @@ vect_create_epilog_for_reduction (loop_vec_info loop_vinfo,
       /* Create an induction variable.  */
       gimple_stmt_iterator incr_gsi;
       bool insert_after;
-      vect_iv_increment_position (loop_exit, &incr_gsi, &insert_after);
+      vect_iv_increment_position (LOOP_VINFO_IV_EXIT (loop_vinfo),
+				  &incr_gsi, &insert_after);
       create_iv (series_vect, PLUS_EXPR, vec_step, NULL_TREE, loop, &incr_gsi,
 		 insert_after, &indx_before_incr, &indx_after_incr);
 
@@ -9205,6 +9206,36 @@ vectorizable_recurr (loop_vec_info loop_vinfo, stmt_vec_info stmt_info,
       return false;
     }
 
+  /* We need to be able to build a { ..., a, b } init vector with
+     dist number of distinct trailing values.  Always possible
+     when dist == 1 or when nunits is constant or when the initializations
+     are uniform.  */
+  tree uniform_initval = NULL_TREE;
+  edge pe = loop_preheader_edge (LOOP_VINFO_LOOP (loop_vinfo));
+  if (slp_node)
+    for (stmt_vec_info s : SLP_TREE_SCALAR_STMTS (slp_node))
+      {
+	gphi *phi = as_a <gphi *> (s->stmt);
+	if (! uniform_initval)
+	  uniform_initval = PHI_ARG_DEF_FROM_EDGE (phi, pe);
+	else if (! operand_equal_p (uniform_initval,
+				    PHI_ARG_DEF_FROM_EDGE (phi, pe)))
+	  {
+	    uniform_initval = NULL_TREE;
+	    break;
+	  }
+      }
+  else
+    uniform_initval = PHI_ARG_DEF_FROM_EDGE (phi, pe);
+  if (!uniform_initval && !nunits.is_constant ())
+    {
+      if (dump_enabled_p ())
+	dump_printf_loc (MSG_MISSED_OPTIMIZATION, vect_location,
+			 "cannot build initialization vector for "
+			 "first order recurrence\n");
+      return false;
+    }
+
   /* First-order recurrence autovectorization needs to handle permutation
      with indices = [nunits-1, nunits, nunits+1, ...].  */
   vec_perm_builder sel (nunits, 1, 3);
@@ -9273,21 +9304,38 @@ vectorizable_recurr (loop_vec_info loop_vinfo, stmt_vec_info stmt_info,
       return true;
     }
 
-  edge pe = loop_preheader_edge (LOOP_VINFO_LOOP (loop_vinfo));
-  basic_block bb = gimple_bb (phi);
-  tree preheader = PHI_ARG_DEF_FROM_EDGE (phi, pe);
-  if (!useless_type_conversion_p (TREE_TYPE (vectype), TREE_TYPE (preheader)))
+  tree vec_init;
+  if (! uniform_initval)
     {
-      gimple_seq stmts = NULL;
-      preheader = gimple_convert (&stmts, TREE_TYPE (vectype), preheader);
-      gsi_insert_seq_on_edge_immediate (pe, stmts);
+      vec<constructor_elt, va_gc> *v = NULL;
+      vec_alloc (v, nunits.to_constant ());
+      for (unsigned i = 0; i < nunits.to_constant () - dist; ++i)
+	CONSTRUCTOR_APPEND_ELT (v, NULL_TREE,
+				build_zero_cst (TREE_TYPE (vectype)));
+      for (stmt_vec_info s : SLP_TREE_SCALAR_STMTS (slp_node))
+	{
+	  gphi *phi = as_a <gphi *> (s->stmt);
+	  tree preheader = PHI_ARG_DEF_FROM_EDGE (phi, pe);
+	  if (!useless_type_conversion_p (TREE_TYPE (vectype),
+					  TREE_TYPE (preheader)))
+	    {
+	      gimple_seq stmts = NULL;
+	      preheader = gimple_convert (&stmts,
+					  TREE_TYPE (vectype), preheader);
+	      gsi_insert_seq_on_edge_immediate (pe, stmts);
+	    }
+	  CONSTRUCTOR_APPEND_ELT (v, NULL_TREE, preheader);
+	}
+      vec_init = build_constructor (vectype, v);
     }
-  tree vec_init = build_vector_from_val (vectype, preheader);
+  else
+    vec_init = uniform_initval;
   vec_init = vect_init_vector (loop_vinfo, stmt_info, vec_init, vectype, NULL);
 
   /* Create the vectorized first-order PHI node.  */
   tree vec_dest = vect_get_new_vect_var (vectype,
 					 vect_simple_var, "vec_recur_");
+  basic_block bb = gimple_bb (phi);
   gphi *new_phi = create_phi_node (vec_dest, bb);
   add_phi_arg (new_phi, vec_init, pe, UNKNOWN_LOCATION);
 
--- a/src/gcc/tree-vect-slp-patterns.cc
+++ b/src/gcc/tree-vect-slp-patterns.cc
@@ -841,15 +841,23 @@ compatible_complex_nodes_p (slp_compat_nodes_map_t *compat_cache,
   return true;
 }
 
+
+/* Check to see if the oprands to two multiplies, 2 each in LEFT_OP and
+   RIGHT_OP match a complex multiplication  or complex multiply-and-accumulate
+   or complex multiply-and-subtract pattern.  Do this using the permute cache
+   PERM_CACHE and the combination compatibility list COMPAT_CACHE.  If
+   the operation is successful the macthing operands are returned in OPS and
+   _STATUS indicates if the operation matched includes a conjugate of one of the
+   operands.  If the operation succeeds True is returned, otherwise False and
+   the values in ops are meaningless.  */
 static inline bool
 vect_validate_multiplication (slp_tree_to_load_perm_map_t *perm_cache,
 			      slp_compat_nodes_map_t *compat_cache,
-			      vec<slp_tree> &left_op,
-			      vec<slp_tree> &right_op,
-			      bool subtract,
+			      const vec<slp_tree> &left_op,
+			      const vec<slp_tree> &right_op,
+			      bool subtract, vec<slp_tree> &ops,
 			      enum _conj_status *_status)
 {
-  auto_vec<slp_tree> ops;
   enum _conj_status stats = CONJ_NONE;
 
   /* The complex operations can occur in two layouts and two permute sequences
@@ -880,31 +888,31 @@ vect_validate_multiplication (slp_tree_to_load_perm_map_t *perm_cache,
   bool neg0 = vect_match_expression_p (right_op[0], NEGATE_EXPR);
   bool neg1 = vect_match_expression_p (right_op[1], NEGATE_EXPR);
 
+  /* Create the combined inputs after remapping and flattening.  */
+  ops.create (4);
+  ops.safe_splice (left_op);
+  ops.safe_splice (right_op);
+
   /* Determine which style we're looking at.  We only have different ones
      whenever a conjugate is involved.  */
   if (neg0 && neg1)
     ;
   else if (neg0)
     {
-      right_op[0] = SLP_TREE_CHILDREN (right_op[0])[0];
+      ops[2] = SLP_TREE_CHILDREN (right_op[0])[0];
       stats = CONJ_FST;
       if (subtract)
 	perm = 0;
     }
   else if (neg1)
     {
-      right_op[1] = SLP_TREE_CHILDREN (right_op[1])[0];
+      ops[3] = SLP_TREE_CHILDREN (right_op[1])[0];
       stats = CONJ_SND;
       perm = 1;
     }
 
   *_status = stats;
 
-  /* Flatten the inputs after we've remapped them.  */
-  ops.create (4);
-  ops.safe_splice (left_op);
-  ops.safe_splice (right_op);
-
   /* Extract out the elements to check.  */
   slp_tree op0 = ops[styles[style][0]];
   slp_tree op1 = ops[styles[style][1]];
@@ -1067,15 +1075,16 @@ complex_mul_pattern::matches (complex_operation_t op,
     return IFN_LAST;
 
   enum _conj_status status;
+  auto_vec<slp_tree> res_ops;
   if (!vect_validate_multiplication (perm_cache, compat_cache, left_op,
-				     right_op, false, &status))
+				     right_op, false, res_ops, &status))
     {
       /* Try swapping the order and re-trying since multiplication is
 	 commutative.  */
       std::swap (left_op[0], left_op[1]);
       std::swap (right_op[0], right_op[1]);
       if (!vect_validate_multiplication (perm_cache, compat_cache, left_op,
-					 right_op, false, &status))
+					 right_op, false, res_ops, &status))
 	return IFN_LAST;
     }
 
@@ -1103,24 +1112,24 @@ complex_mul_pattern::matches (complex_operation_t op,
   if (add0)
     ops->quick_push (add0);
 
-  complex_perm_kinds_t kind = linear_loads_p (perm_cache, left_op[0]);
+  complex_perm_kinds_t kind = linear_loads_p (perm_cache, res_ops[0]);
   if (kind == PERM_EVENODD || kind == PERM_TOP)
     {
-      ops->quick_push (left_op[1]);
-      ops->quick_push (right_op[1]);
-      ops->quick_push (left_op[0]);
+      ops->quick_push (res_ops[1]);
+      ops->quick_push (res_ops[3]);
+      ops->quick_push (res_ops[0]);
     }
   else if (kind == PERM_EVENEVEN && status != CONJ_SND)
     {
-      ops->quick_push (left_op[0]);
-      ops->quick_push (right_op[0]);
-      ops->quick_push (left_op[1]);
+      ops->quick_push (res_ops[0]);
+      ops->quick_push (res_ops[2]);
+      ops->quick_push (res_ops[1]);
     }
   else
     {
-      ops->quick_push (left_op[0]);
-      ops->quick_push (right_op[1]);
-      ops->quick_push (left_op[1]);
+      ops->quick_push (res_ops[0]);
+      ops->quick_push (res_ops[3]);
+      ops->quick_push (res_ops[1]);
     }
 
   return ifn;
@@ -1292,15 +1301,17 @@ complex_fms_pattern::matches (complex_operation_t op,
     return IFN_LAST;
 
   enum _conj_status status;
+  auto_vec<slp_tree> res_ops;
   if (!vect_validate_multiplication (perm_cache, compat_cache, right_op,
-				     left_op, true, &status))
+				     left_op, true, res_ops, &status))
     {
       /* Try swapping the order and re-trying since multiplication is
 	 commutative.  */
       std::swap (left_op[0], left_op[1]);
       std::swap (right_op[0], right_op[1]);
+      auto_vec<slp_tree> res_ops;
       if (!vect_validate_multiplication (perm_cache, compat_cache, right_op,
-					 left_op, true, &status))
+					 left_op, true, res_ops, &status))
 	return IFN_LAST;
     }
 
@@ -1315,20 +1326,20 @@ complex_fms_pattern::matches (complex_operation_t op,
   ops->truncate (0);
   ops->create (4);
 
-  complex_perm_kinds_t kind = linear_loads_p (perm_cache, right_op[0]);
+  complex_perm_kinds_t kind = linear_loads_p (perm_cache, res_ops[2]);
   if (kind == PERM_EVENODD)
     {
       ops->quick_push (l0node[0]);
-      ops->quick_push (right_op[0]);
-      ops->quick_push (right_op[1]);
-      ops->quick_push (left_op[1]);
+      ops->quick_push (res_ops[2]);
+      ops->quick_push (res_ops[3]);
+      ops->quick_push (res_ops[1]);
     }
   else
     {
       ops->quick_push (l0node[0]);
-      ops->quick_push (right_op[1]);
-      ops->quick_push (right_op[0]);
-      ops->quick_push (left_op[0]);
+      ops->quick_push (res_ops[3]);
+      ops->quick_push (res_ops[2]);
+      ops->quick_push (res_ops[0]);
     }
 
   return ifn;
--- a/src/gcc/tree-vect-stmts.cc
+++ b/src/gcc/tree-vect-stmts.cc
@@ -3945,6 +3945,8 @@ vectorizable_simd_clone_call (vec_info *vinfo, stmt_vec_info stmt_info,
 
   vec<tree>& simd_clone_info = (slp_node ? SLP_TREE_SIMD_CLONE_INFO (slp_node)
 				: STMT_VINFO_SIMD_CLONE_INFO (stmt_info));
+  if (!vec_stmt)
+    simd_clone_info.truncate (0);
   arginfo.reserve (nargs, true);
   auto_vec<slp_tree> slp_op;
   slp_op.safe_grow_cleared (nargs);
@@ -3993,10 +3995,10 @@ vectorizable_simd_clone_call (vec_info *vinfo, stmt_vec_info stmt_info,
 
       /* For linear arguments, the analyze phase should have saved
 	 the base and step in {STMT_VINFO,SLP_TREE}_SIMD_CLONE_INFO.  */
-      if (i * 3 + 4 <= simd_clone_info.length ()
+      if (vec_stmt
+	  && i * 3 + 4 <= simd_clone_info.length ()
 	  && simd_clone_info[i * 3 + 2])
 	{
-	  gcc_assert (vec_stmt);
 	  thisarginfo.linear_step = tree_to_shwi (simd_clone_info[i * 3 + 2]);
 	  thisarginfo.op = simd_clone_info[i * 3 + 1];
 	  thisarginfo.simd_lane_linear
@@ -4051,7 +4053,7 @@ vectorizable_simd_clone_call (vec_info *vinfo, stmt_vec_info stmt_info,
   unsigned group_size = slp_node ? SLP_TREE_LANES (slp_node) : 1;
   unsigned int badness = 0;
   struct cgraph_node *bestn = NULL;
-  if (simd_clone_info.exists ())
+  if (vec_stmt)
     bestn = cgraph_node::get (simd_clone_info[0]);
   else
     for (struct cgraph_node *n = node->simd_clones; n != NULL;
@@ -6556,7 +6558,8 @@ vectorizable_operation (vec_info *vinfo,
   poly_uint64 nunits_in;
   poly_uint64 nunits_out;
   tree vectype_out;
-  int ncopies, vec_num;
+  unsigned int ncopies;
+  unsigned vec_num;
   int i;
   vec<tree> vec_oprnds0 = vNULL;
   vec<tree> vec_oprnds1 = vNULL;
@@ -7133,8 +7136,8 @@ vectorizable_operation (vec_info *vinfo,
 	      && code == BIT_AND_EXPR
 	      && VECTOR_BOOLEAN_TYPE_P (vectype))
 	    {
-	      if (loop_vinfo->scalar_cond_masked_set.contains ({ op0,
-								 ncopies}))
+	      if (loop_vinfo->scalar_cond_masked_set.contains
+						   ({ op0, vec_num * ncopies}))
 		{
 		  mask = vect_get_loop_mask (loop_vinfo, gsi, masks,
 					     vec_num * ncopies, vectype, i);
@@ -7143,8 +7146,8 @@ vectorizable_operation (vec_info *vinfo,
 					   vop0, gsi);
 		}
 
-	      if (loop_vinfo->scalar_cond_masked_set.contains ({ op1,
-								 ncopies }))
+	      if (loop_vinfo->scalar_cond_masked_set.contains
+						  ({ op1, vec_num * ncopies }))
 		{
 		  mask = vect_get_loop_mask (loop_vinfo, gsi, masks,
 					     vec_num * ncopies, vectype, i);
@@ -14261,6 +14264,8 @@ supportable_widening_operation (vec_info *vinfo,
 
       internal_fn lo, hi, even, odd;
       lookup_hilo_internal_fn (ifn, &lo, &hi);
+      if (BYTES_BIG_ENDIAN)
+	std::swap (lo, hi);
       *code1 = as_combined_fn (lo);
       *code2 = as_combined_fn (hi);
       optab1 = direct_internal_fn_optab (lo, {vectype, vectype});
--- a/src/gcc/tree-vrp.cc
+++ b/src/gcc/tree-vrp.cc
@@ -86,14 +86,16 @@ along with GCC; see the file COPYING3.  If not see
 class remove_unreachable {
 public:
   remove_unreachable (gimple_ranger &r, bool all) : m_ranger (r), final_p (all)
-    { m_list.create (30); }
-  ~remove_unreachable () { m_list.release (); }
+    { m_list.create (30); m_tmp = BITMAP_ALLOC (NULL); }
+  ~remove_unreachable () { BITMAP_FREE (m_tmp); m_list.release (); }
   void handle_early (gimple *s, edge e);
   void maybe_register (gimple *s);
   bool remove_and_update_globals ();
+  bool fully_replaceable (tree name, basic_block bb);
   vec<std::pair<int, int> > m_list;
   gimple_ranger &m_ranger;
   bool final_p;
+  bitmap m_tmp;
 };
 
 // Check if block BB has a __builtin_unreachable () call on one arm, and
@@ -139,8 +141,8 @@ remove_unreachable::maybe_register (gimple *s)
 //    goto <bb 3>; [0.00%]
 //  Any additional use of _1 or _2 in this block invalidates early replacement.
 
-static bool
-fully_replaceable (tree name, basic_block bb)
+bool
+remove_unreachable::fully_replaceable (tree name, basic_block bb)
 {
   use_operand_p use_p;
   imm_use_iterator iter;
@@ -208,9 +210,11 @@ remove_unreachable::handle_early (gimple *s, edge e)
   gcc_checking_assert (gimple_outgoing_range_stmt_p (e->src) == s);
   gcc_checking_assert (!final_p);
 
-  // Check if every export use is dominated by this branch.
+  // Check if every export and its dependencies are dominated by this branch.
+  // Dependencies are required as it needs to dominate potential
+  // recalculations.  See PR 123300.
   tree name;
-  FOR_EACH_GORI_EXPORT_NAME (m_ranger.gori (), e->src, name)
+  FOR_EACH_GORI_EXPORT_AND_DEP_NAME (m_ranger.gori (), e->src, name, m_tmp)
     {
       if (!fully_replaceable (name, e->src))
 	return;
--- a/src/gcc/tree.cc
+++ b/src/gcc/tree.cc
@@ -6616,13 +6616,27 @@ simple_cst_equal (const_tree t1, const_tree t2)
 	vec<constructor_elt, va_gc> *v2 = CONSTRUCTOR_ELTS (t2);
 
 	if (vec_safe_length (v1) != vec_safe_length (v2))
-	  return false;
+	  return 0;
 
         for (idx = 0; idx < vec_safe_length (v1); ++idx)
-	  /* ??? Should we handle also fields here? */
-	  if (!simple_cst_equal ((*v1)[idx].value, (*v2)[idx].value))
-	    return false;
-	return true;
+	  {
+	    if ((*v1)[idx].index
+		&& TREE_CODE ((*v1)[idx].index) == FIELD_DECL)
+	      {
+		if ((*v1)[idx].index != (*v2)[idx].index)
+		  return 0;
+	      }
+	    else
+	      {
+		cmp = simple_cst_equal ((*v1)[idx].index, (*v2)[idx].index);
+		if (cmp <= 0)
+		  return cmp;
+	      }
+	    cmp = simple_cst_equal ((*v1)[idx].value, (*v2)[idx].value);
+	    if (cmp <= 0)
+	      return cmp;
+	  }
+	return 1;
       }
 
     case SAVE_EXPR:
@@ -14160,10 +14174,25 @@ verify_type (const_tree t)
     }
   if (TYPE_MAIN_VARIANT (t) == t && ct && TYPE_MAIN_VARIANT (ct) != ct)
    {
-      error ("%<TYPE_CANONICAL%> of main variant is not main variant");
-      debug_tree (ct);
-      debug_tree (TYPE_MAIN_VARIANT (ct));
-      error_found = true;
+     /* This can happen when build_type_attribute_variant is called on
+	C/C++ arrays of qualified types.  volatile int[2] is unqualified
+	ARRAY_TYPE with volatile int element type.
+	TYPE_CANONICAL (volatile int) is itself and so is
+	TYPE_CANONICAL (volatile int[2]).  build_type_attribute_qual_variant
+	creates a distinct type copy (so TYPE_MAIN_VARIANT is itself) and sets
+	its TYPE_CANONICAL to the unqualified ARRAY_TYPE (so volatile int[2]).
+	But this is not the TYPE_MAIN_VARIANT, which is int[2].  So, just
+	verify that TYPE_MAIN_VARIANT (ct) is already the final type we
+	need.  */
+      tree mvc = TYPE_MAIN_VARIANT (ct);
+      if (TYPE_CANONICAL (mvc) != mvc)
+	{
+	  error ("main variant of %<TYPE_CANONICAL%> of main variant is not"
+		 " its own %<TYPE_CANONICAL%>");
+	  debug_tree (ct);
+	  debug_tree (TYPE_MAIN_VARIANT (ct));
+	  error_found = true;
+	}
    }
 
 
@@ -15014,6 +15043,13 @@ valid_new_delete_pair_p (tree new_asm, tree delete_asm,
   if ((new_name[2] != 'w' || delete_name[2] != 'l')
       && (new_name[2] != 'a' || delete_name[2] != 'a'))
     return false;
+  if (new_name[3] == 'I' || delete_name[3] == 'I')
+    {
+      /* When ::operator new or ::operator delete are function templates,
+	 return uncertain mismatch, we need demangler in that case.  */
+      *pcertain = false;
+      return false;
+    }
   /* 'j', 'm' and 'y' correspond to size_t.  */
   if (new_name[3] != 'j' && new_name[3] != 'm' && new_name[3] != 'y')
     return false;
--- a/src/gcc/vr-values.cc
+++ b/src/gcc/vr-values.cc
@@ -983,6 +983,10 @@ range_fits_type_p (const irange *vr,
   widest_int tem;
   signop src_sgn;
 
+  /* Now we can only handle ranges with constant bounds.  */
+  if (vr->undefined_p () || vr->varying_p ())
+    return false;
+
   /* We can only handle integral and pointer types.  */
   src_type = vr->type ();
   if (!INTEGRAL_TYPE_P (src_type)
@@ -991,17 +995,13 @@ range_fits_type_p (const irange *vr,
 
   /* An extension is fine unless VR is SIGNED and dest_sgn is UNSIGNED,
      and so is an identity transform.  */
-  src_precision = TYPE_PRECISION (vr->type ());
+  src_precision = TYPE_PRECISION (src_type);
   src_sgn = TYPE_SIGN (src_type);
   if ((src_precision < dest_precision
        && !(dest_sgn == UNSIGNED && src_sgn == SIGNED))
       || (src_precision == dest_precision && src_sgn == dest_sgn))
     return true;
 
-  /* Now we can only handle ranges with constant bounds.  */
-  if (vr->undefined_p () || vr->varying_p ())
-    return false;
-
   wide_int vrmin = vr->lower_bound ();
   wide_int vrmax = vr->upper_bound ();
 
--- a/src/libcody/ChangeLog
+++ b/src/libcody/ChangeLog
@@ -1,3 +1,20 @@
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-11-21  Jakub Jelinek  <jakub@redhat.com>
+
+	* cody.hh (S2C): For __cpp_char8_t >= 201811 use char8_t instead of
+	char in argument type.
+	(MessageBuffer::Space): Revert 2025-11-15 change.
+	(MessageBuffer::Append): For __cpp_char8_t >= 201811 add overload
+	with char8_t const * type of first argument.
+	(Packet::Packet): Similarly for first argument.
+	* client.cc (CommunicationError, Client::ProcessResponse,
+	Client::Connect, ConnectResponse, PathnameResponse, OKResponse,
+	IncludeTranslateResponse): Cast u8 string literals to (const char *)
+	where needed.
+	* server.cc (Server::ProcessRequests, ConnectRequest): Likewise.
+
 2025-05-23  Release Manager
 
 	* GCC 14.3.0 released.
--- a/src/libcody/client.cc
+++ b/src/libcody/client.cc
@@ -97,7 +97,7 @@ int Client::CommunicateWithServer ()
 
 static Packet CommunicationError (int err)
 {
-  std::string e {u8"communication error:"};
+  std::string e {(const char *) u8"communication error:"};
   e.append (strerror (err));
 
   return Packet (Client::PC_ERROR, std::move (e));
@@ -110,33 +110,34 @@ Packet Client::ProcessResponse (std::vector<std::string> &words,
     {
       if (e == EINVAL)
 	{
-	  std::string msg (u8"malformed string '");
+	  std::string msg ((const char *) u8"malformed string '");
 	  msg.append (words[0]);
-	  msg.append (u8"'");
+	  msg.append ((const char *) u8"'");
 	  return Packet (Client::PC_ERROR, std::move (msg));
 	}
       else
-	return Packet (Client::PC_ERROR, u8"missing response");
+	return Packet (Client::PC_ERROR, (const char *) u8"missing response");
     }
 
   Assert (!words.empty ());
-  if (words[0] == u8"ERROR")
+  if (words[0] == (const char *) u8"ERROR")
     return Packet (Client::PC_ERROR,
-		   words.size () == 2 ? words[1]: u8"malformed error response");
+		   words.size () == 2 ? words[1]
+		   : (const char *) u8"malformed error response");
 
   if (isLast && !read.IsAtEnd ())
     return Packet (Client::PC_ERROR,
-		   std::string (u8"unexpected extra response"));
+		   std::string ((const char *) u8"unexpected extra response"));
 
   Assert (code < Detail::RC_HWM);
   Packet result (responseTable[code] (words));
   result.SetRequest (code);
   if (result.GetCode () == Client::PC_ERROR && result.GetString ().empty ())
     {
-      std::string msg {u8"malformed response '"};
+      std::string msg {(const char *) u8"malformed response '"};
 
       read.LexedLine (msg);
-      msg.append (u8"'");
+      msg.append ((const char *) u8"'");
       result.GetString () = std::move (msg);
     }
   else if (result.GetCode () == Client::PC_CONNECT)
@@ -199,7 +200,7 @@ Packet Client::Connect (char const *agent, char const *ident,
 			  size_t alen, size_t ilen)
 {
   write.BeginLine ();
-  write.AppendWord (u8"HELLO");
+  write.AppendWord ((const char *) u8"HELLO");
   write.AppendInteger (Version);
   write.AppendWord (agent, true, alen);
   write.AppendWord (ident, true, ilen);
@@ -211,7 +212,8 @@ Packet Client::Connect (char const *agent, char const *ident,
 // HELLO $version $agent [$flags]
 Packet ConnectResponse (std::vector<std::string> &words)
 {
-  if (words[0] == u8"HELLO" && (words.size () == 3 || words.size () == 4))
+  if (words[0] == (const char *) u8"HELLO"
+      && (words.size () == 3 || words.size () == 4))
     {
       char *eptr;
       unsigned long val = strtoul (words[1].c_str (), &eptr, 10);
@@ -247,7 +249,7 @@ Packet Client::ModuleRepo ()
 // PATHNAME $dir | ERROR
 Packet PathnameResponse (std::vector<std::string> &words)
 {
-  if (words[0] == u8"PATHNAME" && words.size () == 2)
+  if (words[0] == (const char *) u8"PATHNAME" && words.size () == 2)
     return Packet (Client::PC_PATHNAME, std::move (words[1]));
 
   return Packet (Client::PC_ERROR, u8"");
@@ -256,7 +258,7 @@ Packet PathnameResponse (std::vector<std::string> &words)
 // OK or ERROR
 Packet OKResponse (std::vector<std::string> &words)
 {
-  if (words[0] == u8"OK")
+  if (words[0] == (const char *) u8"OK")
     return Packet (Client::PC_OK);
   else
     return Packet (Client::PC_ERROR,
@@ -319,11 +321,11 @@ Packet Client::IncludeTranslate (char const *include, Flags flags, size_t ilen)
 // PATHNAME $cmifile
 Packet IncludeTranslateResponse (std::vector<std::string> &words)
 {
-  if (words[0] == u8"BOOL" && words.size () == 2)
+  if (words[0] == (const char *) u8"BOOL" && words.size () == 2)
     {
-      if (words[1] == u8"FALSE")
-	return Packet (Client::PC_BOOL, 0);
-      else if (words[1] == u8"TRUE")
+      if (words[1] == (const char *) u8"FALSE")
+	return Packet (Client::PC_BOOL);
+      else if (words[1] == (const char *) u8"TRUE")
 	return Packet (Client::PC_BOOL, 1);
       else
 	return Packet (Client::PC_ERROR, u8"");
--- a/src/libcody/cody.hh
+++ b/src/libcody/cody.hh
@@ -47,12 +47,21 @@ namespace Detail  {
 
 // C++11 doesn't have utf8 character literals :(
 
+#if __cpp_char8_t >= 201811
+template<unsigned I>
+constexpr char S2C (char8_t const (&s)[I])
+{
+  static_assert (I == 2, "only single octet strings may be converted");
+  return s[0];
+}
+#else
 template<unsigned I>
 constexpr char S2C (char const (&s)[I])
 {
   static_assert (I == 2, "only single octet strings may be converted");
   return s[0];
 }
+#endif
 
 /// Internal buffering class.  Used to concatenate outgoing messages
 /// and Lex incoming ones.
@@ -123,6 +132,13 @@ public:
       Space ();
     Append (str, maybe_quote, len);
   }
+#if __cpp_char8_t >= 201811
+  void AppendWord (char8_t const *str, bool maybe_quote = false,
+		   size_t len = ~size_t (0))
+  {
+    AppendWord ((const char *) str, maybe_quote, len);
+  }
+#endif
   /// Add a word as with AppendWord
   /// @param str the string to append
   /// @param maybe_quote string might need quoting, as for Append
@@ -264,6 +280,12 @@ public:
     : string (s), cat (STRING), code (c)
   {
   }
+#if __cpp_char8_t >= 201811
+  Packet (unsigned c, const char8_t *s)
+    : string ((const char *) s), cat (STRING), code (c)
+  {
+  }
+#endif
   Packet (unsigned c, std::vector<std::string> &&v)
     : vector (std::move (v)), cat (VECTOR), code (c)
   {
--- a/src/libcody/server.cc
+++ b/src/libcody/server.cc
@@ -36,12 +36,12 @@ static RequestPair
   const requestTable[Detail::RC_HWM] =
   {
     // Same order as enum RequestCode
-    RequestPair {u8"HELLO", nullptr},
-    RequestPair {u8"MODULE-REPO", ModuleRepoRequest},
-    RequestPair {u8"MODULE-EXPORT", ModuleExportRequest},
-    RequestPair {u8"MODULE-IMPORT", ModuleImportRequest},
-    RequestPair {u8"MODULE-COMPILED", ModuleCompiledRequest},
-    RequestPair {u8"INCLUDE-TRANSLATE", IncludeTranslateRequest},
+    RequestPair {(const char *) u8"HELLO", nullptr},
+    RequestPair {(const char *) u8"MODULE-REPO", ModuleRepoRequest},
+    RequestPair {(const char *) u8"MODULE-EXPORT", ModuleExportRequest},
+    RequestPair {(const char *) u8"MODULE-IMPORT", ModuleImportRequest},
+    RequestPair {(const char *) u8"MODULE-COMPILED", ModuleCompiledRequest},
+    RequestPair {(const char *) u8"INCLUDE-TRANSLATE", IncludeTranslateRequest},
   };
 }
 
@@ -135,21 +135,21 @@ void Server::ProcessRequests (void)
 	  std::string msg;
 
 	  if (err > 0)
-	    msg = u8"error processing '";
+	    msg = (const char *) u8"error processing '";
 	  else if (ix >= Detail::RC_HWM)
-	    msg = u8"unrecognized '";
+	    msg = (const char *) u8"unrecognized '";
 	  else if (IsConnected () && ix == Detail::RC_CONNECT)
-	    msg = u8"already connected '";
+	    msg = (const char *) u8"already connected '";
 	  else if (!IsConnected () && ix != Detail::RC_CONNECT)
-	    msg = u8"not connected '";
+	    msg = (const char *) u8"not connected '";
 	  else
-	    msg = u8"malformed '";
+	    msg = (const char *) u8"malformed '";
 
 	  read.LexedLine (msg);
-	  msg.append (u8"'");
+	  msg.append ((const char *) u8"'");
 	  if (err > 0)
 	    {
-	      msg.append (u8" ");
+	      msg.append ((const char *) u8" ");
 	      msg.append (strerror (err));
 	    }
 	  resolver->ErrorResponse (this, std::move (msg));
@@ -176,7 +176,7 @@ Resolver *ConnectRequest (Server *s, Resolver *r,
     return nullptr;
 
   if (words.size () == 3)
-    words.emplace_back (u8"");
+    words.emplace_back ((const char *) u8"");
   unsigned version = ParseUnsigned (words[1]);
   if (version == ~0u)
     return nullptr;
--- a/src/libcpp/ChangeLog
+++ b/src/libcpp/ChangeLog
@@ -1,3 +1,29 @@
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-03-13  Jakub Jelinek  <jakub@redhat.com>
+
+	PR preprocessor/105412
+	* files.cc (_cpp_stack_file): Call deps_add_dep even on
+	empty file path.
+	* mkdeps.cc (class mkdeps): Add first_phony_dep member.
+	(mkdeps::mkdeps ()): Initialize it to 1.
+	(deps_add_dep): When called first with "" argument, decrease
+	d->first_phony_dep to 0.
+	(make_write): For -MP iterate from d->first_phony_dep
+	rather than 1.
+
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-01-30  Jakub Jelinek  <jakub@redhat.com>
+
+	PR preprocessor/123273
+	* lex.cc (cpp_directive_only_process): Only go to done_comment
+	for '/' if star is true and esc is false.  When seeing '\\' with
+	esc set to true, clear esc as well as star instead of keeping esc
+	set.
+
 2025-05-23  Release Manager
 
 	* GCC 14.3.0 released.
--- a/src/libcpp/files.cc
+++ b/src/libcpp/files.cc
@@ -972,7 +972,6 @@ _cpp_stack_file (cpp_reader *pfile, _cpp_file *file, include_type type,
       /* Add the file to the dependencies on its first inclusion.  */
       if (CPP_OPTION (pfile, deps.style) > (sysp != 0)
 	  && !file->stack_count
-	  && file->path[0]
 	  && !(pfile->main_file == file
 	       && CPP_OPTION (pfile, deps.ignore_main_file)))
 	deps_add_dep (pfile->deps, file->path);
--- a/src/libcpp/lex.cc
+++ b/src/libcpp/lex.cc
@@ -5369,7 +5369,13 @@ cpp_directive_only_process (cpp_reader *pfile,
 		    switch (c)
 		      {
 		      case '\\':
-			esc = true;
+			if (esc)
+			  {
+			    star = false;
+			    esc = false;
+			  }
+			else
+			  esc = true;
 			break;
 
 		      case '\r':
@@ -5400,7 +5406,7 @@ cpp_directive_only_process (cpp_reader *pfile,
 			break;
 
 		      case '/':
-			if (star)
+			if (star && !esc)
 			  goto done_comment;
 			/* FALLTHROUGH  */
 
--- a/src/libcpp/mkdeps.cc
+++ b/src/libcpp/mkdeps.cc
@@ -81,8 +81,9 @@ public:
   };
 
   mkdeps ()
-    : primary_output (NULL), module_name (NULL), cmi_name (NULL)
-    , is_header_unit (false), is_exported (false), quote_lwm (0)
+    : primary_output (NULL), module_name (NULL), cmi_name (NULL),
+      is_header_unit (false), is_exported (false), quote_lwm (0),
+      first_phony_dep (1)
   {
   }
   ~mkdeps ()
@@ -118,6 +119,7 @@ public:
   bool is_header_unit;
   bool is_exported;
   unsigned short quote_lwm;
+  unsigned int first_phony_dep;
 };
 
 /* Apply Make quoting to STR, TRAIL.  Note that it's not possible to
@@ -318,11 +320,17 @@ fdeps_add_target (struct mkdeps *d, const char *o, bool is_primary)
 void
 deps_add_dep (class mkdeps *d, const char *t)
 {
-  gcc_assert (*t);
-
-  t = apply_vpath (d, t);
+  if (*t)
+    {
+      t = apply_vpath (d, t);
 
-  d->deps.push (xstrdup (t));
+      d->deps.push (xstrdup (t));
+    }
+  /* When called first with "", remember we should
+     emit for -MP all dependencies rather than just
+     second and following dependency.  See PR105412.  */
+  else if (d->deps.size () == 0)
+    d->first_phony_dep = 0;
 }
 
 void
@@ -439,7 +447,7 @@ make_write (const cpp_reader *pfile, FILE *fp, unsigned int colmax)
       make_write_vec (d->deps, fp, column, colmax);
       fputs ("\n", fp);
       if (CPP_OPTION (pfile, deps.phony_targets))
-	for (unsigned i = 1; i < d->deps.size (); i++)
+	for (unsigned i = d->first_phony_dep; i < d->deps.size (); i++)
 	  fprintf (fp, "%s:\n", munge (d->deps[i]));
     }
 
--- a/src/libgcc/ChangeLog
+++ b/src/libgcc/ChangeLog
@@ -1,3 +1,13 @@
+2025-08-15  Richard Sandiford  <richard.sandiford@arm.com>
+
+	Backported from master:
+	2025-07-17  Richard Sandiford  <richard.sandiford@arm.com>
+		    Yury Khrustalev  <yury.khrustalev@arm.com>
+
+	* config/aarch64/linux-unwind.h (aarch64_fallback_frame_state):
+	If a signal was raised while there was an uncommitted lazy save,
+	commit the save as part of the unwind process.
+
 2025-05-23  Release Manager
 
 	* GCC 14.3.0 released.
--- a/src/libgcc/config/aarch64/linux-unwind.h
+++ b/src/libgcc/config/aarch64/linux-unwind.h
@@ -27,7 +27,7 @@
 
 #include <signal.h>
 #include <sys/ucontext.h>
-
+#include <stdint.h>
 
 /* Since insns are always stored LE, on a BE system the opcodes will
    be loaded byte-reversed.  Therefore, define two sets of opcodes,
@@ -43,6 +43,22 @@
 
 #define MD_FALLBACK_FRAME_STATE_FOR aarch64_fallback_frame_state
 
+#ifndef FPSIMD_MAGIC
+#define FPSIMD_MAGIC 0x46508001
+#endif
+
+#ifndef TPIDR2_MAGIC
+#define TPIDR2_MAGIC 0x54504902
+#endif
+
+#ifndef ZA_MAGIC
+#define ZA_MAGIC 0x54366345
+#endif
+
+#ifndef EXTRA_MAGIC
+#define EXTRA_MAGIC 0x45585401
+#endif
+
 static _Unwind_Reason_Code
 aarch64_fallback_frame_state (struct _Unwind_Context *context,
 			      _Unwind_FrameState * fs)
@@ -58,6 +74,21 @@ aarch64_fallback_frame_state (struct _Unwind_Context *context,
     ucontext_t uc;
   };
 
+  struct tpidr2_block
+  {
+    uint64_t za_save_buffer;
+    uint16_t num_za_save_slices;
+    uint8_t reserved[6];
+  };
+
+  struct za_block
+  {
+    struct _aarch64_ctx head;
+    uint16_t vl;
+    uint16_t reserved[3];
+    uint64_t data;
+  };
+
   struct rt_sigframe *rt_;
   _Unwind_Ptr new_cfa;
   unsigned *pc = context->ra;
@@ -103,11 +134,15 @@ aarch64_fallback_frame_state (struct _Unwind_Context *context,
      field can be used to skip over unrecognized context extensions.
      The end of the context sequence is marked by a context with magic
      0 or size 0.  */
+  struct tpidr2_block *tpidr2 = 0;
+  struct za_block *za_ctx = 0;
+
   for (extension_marker = (struct _aarch64_ctx *) &sc->__reserved;
        extension_marker->magic;
        extension_marker = (struct _aarch64_ctx *)
        ((unsigned char *) extension_marker + extension_marker->size))
     {
+    restart:
       if (extension_marker->magic == FPSIMD_MAGIC)
 	{
 	  struct fpsimd_context *ctx =
@@ -139,12 +174,83 @@ aarch64_fallback_frame_state (struct _Unwind_Context *context,
 	      fs->regs.reg[AARCH64_DWARF_V0 + i].loc.offset = offset;
 	    }
 	}
+      else if (extension_marker->magic == TPIDR2_MAGIC)
+	{
+	  /* A TPIDR2 context.
+
+	     All the casting is to support big-endian ILP32.  We could read
+	     directly into TPIDR2 otherwise.  */
+	  struct { struct _aarch64_ctx h; uint64_t tpidr2; } *ctx
+		  = (void *)extension_marker;
+#if defined (__ILP32__)
+	  tpidr2 = (struct tpidr2_block *) (uintptr_t) ctx->tpidr2;
+#else
+	  tpidr2 = (struct tpidr2_block *) ctx->tpidr2;
+#endif
+	}
+      else if (extension_marker->magic == ZA_MAGIC)
+	/* A ZA context.  We interpret this later.  */
+	za_ctx = (void *)extension_marker;
+      else if (extension_marker->magic == EXTRA_MAGIC)
+	{
+	  /* Extra context.  The ABI guarantees that the next _aarch64_ctx
+	     in the current list will be the zero terminator, so we can simply
+	     switch to the new list and continue from there.  The new list is
+	     also zero-terminated.
+
+	     As above, the casting is to support big-endian ILP32.  */
+	  struct { struct _aarch64_ctx h; uint64_t next; } *ctx
+		  = (void *)extension_marker;
+#if defined (__ILP32__)
+	  extension_marker = (struct _aarch64_ctx *) (uintptr_t) ctx->next;
+#else
+	  extension_marker = (struct _aarch64_ctx *) ctx->next;
+#endif
+	  goto restart;
+	}
       else
 	{
 	  /* There is context provided that we do not recognize!  */
 	}
     }
 
+  /* Signal handlers are entered with ZA in the off state (TPIDR2_ELO==0 and
+     PSTATE.ZA==0).  The normal process when transitioning from ZA being
+     dormant to ZA being off is to commit the lazy save; see the AAPCS64
+     for details.  However, this is not done when entering a signal handler.
+     Instead, linux saves the old contents of ZA and TPIDR2_EL0 to the
+     sigcontext without interpreting them further.
+
+     Therefore, if a signal handler throws an exception to code outside the
+     signal handler, the unwinder must commit the lazy save after the fact.
+     Committing a lazy save means:
+
+     (1) Storing the contents of ZA into the buffer provided by TPIDR2_EL0.
+     (2) Setting TPIDR2_EL0 to zero.
+     (3) Turning ZA off.
+
+     (2) and (3) have already been done by the call to __libgcc_arm_za_disable.
+     (1) involves copying data from the ZA sigcontext entry to the
+     corresponding lazy save buffer.  */
+  if (tpidr2 && za_ctx && tpidr2->za_save_buffer)
+    {
+      /* There is a 16-bit vector length (measured in bytes) at ZA_CTX + 8.
+	 The data itself starts at ZA_CTX + 16.
+	 As above, the casting is to support big-endian ILP32.  */
+      uint16_t vl = za_ctx->vl;
+#if defined (__ILP32__)
+      void *save_buffer = (void *) (uintptr_t) tpidr2->za_save_buffer;
+      const void *za_buffer = (void *) (uintptr_t) &za_ctx->data;
+#else
+      void *save_buffer = (void *) tpidr2->za_save_buffer;
+      const void *za_buffer = (void *) &za_ctx->data;
+#endif
+      uint64_t num_slices = tpidr2->num_za_save_slices;
+      if (num_slices > vl)
+	num_slices = vl;
+      memcpy (save_buffer, za_buffer, num_slices * vl);
+    }
+
   fs->regs.how[31] = REG_SAVED_OFFSET;
   fs->regs.reg[31].loc.offset = (_Unwind_Ptr) & (sc->sp) - new_cfa;
 
--- a/src/libgcc/config/avr/libf7/ChangeLog
+++ b/src/libgcc/config/avr/libf7/ChangeLog
@@ -1,3 +1,94 @@
+2025-10-09  Georg-Johann Lay  <avr@gjlay.de>
+
+	Backported from master:
+	2025-10-09  Georg-Johann Lay  <avr@gjlay.de>
+
+	PR target/122222
+	* libf7-asm.sx (D_floatsidf, D_floatunsidf): New modules.
+	* libf7-common.mk (F7_ASM_PARTS): Add D_floatsidf, D_floatunsidf.
+	(F7F, g_dx): Remove floatunsidf, floatsidf.
+	* libf7.c (f7_set_s32): Don't alias to f7_floatsidf.
+	(f7_set_u32): Don't alias to f7_floatunsidf.
+	* f7-renames.h: Rebuild
+	* f7-wraps.h: Rebuild.
+
+2025-10-09  Georg-Johann Lay  <avr@gjlay.de>
+
+	Backported from master:
+	2025-10-09  Georg-Johann Lay  <avr@gjlay.de>
+
+	PR target/122220
+	* libf7-asm.sx (to_integer): Return 0x80... on negative overflow.
+
+2025-10-09  Georg-Johann Lay  <avr@gjlay.de>
+
+	Backported from master:
+	2025-10-09  Georg-Johann Lay  <avr@gjlay.de>
+
+	PR target/122210
+	* libf7-common.mk (F7_ASM_PARTS): Add D2<fx> modules.
+	* libf7-asm.sx: Implement the D2<fx> modules.
+
+2025-10-09  Georg-Johann Lay  <avr@gjlay.de>
+
+	Backported from master:
+	2025-10-09  Georg-Johann Lay  <avr@gjlay.de>
+
+	PR target/122210
+	* libf7-common.mk (F7_ASM_PARTS): Add <fx>2D modules.
+	* libf7-asm.sx: Implement the <fx>2D modules.
+
+2025-10-09  Georg-Johann Lay  <avr@gjlay.de>
+
+	Backported from master:
+	2025-10-06  Georg-Johann Lay  <avr@gjlay.de>
+
+	* libf7-common.mk (F7_ASM_PARTS): Add D_sincos.
+	* libf7-asm.sx: (D_sincos): New module implements sincos / sincosl.
+
+2025-10-09  Georg-Johann Lay  <avr@gjlay.de>
+
+	Backported from master:
+	2025-10-06  Georg-Johann Lay  <avr@gjlay.de>
+
+	PR target/122177
+	* libf7-common.mk (m_ddd): Remove: fmin, fmax.
+	(F7_ASM_PARTS): Add: D_fminfmax.
+	* libf7-asm.sx (D_fmanfmax): New module.
+	* f7-wraps.h: Rebuild.
+
+2025-10-09  Georg-Johann Lay  <avr@gjlay.de>
+
+	Backported from master:
+	2025-10-06  Georg-Johann Lay  <avr@gjlay.de>
+
+	* libf7-common.mk (g_xdd_cmp): Remove le, lt, ge, gt, ne, eq, unord.
+	(F7_ASM_PARTS): Add D_cmp, D_eq, D_ne, D_ge, D_gt, D_le, D_lt, D_unord.
+	* libf7-asm.sx (D_cmp, D_eq, D_ne, D_ge, D_gt, D_le, D_lt, D_unord):
+	New modules.
+	* f7-wraps.h: Rebuild.
+
+2025-10-09  Georg-Johann Lay  <avr@gjlay.de>
+
+	Backported from master:
+	2025-05-27  Georg-Johann Lay  <avr@gjlay.de>
+
+	PR target/120442
+	* libf7-common.mk (LIBF_C_PARTS, m_ddd): Add fdim.
+	* libf7.h (f7_fdim): New proto.
+	* libf7.c (f7_fdim): New function.
+	* f7renames.sh (f7_fdim): Add rename.
+	* f7-wraps.h: Rebuild
+	* f7-renames.h: Rebuild
+
+2025-05-27  Georg-Johann Lay  <avr@gjlay.de>
+
+	Backported from master:
+	2025-05-27  Georg-Johann Lay  <avr@gjlay.de>
+
+	PR target/120441
+	* libf7.c (f7_exp): Limit aa->expo to 10 (not to 9).
+
 2025-05-23  Release Manager
 
 	* GCC 14.3.0 released.
--- a/src/libgcc/config/avr/libf7/f7-renames.h
+++ b/src/libgcc/config/avr/libf7/f7-renames.h
@@ -97,6 +97,7 @@
 #define f7_acos __f7_acos
 #define f7_atan __f7_atan
 #define f7_atan2 __f7_atan2
+#define f7_fdim __f7_fdim
 #define f7_mul_noround __f7_mul_noround
 #define f7_sqrt16_round __f7_sqrt16_round
 #define f7_sqrt16_floor __f7_sqrt16_floor
@@ -158,8 +159,6 @@
 #define f7_min __f7_min
 #define f7_max __f7_max
 #define f7_exp10 __f7_exp10
-#define f7_floatunsidf __f7_floatunsidf
-#define f7_floatsidf __f7_floatsidf
 #define f7_extendsfdf2 __f7_extendsfdf2
 #define f7_fixdfsi __f7_fixdfsi
 #define f7_fixdfdi __f7_fixdfdi
--- a/src/libgcc/config/avr/libf7/f7-wraps.h
+++ b/src/libgcc/config/avr/libf7/f7-wraps.h
@@ -79,77 +79,7 @@ _ENDF __divdf3
 #endif /* F7MOD_D_div_ */
 
 ;; Functions that usually live in libgcc: __<name>df2 for <name> in:
-;; le lt ge gt ne eq unord
-
-;; bool __ledf2 (double, double)  ; le
-#ifdef F7MOD_D_le_
-_DEFUN __ledf2
-    .global F7_NAME(le_impl)
-    ldi     ZH,     hi8(gs(F7_NAME(le_impl)))
-    ldi     ZL,     lo8(gs(F7_NAME(le_impl)))
-    F7jmp   call_xdd
-_ENDF __ledf2
-#endif /* F7MOD_D_le_ */
-
-;; bool __ltdf2 (double, double)  ; lt
-#ifdef F7MOD_D_lt_
-_DEFUN __ltdf2
-    .global F7_NAME(lt_impl)
-    ldi     ZH,     hi8(gs(F7_NAME(lt_impl)))
-    ldi     ZL,     lo8(gs(F7_NAME(lt_impl)))
-    F7jmp   call_xdd
-_ENDF __ltdf2
-#endif /* F7MOD_D_lt_ */
-
-;; bool __gedf2 (double, double)  ; ge
-#ifdef F7MOD_D_ge_
-_DEFUN __gedf2
-    .global F7_NAME(ge_impl)
-    ldi     ZH,     hi8(gs(F7_NAME(ge_impl)))
-    ldi     ZL,     lo8(gs(F7_NAME(ge_impl)))
-    F7jmp   call_xdd
-_ENDF __gedf2
-#endif /* F7MOD_D_ge_ */
-
-;; bool __gtdf2 (double, double)  ; gt
-#ifdef F7MOD_D_gt_
-_DEFUN __gtdf2
-    .global F7_NAME(gt_impl)
-    ldi     ZH,     hi8(gs(F7_NAME(gt_impl)))
-    ldi     ZL,     lo8(gs(F7_NAME(gt_impl)))
-    F7jmp   call_xdd
-_ENDF __gtdf2
-#endif /* F7MOD_D_gt_ */
-
-;; bool __nedf2 (double, double)  ; ne
-#ifdef F7MOD_D_ne_
-_DEFUN __nedf2
-    .global F7_NAME(ne_impl)
-    ldi     ZH,     hi8(gs(F7_NAME(ne_impl)))
-    ldi     ZL,     lo8(gs(F7_NAME(ne_impl)))
-    F7jmp   call_xdd
-_ENDF __nedf2
-#endif /* F7MOD_D_ne_ */
-
-;; bool __eqdf2 (double, double)  ; eq
-#ifdef F7MOD_D_eq_
-_DEFUN __eqdf2
-    .global F7_NAME(eq_impl)
-    ldi     ZH,     hi8(gs(F7_NAME(eq_impl)))
-    ldi     ZL,     lo8(gs(F7_NAME(eq_impl)))
-    F7jmp   call_xdd
-_ENDF __eqdf2
-#endif /* F7MOD_D_eq_ */
-
-;; bool __unorddf2 (double, double)  ; unord
-#ifdef F7MOD_D_unord_
-_DEFUN __unorddf2
-    .global F7_NAME(unord_impl)
-    ldi     ZH,     hi8(gs(F7_NAME(unord_impl)))
-    ldi     ZL,     lo8(gs(F7_NAME(unord_impl)))
-    F7jmp   call_xdd
-_ENDF __unorddf2
-#endif /* F7MOD_D_unord_ */
+;; (none)
 
 ;; Functions that usually live in libgcc: __<name> for <name> in:
 ;; fixdfsi fixdfdi fixunsdfdi fixunsdfsi truncdfsf2
@@ -205,27 +135,7 @@ _ENDF __truncdfsf2
 #endif /* F7MOD_D_truncdfsf2_ */
 
 ;; Functions that usually live in libgcc: __<name> for <name> in:
-;; floatunsidf floatsidf extendsfdf2
-
-;; double __floatunsidf (type_t)  ; floatunsidf
-#ifdef F7MOD_D_floatunsidf_
-_DEFUN __floatunsidf
-    .global F7_NAME(floatunsidf)
-    ldi     ZH,     hi8(gs(F7_NAME(floatunsidf)))
-    ldi     ZL,     lo8(gs(F7_NAME(floatunsidf)))
-    F7jmp   call_dx
-_ENDF __floatunsidf
-#endif /* F7MOD_D_floatunsidf_ */
-
-;; double __floatsidf (type_t)  ; floatsidf
-#ifdef F7MOD_D_floatsidf_
-_DEFUN __floatsidf
-    .global F7_NAME(floatsidf)
-    ldi     ZH,     hi8(gs(F7_NAME(floatsidf)))
-    ldi     ZL,     lo8(gs(F7_NAME(floatsidf)))
-    F7jmp   call_dx
-_ENDF __floatsidf
-#endif /* F7MOD_D_floatsidf_ */
+;; extendsfdf2
 
 ;; double __extendsfdf2 (type_t)  ; extendsfdf2
 #ifdef F7MOD_D_extendsfdf2_
@@ -239,7 +149,7 @@ _ENDF __extendsfdf2
 
 ;; Functions that usually live in libm:  Depending on [long] double layout,
 ;; define <name> and <name>l as weak alias(es) of __<name> for <name> in:
-;; pow fmin fmax fmod hypot atan2
+;; pow fmod hypot atan2 fdim
 
 ;; double __pow (double, double)
 #ifdef F7MOD_D_pow_
@@ -253,30 +163,6 @@ _DEFUN __pow
 _ENDF __pow
 #endif /* F7MOD_D_pow_ */
 
-;; double __fmin (double, double)
-#ifdef F7MOD_D_fmin_
-_DEFUN __fmin
-    DALIAS fmin
-    LALIAS fminl
-    .global F7_NAME(fmin)
-    ldi     ZH,     hi8(gs(F7_NAME(fmin)))
-    ldi     ZL,     lo8(gs(F7_NAME(fmin)))
-    F7jmp   call_ddd
-_ENDF __fmin
-#endif /* F7MOD_D_fmin_ */
-
-;; double __fmax (double, double)
-#ifdef F7MOD_D_fmax_
-_DEFUN __fmax
-    DALIAS fmax
-    LALIAS fmaxl
-    .global F7_NAME(fmax)
-    ldi     ZH,     hi8(gs(F7_NAME(fmax)))
-    ldi     ZL,     lo8(gs(F7_NAME(fmax)))
-    F7jmp   call_ddd
-_ENDF __fmax
-#endif /* F7MOD_D_fmax_ */
-
 ;; double __fmod (double, double)
 #ifdef F7MOD_D_fmod_
 _DEFUN __fmod
@@ -313,6 +199,18 @@ _DEFUN __atan2
 _ENDF __atan2
 #endif /* F7MOD_D_atan2_ */
 
+;; double __fdim (double, double)
+#ifdef F7MOD_D_fdim_
+_DEFUN __fdim
+    DALIAS fdim
+    LALIAS fdiml
+    .global F7_NAME(fdim)
+    ldi     ZH,     hi8(gs(F7_NAME(fdim)))
+    ldi     ZL,     lo8(gs(F7_NAME(fdim)))
+    F7jmp   call_ddd
+_ENDF __fdim
+#endif /* F7MOD_D_fdim_ */
+
 ;; Functions that usually live in libm:  Depending on [long] double layout,
 ;; define <name> and <name>l as weak alias(es) of __<name> for <name> in:
 ;; ldexp frexp
--- a/src/libgcc/config/avr/libf7/f7renames.sh
+++ b/src/libgcc/config/avr/libf7/f7renames.sh
@@ -35,9 +35,9 @@ EOF
 
     c)
         if [ x${PRE} != xf7_ ]; then
-            echo " "
+            echo ""
             echo "/* Renames for libf7.c, libf7.h.  */"
-            echo " "
+            echo ""
             for x in $*; do
                 echo "#define f7_$x ${PRE}$x"
             done
@@ -46,9 +46,9 @@ EOF
 
     cst)
         if [ x${PRE} != xf7_ ]; then
-            echo " "
+            echo ""
             echo "/* Renames for libf7.c, libf7.h.  */"
-            echo " "
+            echo ""
             for x in $*; do
                 echo "#define f7_const_${x}   ${PRE}const_${x}"
                 echo "#define f7_const_${x}_P ${PRE}const_${x}_P"
@@ -58,9 +58,9 @@ EOF
 
     asm)
         if [ x${PRE} != xf7_ ]; then
-            echo " "
+            echo ""
             echo "/* Renames for libf7-asm.sx, f7-wraps.h.  */"
-            echo " "
+            echo ""
             for x in $*; do
                 echo "#define f7_${x}_asm ${PRE}${x}_asm"
             done
--- a/src/libgcc/config/avr/libf7/libf7-asm.sx
+++ b/src/libgcc/config/avr/libf7/libf7-asm.sx
@@ -618,21 +618,7 @@ DEFUN to_integer
 .Lsaturate.T:
 
 #if F7_HAVE_Inf
-    brtc .Lset_0x7fff
-    ;; -Inf  =>  return 1 + INTxx_MIN
-    mov     ZL,     Flags
-    .global __clr_8
-    XCALL   __clr_8
-    ldi     C6,     0x80
-
-    ldi     CA+0,   0x01
-
-    sbrs    Mask,   5
-    ldi     CA+4,   0x01
-
-    sbrs    Mask,   4
-    ldi     CA+6,   0x01
-    ret
+    brts .Lset_0x8000
 
 .Lset_0x7fff:
     ;; +Inf  =>  return INTxx_MAX
@@ -644,7 +630,7 @@ DEFUN to_integer
 #endif /* F7_HAVE_Inf */
 
 .Lset_0x8000:
-    ;; NaN  =>  return INTxx_MIN
+    ;; NaN  or -Inf =>  return INTxx_MIN
     .global __clr_8
     XCALL   __clr_8
     ldi     C6,     0x80
@@ -1727,6 +1713,321 @@ ENDF class_D
 #endif /* F7MOD_D_class_ */
 
 
+#ifdef F7MOD_D_cmp_
+
+#define A0  18
+#define A1  A0 + 1
+#define A2  A0 + 2
+#define A3  A0 + 3
+#define A4  A0 + 4
+#define A5  A0 + 5
+#define A6  A0 + 6
+#define A7  A0 + 7
+
+#define B0  10
+#define B1  B0 + 1
+#define B2  B0 + 2
+#define B3  B0 + 3
+#define B4  B0 + 4
+#define B5  B0 + 5
+#define B6  B0 + 6
+#define B7  B0 + 7
+
+#define AA5  XH
+#define AA6  ZL
+#define AA7  ZH
+
+#define BB0  A0
+#define BB1  A1
+#define BB2  A2
+#define BB3  A3
+#define BB4  A4
+#define BB5  A5
+#define BB6  A6
+#define BB7  A7
+
+;;; Helper for __<cmp>df2 and __unorddf2.
+;;; T = 1: Comparison is unordered.
+;;; T = 0: Comparison is ordered, and Z, N, C, S flags are set according
+;;; to compare (double A, double B) as if set by a signed int comparison.
+;;; Note that f(+0) = f(-0) = 0.
+;;; In any case:
+;;; -  return R24 = 1.
+;;; -  return R25.0 = isNaN (A)
+;;; -  return R25.1 = isNaN (B)
+DEFUN D_cmp
+    rcall   D_cmp.map_i64
+    bld     __tmp_reg__, 0
+    push    __tmp_reg__
+    ;; Save A somewhere else...
+    wmov    AA6, A6
+    mov     AA5, A5
+    push    A4
+    push    A3
+    push    A2
+    push    A1
+    mov     r0,  A0
+    ;; ... so that we can use D_cmp.map_i64 on B.
+    wmov    BB6, B6
+    wmov    BB4, B4
+    wmov    BB2, B2
+    wmov    BB0, B0
+    rcall   D_cmp.map_i64
+    ;; Run the following code even when B is NaN (T=1) so as to pop the regs.
+    ;; In the non-NaN case, AA and BB can be compared like int64_t for the
+    ;; sake of comparing A and B as double.
+    CP      r0,  BB0  $  pop r0
+    cpc     r0,  BB1  $  pop r0
+    cpc     r0,  BB2  $  pop r0
+    cpc     r0,  BB3  $  pop r0
+    cpc     r0,  BB4
+    cpc     AA5, BB5
+    cpc     AA6, BB6
+    cpc     AA7, BB7
+    pop     r25
+    ;; R25.0 <=> A is NaN
+    ;; R25.1 <=> B is NaN
+    ;; T <=> comparison is unordered
+    bld     r25, 1
+    sbrc    r25, 0
+    set
+    ldi     r24, 1
+    ret
+
+;;; A is NaN: Set T=1.
+;;; A is not a NaN: Set T=0, and map double A to int64_t such that
+;;; f(A) <cmp> f(B)  iff  A <cmp> B, i.e. we can treat the result
+;;; as int64_t for the matter of double comparison.
+;;; Clobbers: XL.
+D_cmp.map_i64:
+    bst     A7, 7
+    cbr     A7, 0x80
+    ;; If Inf < |A|, then we have a NaN.
+    CP      __zero_reg__, A0
+    cpc     __zero_reg__, A1
+    cpc     __zero_reg__, A2
+    cpc     __zero_reg__, A3
+    cpc     __zero_reg__, A4
+    cpc     __zero_reg__, A5
+    ldi     XL, lo8(0x7ff0)     $    cpc    XL, A6
+    ldi     XL, hi8(0x7ff0)     $    cpc    XL, A7
+    brlo .Lunord
+    brtc 9f
+    clt
+    .global __negdi2
+    XJMP    __negdi2
+.Lunord:
+    set
+9:  ret
+
+ENDF D_cmp
+#endif /* F7MOD_D_cmp_ */
+
+
+;; bool __ledf2 (double, double);
+#ifdef F7MOD_D_le_
+_DEFUN __ledf2
+    F7call  D_cmp
+    brts 0f
+    breq 1f
+    brlt 1f
+0:  ldi     r24, 0
+1:  ret
+_ENDF __ledf2
+#endif /* F7MOD_D_le_ */
+
+;; bool __ltdf2 (double, double);
+#ifdef F7MOD_D_lt_
+_DEFUN __ltdf2
+    F7call  D_cmp
+    brts 0f
+    brlt 1f
+0:  ldi     r24, 0
+1:  ret
+_ENDF __ltdf2
+#endif /* F7MOD_D_lt_ */
+
+;; bool __gedf2 (double, double);
+#ifdef F7MOD_D_ge_
+_DEFUN __gedf2
+    F7call  D_cmp
+    brts 0f
+    brge 1f
+0:  ldi     r24, 0
+1:  ret
+_ENDF __gedf2
+#endif /* F7MOD_D_ge_ */
+
+;; bool __gtdf2 (double, double);
+#ifdef F7MOD_D_gt_
+_DEFUN __gtdf2
+    F7call  D_cmp
+    brts 0f
+    breq 0f
+    brge 1f
+0:  ldi     r24, 0
+1:  ret
+_ENDF __gtdf2
+#endif /* F7MOD_D_gt_ */
+
+;; bool __nedf2 (double, double);
+#ifdef F7MOD_D_ne_
+_DEFUN __nedf2
+    F7call  D_cmp
+    brts 0f
+    brne 1f
+0:  ldi     r24, 0
+1:  ret
+_ENDF __nedf2
+#endif /* F7MOD_D_ne_ */
+
+;; bool __eqdf2 (double, double);
+#ifdef F7MOD_D_eq_
+_DEFUN __eqdf2
+    F7call  D_cmp
+    brts 0f
+    breq 1f
+0:  ldi     r24, 0
+1:  ret
+_ENDF __eqdf2
+#endif /* F7MOD_D_eq_ */
+
+;; bool __unorddf2 (double, double);
+#ifdef F7MOD_D_unord_
+_DEFUN __unorddf2
+    F7call  D_cmp
+    bld     r24, 0
+    ret
+_ENDF __unorddf2
+#endif /* F7MOD_D_unord_ */
+
+#ifdef F7MOD_D_fminfmax_
+_DEFUN __fmin
+DALIAS fmin
+LALIAS fminl
+    inc     __zero_reg__
+
+_LABEL __fmax
+DALIAS fmax
+LALIAS fmaxl
+    ;; Push A[].
+    push    r25
+    push    r24
+    push    r23
+    push    r22
+    push    r21
+    push    r20
+    push    r19
+    push    r18
+    ;; fmin or fmax
+    push    __zero_reg__
+    clr     __zero_reg__
+
+    XCALL   __gedf2
+
+    pop     __tmp_reg__
+    andi    r25, 0x3            ; NaNs?
+    brne .Lnan
+    ;; No NaNs involved.
+    eor     __tmp_reg__, r24    ; (f == fmin) ^ (A >= B)
+    brne 1f
+2:
+    ;; Return B since the cases are:
+    ;; fmax && A < B
+    ;; fmin && A >= B
+#ifdef __AVR_XMEGA__
+    in      XL, __SP_L__
+    in      XH, __SP_H__
+    adiw    XL, 8
+    out     __SP_L__, XL
+    out     __SP_H__, XH
+#else
+    pop r0  $  pop r0  $  pop r0  $  pop r0
+    pop r0  $  pop r0  $  pop r0  $  pop r0
+#endif
+    wmov    r24, r16
+    wmov    r22, r14
+    wmov    r20, r12
+    wmov    r18, r10
+    ret
+1:
+    ;; Return A since the cases are:
+    ;; fmax && A >= B
+    ;; fmin && A < B
+    pop     r18
+    pop     r19
+    pop     r20
+    pop     r21
+    pop     r22
+    pop     r23
+    pop     r24
+    pop     r25
+    ret
+
+.Lnan:
+    ;; There are NaNs.
+    ;; When only the 1st argument is a NaN, then return the 2nd argument
+    cpi     r25, 0x1
+    breq 2b
+    ;; When the 2nd argument is a NaN, then return the 1st argument.
+    ;; When both arguments are NaNs, then return NaN (e.g. the 1st argument).
+    rjmp 1b
+_ENDF __fmax
+#endif /* F7MOD_D_fminfmax_ */
+
+
+#ifdef F7MOD_D_sincos_
+;;; void sincos (double R18, double *R16, double *R14);
+_DEFUN __sincos
+DALIAS sincos
+LALIAS sincosl
+
+#define n_pushed    4
+#define n_frame    (2 * F7_SIZEOF)
+    do_prologue_saves n_pushed, n_frame
+    ;; Y = FramePointer + 1
+    adiw    Y,      1
+    ;; R16 = frame-arg 1
+    wmov    r16,    Y
+    ;; The double argument is in R18[].
+    XCALL   F7_NAME (set_double_impl)
+    ;; void f7_sincos (f7_t *ss, f7_t *cc, const f7_t *aa)
+    ;; Note that aa may equal ss or cc.
+    wmov    r20,    r16                 ; aa
+    wmov    r24,    r16                 ; ss = FP + 1
+    subi    r16,    lo8(-F7_SIZEOF)
+    sbci    r17,    hi8(-F7_SIZEOF)
+    wmov    r22,    r16                 ; cc = FP + 1 + F7_SIZEOF
+    XCALL   F7_NAME (sincos)
+
+    ;; double R18 = get_double (cc)
+    wmov    r24,    r16
+    XCALL   F7_NAME (get_double)
+    wmov    XL,     r14                 ; double *pcos
+    rcall   store.r18.X                 ; *pcos = R18
+
+    ;; double R18 = get_double (ss)
+    wmov    r24,    Y
+    XCALL   F7_NAME (get_double)
+    ldd     XL,     Y + n_frame + 3     ; Saved R16
+    ldd     XH,     Y + n_frame + 2     ; Saved R17
+    rcall   store.r18.X                 ; *psin = R18
+
+    do_epilogue_restores n_pushed, n_frame
+
+store.r18.X:
+    st      X+,     r18
+    st      X+,     r19
+    st      X+,     r20
+    st      X+,     r21
+    st      X+,     r22
+    st      X+,     r23
+    st      X+,     r24
+    st      X+,     r25
+    ret
+_ENDF __sincos
+#endif /* F7MOD_D_sincos_ */
+
 #ifdef F7MOD_call_dd_
 
 ;; Provide double wrappers for functions that operate on f7_t and get f7_t*.
@@ -1894,4 +2195,277 @@ _DEFUN __powidf2
 _ENDF __powidf2
 #endif /* F7MOD_D_powi_ */
 
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;; Fixed-point -> double conversions.
+
+;;; The double exponent starts at bit 52 since the encoded mantissa has 52 bits.
+;;; Note that when X is a multiple of 16, then dex_lo(x) evaluates to 0.
+#define DEX16(x)  (x) << (52 - 48)
+#define dex_lo(x) lo8 (DEX16 (x))
+#define dex_hi(x) hi8 (DEX16 (x))
+
+#ifdef F7MOD_usa2D_
+_DEFUN __fractusadf
+    ;; Convert USI to DF.
+    XCALL   __floatunsidf
+    ;; The MSB indicates a value of 0.
+    cpse    r25, __zero_reg__
+    ;; Divide non-zero values by 2^16 in order to adjust for FBIT = 16.
+    subi    r25, dex_hi (16)
+    ret
+_ENDF __fractusadf
+#endif /* F7MOD_usa2D_ */
+
+#ifdef F7MOD_sa2D_
+_DEFUN __fractsadf
+    ;; Convert SI to DF.
+    XCALL   __floatsidf
+    ;; The MSB indicates a value of 0.
+    tst     r25
+    breq 0f
+    ;; Divide non-zero values by 2^15 in order to adjust for FBIT = 15.
+    subi    r24, dex_lo (15)
+    sbci    r25, dex_hi (15)
+0:  ret
+_ENDF __fractsadf
+#endif /* F7MOD_sa2D_ */
+
+#ifdef F7MOD_uha2D_
+_DEFUN __fractuhadf
+    ;; Extend UHA to USA.
+    clr     r22
+    mov     r23, r24
+    mov     r24, r25
+    clr     r25
+    XJMP    __fractusadf
+_ENDF __fractuhadf
+#endif /* F7MOD_uha2D_ */
+
+#ifdef F7MOD_ha2D_
+_DEFUN __fracthadf
+    ;; Extend HA to SA.
+    clr     r22
+    mov     r23, r24
+    mov     r24, r25
+    lsl     r25
+    sbc     r25, r25
+    XJMP    __fractsadf
+_ENDF __fracthadf
+#endif /* F7MOD_ha2D_ */
+
+
+#ifdef F7MOD_usq2D_
+_DEFUN __fractusqdf
+    ;; Convert USI to DF.
+    XCALL   __floatunsidf
+    ;; The MSB indicates a value of 0.
+    cpse    r25, __zero_reg__
+    ;; Divide non-zero values by 2^32 in order to adjust for FBIT = 32.
+    subi    r25, dex_hi (32)
+    ret
+_ENDF __fractusqdf
+#endif /* F7MOD_usq2D_ */
+
+#ifdef F7MOD_sq2D_
+_DEFUN __fractsqdf
+    ;; Convert SI to DF.
+    XCALL   __floatsidf
+    ;; The MSB indicates a value of 0.
+    tst     r25
+    breq 0f
+    ;; Divide non-zero values by 2^31 in order to adjust for FBIT = 31.
+    subi    r24, dex_lo (31)
+    sbci    r25, dex_hi (31)
+0:  ret
+_ENDF __fractsqdf
+#endif /* F7MOD_sq2D_ */
+
+#ifdef F7MOD_uqq2D_
+_DEFUN __fractuqqdf
+    ;; Extend UQQ to UHQ.
+    mov     r25, r24
+    clr     r24
+_LABEL __fractuhqdf
+    ;; Extend UHQ to USQ.
+    clr     r23
+    clr     r22
+    XJMP    __fractusqdf
+_ENDF __fractuqqdf
+#endif /* F7MOD_uqq2D_ */
+
+#ifdef F7MOD_qq2D_
+_DEFUN __fractqqdf
+    ;; Extend QQ to HQ.
+    mov     r25, r24
+    clr     r24
+_LABEL __fracthqdf
+    ;; Extend HQ to SQ.
+    clr     r23
+    clr     r22
+    XJMP    __fractsqdf
+_ENDF __fractqqdf
+#endif /* F7MOD_qq2D_ */
+
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;; Fixed-point -> double conversions.
+
+#ifdef F7MOD_D2qq_
+_DEFUN __fractdfqq
+    ;; Multiply with 2^{24+7} to get a QQ result in r25.
+    subi    r24, dex_lo (-31)
+    sbci    r25, dex_hi (-31)
+    XCALL   __fixdfsi
+    mov     r24, r25
+    ret
+_ENDF __fractdfqq
+#endif /* F7MOD_D2qq_ */
+
+#ifdef F7MOD_D2uqq_
+_DEFUN __fractdfuqq
+    ;; Multiply with 2^{24+8} to get a UQQ result in r25.
+    subi    r25, dex_hi (-32)
+    XCALL   __fixunsdfsi
+    mov     r24, r25
+    ret
+_ENDF __fractdfuqq
+#endif /* F7MOD_D2uqq_ */
+
+#ifdef F7MOD_D2ha_
+_DEFUN __fractdfha
+    ;; Multiply with 2^{16+7} to get a HA result in r25:r24
+    subi    r24, dex_lo (-23)
+    sbci    r25, dex_hi (-23)
+    XJMP    __fixdfsi
+_ENDF __fractdfha
+#endif /* F7MOD_D2ha_ */
+
+#ifdef F7MOD_D2uha_
+_DEFUN __fractdfuha
+    ;; Multiply with 2^24 to get a UHA result in r25:r24.
+    subi    r24, dex_lo (-24)
+    sbci    r25, dex_hi (-24)
+    XJMP    __fixunsdfsi
+_ENDF __fractdfuha
+#endif /* F7MOD_D2uha_ */
+
+#ifdef F7MOD_D2hq_
+_DEFUN __fractdfhq
+    ;; Multiply with 2^{16+15} to get a HQ result in r25:r24
+    ;; resp. with 2^31 to get a SQ result in r25:r22.
+_LABEL __fractdfsq
+    subi    r24, dex_lo (-31)
+    sbci    r25, dex_hi (-31)
+    XJMP    __fixdfsi
+_ENDF __fractdfhq
+#endif /* F7MOD_D2hq_ */
+
+#ifdef F7MOD_D2uhq_
+_DEFUN __fractdfuhq
+    ;; Multiply with 2^{16+16} to get a UHQ result in r25:r24
+    ;; resp. with 2^32 to get a USQ result in r25:r22.
+_LABEL  __fractdfusq
+    subi    r25, dex_hi (-32)
+    XJMP    __fixunsdfsi
+_ENDF __fractdfuhq
+#endif /* F7MOD_D2uhq_ */
+
+#ifdef F7MOD_D2sa_
+_DEFUN __fractdfsa
+    ;; Multiply with 2^15 to get a SA result in r25:r22.
+    subi    r24, dex_lo (-15)
+    sbci    r25, dex_hi (-15)
+    XJMP    __fixdfsi
+_ENDF __fractdfsa
+#endif /* F7MOD_D2sa_ */
+
+#ifdef F7MOD_D2usa_
+_DEFUN __fractdfusa
+    ;; Multiply with 2^16 to get a USA result in r25:r22.
+    subi    r25, dex_hi (-16)
+    XJMP    __fixunsdfsi
+_ENDF __fractdfusa
+#endif /* F7MOD_D2usa_ */
+
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;; [u]int32_t -> double conversions.
+
+;; double __floatsidf (int32_t);
+#ifdef F7MOD_D_floatsidf_
+_DEFUN __floatsidf
+    bst     r25, 7
+    brtc    0f
+    XCALL   __negsi2
+0:  XJMP    __floatunsidf.ge0
+_ENDF __floatsidf
+#endif /* F7MOD_D_floatsidf_ */
+
+;; double __floatunsidf (uint32_t);
+#ifdef F7MOD_D_floatunsidf_
+_DEFUN __floatunsidf
+    clt
+_LABEL __floatunsidf.ge0
+    ;; Zero-extend SI at the low end.
+    clr     r18
+    clr     r19
+    wmov    r20,    r18
+    ;; Input is zero?
+    sbiw    r24,    0
+    sbci    r23,    0
+    sbci    r22,    0
+    breq 9f
+    ;; No: The double exponent of 0x80000000 is 31 plus a bias of 1023.
+    ;; Align the SI value such that the MSBit is as R25.4.
+    ;; For each << we have to subtract 1 from the exponent, and for
+    ;; each >> we have to add 1.  Since we want the MSB in R25.4 and
+    ;; not in R25.7, the initial exponent must be reduced by 3.
+    ldi     Xl,     dex_lo (31 + 1023 - 3)
+    ldi     Xh,     dex_hi (31 + 1023 - 3)
+    ;; Move the MSByte to R25.
+1:  tst     r25
+    brne 2f
+    subi    Xl,     dex_lo (8)
+    sbci    Xh,     dex_hi (8)
+    mov     r25,    r24
+    mov     r24,    r23
+    mov     r23,    r22
+    clr     r22
+    rjmp    1b
+2:  ;; Now we have R25 != 0.
+    cpi     r25,    0x20
+    brlo 3f
+    adiw    Xl,     DEX16 (1)
+    lsr     r25
+    ror     r24
+    ror     r23
+    ror     r22
+    ror     r21
+    rjmp 2b
+3:  cpi     r25,    0x10
+    brsh 4f
+    sbiw    Xl,     DEX16 (1)
+    lsl     r22
+    rol     r23
+    rol     r24
+    rol     r25
+    rjmp 3b
+4:  ;; Move the mantissa into place and clear the redundant leading 1.
+    cbr     r25,    0x10
+    mov     r20,    r21
+    mov     r21,    r22
+    mov     r22,    r23
+    mov     r23,    r24
+    mov     r24,    r25
+    ;; Insert the biased exponent.
+    or      r24,    Xl
+    mov     r25,    Xh
+    ;; Insert the sign.
+    bld     r25,    7
+9:  ret
+_ENDF __floatunsidf
+#endif /* F7MOD_D_floatunsidf_ */
+
+
 #endif /* !AVR_TINY */
--- a/src/libgcc/config/avr/libf7/libf7-common.mk
+++ b/src/libgcc/config/avr/libf7/libf7-common.mk
@@ -8,7 +8,7 @@ F7_C_PARTS += set_float get_float get_double set_double set_pdouble
 F7_C_PARTS += fabs neg fmin fmax minmax truncx trunc floor ceil round lround
 F7_C_PARTS += horner logx log log10 log2 exp pow10 pow powi
 F7_C_PARTS += sin cos tan cotan sincos sinh cosh tanh sinhcosh
-F7_C_PARTS += asinacos asin acos atan atan2
+F7_C_PARTS += asinacos asin acos atan atan2 fdim
 F7_C_PARTS += abscmp_msb_ge cmp cmp_abs cmp_unordered
 
 F7_C_PARTS += const_1 const_1_2 const_1_3
@@ -22,19 +22,31 @@ F7_ASM_PARTS += addsub_mant_scaled store load
 F7_ASM_PARTS += to_integer to_unsigned clz normalize_with_carry normalize
 F7_ASM_PARTS += store_expo sqrt16 sqrt_approx div
 
-F7_ASM_PARTS += D_class D_fma D_powi
+F7_ASM_PARTS += D_class D_fma D_powi D_sincos
 F7_ASM_PARTS += D_isnan D_isinf D_isfinite D_signbit D_copysign D_neg D_fabs
+F7_ASM_PARTS += D_cmp D_eq D_ne D_ge D_gt D_le D_lt D_unord D_fminfmax
 
 F7_ASM_PARTS += call_dd call_ddd
 
+# Fixed-point -> double conversions
+F7_ASM_PARTS += qq2D uqq2D            sq2D usq2D
+F7_ASM_PARTS +=            ha2D uha2D sa2D usa2D
+
+# Double -> fixed-point conversions
+F7_ASM_PARTS += D2qq D2uqq D2hq D2uhq
+F7_ASM_PARTS +=            D2ha D2uha D2sa D2usa
+
+# Integer -> double conversions
+F7_ASM_PARTS += D_floatsidf D_floatunsidf
+
 # Stuff that will be wrapped in f7-wraps.h (included by libf7-asm.sx)
 # and give f7_asm_D_*.o modules.
 g_ddd += add sub mul div
-g_xdd_cmp += le lt ge gt ne eq unord
-g_dx += floatunsidf floatsidf extendsfdf2
+g_xdd_cmp +=
+g_dx += extendsfdf2
 g_xd += fixdfsi fixdfdi fixunsdfdi fixunsdfsi truncdfsf2
 
-m_ddd += pow fmin fmax fmod hypot atan2
+m_ddd += pow fmod hypot atan2 fdim
 m_ddx += ldexp frexp
 m_dd += sqrt cbrt exp exp10 pow10 log log10 log2 sin cos tan cotan asin acos atan
 m_dd += ceil floor trunc round sinh cosh tanh
@@ -59,7 +71,7 @@ F7F += lrint ldexp frexp exp logx log log10 log2
 F7F += minmax fmax fmin floor ceil round lround trunc truncx
 F7F += horner pow10 exp10 pow powi
 F7F += sin cos tan cotan sincos sinh cosh tanh sinhcosh
-F7F += asinacos asin acos atan atan2
+F7F += asinacos asin acos atan atan2 fdim
 F7F += mul_noround sqrt16_round sqrt16_floor
 F7F += clr_mant_lsbs abscmp_msb_ge lshrdi3 ashldi3
 F7F += assert
@@ -82,7 +94,7 @@ F7F += set_eps set_1pow2
 
 # Renames for ALIASes without own module.
 F7F += min max exp10
-F7F += floatunsidf floatsidf extendsfdf2
+F7F += extendsfdf2
 F7F += fixdfsi fixdfdi fixunsdfdi fixunsdfsi truncdfsf2
 
 # Renames for f7-const.def.
--- a/src/libgcc/config/avr/libf7/libf7.c
+++ b/src/libgcc/config/avr/libf7/libf7.c
@@ -207,7 +207,6 @@ f7_t* f7_set_s32 (f7_t *cc, int32_t i32)
   cc->flags = flags;
   return cc;
 }
-ALIAS (f7_set_s32, f7_floatsidf)
 #endif // F7MOD_set_s32_
 
 
@@ -219,7 +218,6 @@ f7_t* f7_set_u32 (f7_t *cc, uint32_t u32)
   cc->expo = 31;
   return f7_normalize_asm (cc);
 }
-ALIAS (f7_set_u32, f7_floatunsidf)
 #endif // F7MOD_set_u32_
 
 
@@ -918,6 +916,21 @@ void f7_sub (f7_t *cc, const f7_t *aa, const f7_t *bb)
 #endif // F7MOD_sub_
 
 
+#ifdef F7MOD_fdim_
+F7_WEAK
+void f7_fdim (f7_t *cc, const f7_t *aa, const f7_t *bb)
+{
+  int8_t cmp = f7_cmp_unordered (aa, bb, true /*with_sign*/);
+  if (cmp == INT8_MIN)
+    return f7_set_nan (cc);
+  if (cmp < 0)
+    return f7_clr (cc);
+
+  f7_sub (cc, aa, bb);
+}
+#endif // F7MOD_fdim_
+
+
 #ifdef F7MOD_addsub_
 static void return_with_sign (f7_t *cc, const f7_t *aa, int8_t c_sign)
 {
@@ -1639,10 +1652,10 @@ void f7_exp (f7_t *cc, const f7_t *aa)
     return f7_set_nan (cc);
 
   /* The maximal exponent of 2 for a double is 1023, hence we may limit
-     to  |A| < 1023 * ln2 ~ 709.  We limit to  1024 ~ 1.99 * 2^9  */
+     to  |A| < 1023 * ln2 ~ 709.  We limit to  1024 = 2^10  */
 
   if (f7_class_inf (a_class)
-      || (f7_class_nonzero (a_class) && aa->expo >= 9))
+      || (f7_class_nonzero (a_class) && aa->expo >= 10))
     {
       if (f7_class_sign (a_class))
 	return f7_clr (cc);
--- a/src/libgcc/config/avr/libf7/libf7.h
+++ b/src/libgcc/config/avr/libf7/libf7.h
@@ -608,6 +608,7 @@ extern void f7_cos (f7_t*, const f7_t*);
 extern void f7_tan (f7_t*, const f7_t*);
 extern void f7_atan (f7_t*, const f7_t*);
 extern void f7_atan2 (f7_t*, const f7_t*, const f7_t*);
+extern void f7_fdim (f7_t*, const f7_t*, const f7_t*);
 extern void f7_asin (f7_t*, const f7_t*);
 extern void f7_acos (f7_t*, const f7_t*);
 extern void f7_tanh (f7_t*, const f7_t*);
--- a/src/libgcc/config/libbid/ChangeLog
+++ b/src/libgcc/config/libbid/ChangeLog
@@ -1,3 +1,29 @@
+2025-08-30  liuhongt  <hongtao.liu@intel.com>
+
+	Revert:
+	2025-08-29  liuhongt  <hongtao.liu@intel.com>
+
+	PR target/120691
+	* bid128_div.c: Fix _Decimal128 arithmetic error under
+	FE_UPWARD.
+	* bid128_rem.c: Ditto.
+	* bid128_sqrt.c: Ditto.
+	* bid64_div.c (bid64_div): Ditto.
+	* bid64_sqrt.c (bid64_sqrt): Ditto.
+
+2025-08-29  liuhongt  <hongtao.liu@intel.com>
+
+	Backported from master:
+	2025-08-29  liuhongt  <hongtao.liu@intel.com>
+
+	PR target/120691
+	* bid128_div.c: Fix _Decimal128 arithmetic error under
+	FE_UPWARD.
+	* bid128_rem.c: Ditto.
+	* bid128_sqrt.c: Ditto.
+	* bid64_div.c (bid64_div): Ditto.
+	* bid64_sqrt.c (bid64_sqrt): Ditto.
+
 2025-05-23  Release Manager
 
 	* GCC 14.3.0 released.
--- a/src/libgomp/ChangeLog
+++ b/src/libgomp/ChangeLog
@@ -1,3 +1,10 @@
+2026-03-15  Frank Scheiner  <frank.scheiner@web.de>
+
+	Backported from master:
+	2025-11-25  Frank Scheiner  <frank.scheiner@web.de>
+
+	* affinity-fmt.c: Make char *q a pointer to a const char.
+
 2025-05-23  Release Manager
 
 	* GCC 14.3.0 released.
--- a/src/libgomp/affinity-fmt.c
+++ b/src/libgomp/affinity-fmt.c
@@ -327,7 +327,7 @@ gomp_display_affinity (char *buffer, size_t size,
 	      }
 	  if (c == '{')
 	    {
-	      char *q = strchr (p + 1, '}');
+	      const char *q = strchr (p + 1, '}');
 	      if (q)
 		gomp_fatal ("unsupported long type name '%.*s' in affinity "
 			    "format", (int) (q - (p + 1)), p + 1);
--- a/src/libiberty/ChangeLog
+++ b/src/libiberty/ChangeLog
@@ -1,3 +1,12 @@
+2026-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2026-03-05  Jakub Jelinek  <jakub@redhat.com>
+
+	PR target/124365
+	* simple-object.c (handle_lto_debug_sections): Also copy over
+	.ARM.attributes section.
+
 2025-05-23  Release Manager
 
 	* GCC 14.3.0 released.
--- a/src/libiberty/simple-object.c
+++ b/src/libiberty/simple-object.c
@@ -310,6 +310,10 @@ handle_lto_debug_sections (const char *name, int rename)
   /* Copy over .BTF section under the same name if present.  */
   else if (strcmp (name, ".BTF") == 0)
     return strcpy (newname, name);
+  /* Copy over .ARM.attributes section under the same name if present.  AArch64
+     aeabi attributes are present in this section.  */
+  else if (strcmp (name, ".ARM.attributes") == 0)
+    return strcpy (newname, name);
   free (newname);
   return NULL;
 }
--- a/src/libphobos/ChangeLog
+++ b/src/libphobos/ChangeLog
@@ -1,3 +1,22 @@
+2025-09-07  Sam James  <sam@gentoo.org>
+
+	Backported from master:
+	2025-09-07  Sam James  <sam@gentoo.org>
+
+	* configure.tgt: Add hppa[12]*-*-linux* as a supported target.
+
+2025-09-07  Sam James  <sam@gentoo.org>
+
+	Backported from master:
+	2025-05-06  Sam James  <sam@gentoo.org>
+
+	* configure.tgt: Add sparc64-unknown-linux-gnu as a supported target.
+
+2025-09-07  Matthias Klose  <doko@ubuntu.com>
+
+	* configure.tgt: Add powerpc64le--linux-gnu as a supported target
+	when configured with --with-long-double-format=ieee.
+
 2025-05-23  Release Manager
 
 	* GCC 14.3.0 released.
--- a/src/libphobos/configure.tgt
+++ b/src/libphobos/configure.tgt
@@ -36,7 +36,7 @@ case "${target}" in
   arm*-*-linux*)
 	LIBPHOBOS_SUPPORTED=yes
 	;;
-  hppa-*-linux*)
+  hppa-*-linux* | hppa[12]*-*-linux*)
 	LIBPHOBOS_SUPPORTED=yes
 	;;
   loongarch*-*-linux*)
@@ -48,6 +48,15 @@ case "${target}" in
   power*-*-freebsd*)
 	LIBPHOBOS_SUPPORTED=yes
 	;;
+  powerpc64le-*linux*)
+	LIBPHOBOS_SUPPORTED=yes
+	case "$ac_configure_args" in
+	  *--with-long-double-format=ieee*)
+	    ;;
+	  *)
+	    LIBDRUNTIME_ONLY=yes
+	esac
+	;;
   power*-*-linux*)
 	LIBPHOBOS_SUPPORTED=yes
 	LIBDRUNTIME_ONLY=yes
@@ -58,7 +67,7 @@ case "${target}" in
   s390*-linux*)
 	LIBPHOBOS_SUPPORTED=yes
 	;;
-  sparc*-*-solaris2.11*)
+  sparc64-*-linux* | sparc*-*-solaris2.11*)
 	LIBPHOBOS_SUPPORTED=yes
 	;;
   *-*-darwin9* | *-*-darwin1[01]*)
--- a/src/libsanitizer/ChangeLog
+++ b/src/libsanitizer/ChangeLog
@@ -1,3 +1,14 @@
+2025-07-31  Florian Weimer  <fweimer@redhat.com>
+
+	Backported from master:
+	2025-05-02  Florian Weimer  <fweimer@redhat.com>
+		    Tom Stellard  <tstellar@redhat.com>
+
+	* sanitizer_common/sanitizer_common_interceptors_ioctl.inc: Cherry
+	picked from LLVM commit 59978b21ad9c65276ee8e14f26759691b8a65763.
+	* sanitizer_common/sanitizer_platform_limits_posix.cpp: Likewise.
+	* sanitizer_common/sanitizer_platform_limits_posix.h: Likewise.
+
 2025-05-23  Release Manager
 
 	* GCC 14.3.0 released.
--- a/src/libsanitizer/sanitizer_common/sanitizer_common_interceptors_ioctl.inc
+++ b/src/libsanitizer/sanitizer_common/sanitizer_common_interceptors_ioctl.inc
@@ -338,17 +338,9 @@ static void ioctl_table_fill() {
   _(SOUND_PCM_WRITE_CHANNELS, WRITE, sizeof(int));
   _(SOUND_PCM_WRITE_FILTER, WRITE, sizeof(int));
   _(TCFLSH, NONE, 0);
-#if SANITIZER_GLIBC
-  _(TCGETA, WRITE, struct_termio_sz);
-#endif
   _(TCGETS, WRITE, struct_termios_sz);
   _(TCSBRK, NONE, 0);
   _(TCSBRKP, NONE, 0);
-#if SANITIZER_GLIBC
-  _(TCSETA, READ, struct_termio_sz);
-  _(TCSETAF, READ, struct_termio_sz);
-  _(TCSETAW, READ, struct_termio_sz);
-#endif
   _(TCSETS, READ, struct_termios_sz);
   _(TCSETSF, READ, struct_termios_sz);
   _(TCSETSW, READ, struct_termios_sz);
--- a/src/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.cpp
+++ b/src/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.cpp
@@ -479,9 +479,6 @@ unsigned struct_ElfW_Phdr_sz = sizeof(Elf_Phdr);
   unsigned struct_input_id_sz = sizeof(struct input_id);
   unsigned struct_mtpos_sz = sizeof(struct mtpos);
   unsigned struct_rtentry_sz = sizeof(struct rtentry);
-#if SANITIZER_GLIBC || SANITIZER_ANDROID
-  unsigned struct_termio_sz = sizeof(struct termio);
-#endif
   unsigned struct_vt_consize_sz = sizeof(struct vt_consize);
   unsigned struct_vt_sizes_sz = sizeof(struct vt_sizes);
   unsigned struct_vt_stat_sz = sizeof(struct vt_stat);
@@ -758,13 +755,9 @@ unsigned struct_ElfW_Phdr_sz = sizeof(Elf_Phdr);
   unsigned IOCTL_SOUND_PCM_WRITE_FILTER = SOUND_PCM_WRITE_FILTER;
 #endif // SOUND_VERSION
   unsigned IOCTL_TCFLSH = TCFLSH;
-  unsigned IOCTL_TCGETA = TCGETA;
   unsigned IOCTL_TCGETS = TCGETS;
   unsigned IOCTL_TCSBRK = TCSBRK;
   unsigned IOCTL_TCSBRKP = TCSBRKP;
-  unsigned IOCTL_TCSETA = TCSETA;
-  unsigned IOCTL_TCSETAF = TCSETAF;
-  unsigned IOCTL_TCSETAW = TCSETAW;
   unsigned IOCTL_TCSETS = TCSETS;
   unsigned IOCTL_TCSETSF = TCSETSF;
   unsigned IOCTL_TCSETSW = TCSETSW;
--- a/src/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h
+++ b/src/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h
@@ -1012,7 +1012,6 @@ extern unsigned struct_hd_geometry_sz;
 extern unsigned struct_input_absinfo_sz;
 extern unsigned struct_input_id_sz;
 extern unsigned struct_mtpos_sz;
-extern unsigned struct_termio_sz;
 extern unsigned struct_vt_consize_sz;
 extern unsigned struct_vt_sizes_sz;
 extern unsigned struct_vt_stat_sz;
@@ -1257,13 +1256,9 @@ extern unsigned IOCTL_SNDCTL_COPR_SENDMSG;
 extern unsigned IOCTL_SNDCTL_COPR_WCODE;
 extern unsigned IOCTL_SNDCTL_COPR_WDATA;
 extern unsigned IOCTL_TCFLSH;
-extern unsigned IOCTL_TCGETA;
 extern unsigned IOCTL_TCGETS;
 extern unsigned IOCTL_TCSBRK;
 extern unsigned IOCTL_TCSBRKP;
-extern unsigned IOCTL_TCSETA;
-extern unsigned IOCTL_TCSETAF;
-extern unsigned IOCTL_TCSETAW;
 extern unsigned IOCTL_TCSETS;
 extern unsigned IOCTL_TCSETSF;
 extern unsigned IOCTL_TCSETSW;
--- a/src/libstdc++-v3/ChangeLog
+++ b/src/libstdc++-v3/ChangeLog
@@ -1,3 +1,509 @@
+2026-03-13  Patrick Palka  <ppalka@redhat.com>
+
+	Backported from master:
+	2026-02-12  Patrick Palka  <ppalka@redhat.com>
+
+	PR libstdc++/114865
+	* include/std/atomic (atomic<_Tp>::atomic(_Tp)) [C++11]:
+	Enable __builtin_clear_padding logic.
+	* testsuite/29_atomics/atomic/compare_exchange_padding.cc: Enable
+	this test in earlier modes, including C++11.
+	* testsuite/29_atomics/atomic/cons/zero_padding.cc [C++11]:
+	Enable tests verifying cleared padding bits for a non-static-init
+	std::atomic object.
+
+2026-03-04  Jonathan Wakely  <jwakely@redhat.com>
+
+	Backported from master:
+	2026-03-04  Jonathan Wakely  <jwakely@redhat.com>
+
+	PR libstdc++/124363
+	* include/std/string_view: Adjust comment on #endif to match #if
+	condition. Likewise for header guard.
+
+2026-02-26  Tomasz Kamiński  <tkaminsk@redhat.com>
+
+	PR libstdc++/123875
+	* include/bits/atomic_base.h (__atomic_impl::__clear_padding):
+	Use if constexpr unconditionally.
+	(__atomic_float<_Fp>::__atomic_float(_Fp)): Skip __clear_padding
+	call for constant evaluation.
+	* include/std/atomic (atomic<_Tp>::atomic(_Tp)): Likewise.
+	* testsuite/29_atomics/atomic/cons/zero_padding.cc: New test.
+	* testsuite/29_atomics/atomic_float/zero_padding.cc: New test.
+	(cherry picked from commits
+	6b550d69fe7cb62ea6e240ce7a4ba29ce33aa1b1
+	682c95b808724e6f876ea709b873ac6771704d7b
+	060d7c2a9c1fe16d23d98a74287fdb7c73ddb784
+	f3ba5ad088cebe117f857329a35b95d18d97a808)
+
+2026-02-10  Jonathan Wakely  <jwakely@redhat.com>
+
+	Backported from master:
+	2025-11-24  Jonathan Wakely  <jwakely@redhat.com>
+
+	* python/libstdcxx/v6/xmethods.py (ListMethodsMatcher.match):
+	Fix lookup for node type.
+
+2026-02-10  Jonathan Wakely  <jwakely@redhat.com>
+
+	Backported from master:
+	2025-11-24  Jonathan Wakely  <jwakely@redhat.com>
+
+	PR libstdc++/122821
+	* python/libstdcxx/v6/xmethods.py (_versioned_namespace): Remove
+	global variable.
+	(is_specialization_of): Do not use _versioned_namespace. Add
+	__debug:: to regex.
+
+2026-02-10  Jonathan Wakely  <jwakely@redhat.com>
+
+	Backported from master:
+	2026-02-10  Jonathan Wakely  <jwakely@redhat.com>
+
+	PR libstdc++/123991
+	* include/bits/basic_string.h (compare(size_type, size_type, T)):
+	Remove noexcept-specifier.
+	(compare(size_type, size_type, T, size_type, size_type)):
+	Likewise.
+	* include/bits/cow_string.h (compare(size_type, size_type, T)):
+	Remove noexcept-specifier.
+	(compare(size_type, size_type, T, size_type, size_type)):
+	Likewise.
+	* testsuite/21_strings/basic_string/operations/compare/char/123991.cc:
+	New test.
+	* testsuite/21_strings/basic_string/operations/compare/wchar_t/123991.cc:
+	New test.
+
+2026-02-09  Jonathan Wakely  <jwakely@redhat.com>
+
+	Backported from master:
+	2026-02-09  Jonathan Wakely  <jwakely@redhat.com>
+
+	PR libstdc++/124024
+	* include/bits/out_ptr.h (out_ptr): Fix doxygen comment to refer
+	to the right function.
+	(inout_ptr): Improve markup in doxygen comment.
+
+2026-02-06  Tomasz Kamiński  <tkaminsk@redhat.com>
+
+	Backported from master:
+	2025-08-26  Tomasz Kamiński  <tkaminsk@redhat.com>
+
+	PR libstdc++/90192
+	* include/bits/stl_vector.h (vector<T>::_M_fill_append): Declare.
+	(vector<T>::fill): Use _M_fill_append instead of _M_fill_insert.
+	* include/bits/vector.tcc (vector<T>::_M_fill_append): Define
+	(vector<T>::_M_fill_insert): Delegate to _M_fill_append when
+	elements are appended.
+	* testsuite/23_containers/vector/modifiers/moveable.cc: Updated
+	copycount for inserting at the end (appending).
+	* testsuite/23_containers/vector/modifiers/resize.cc: New test.
+	* testsuite/backward/hash_set/check_construct_destroy.cc: Updated
+	copycount, the hash_set constructor uses insert to fill buckets
+	with nullptrs.
+
+2026-02-05  Tomasz Kamiński  <tkaminsk@redhat.com>
+
+	Backported from master:
+	2026-01-19  Tomasz Kamiński  <tkaminsk@redhat.com>
+
+	PR libstdc++/114153
+	* include/bits/ranges_cmp.h (__detail::__less_builtin_ptr_cmp):
+	Add __not_overloaded_spaceship spaceship check.
+	* include/bits/stl_function.h (greater<void>::operator())
+	(less<void>::operator(), greater_equal<void>::operator())
+	(less_equal<void>::operator()): Implement using if constexpr.
+	(greater<void>::__S_cmp, less<void>::__S_cmp)
+	(greater_equal<void>::__ptr_comp, less_equal<void>::S_cmp):
+	Remove.
+	(greater<void>::__ptr_cmp, less<void>::__ptr_cmp)
+	(greater_equal<void>::__ptr_comp, less_equal<void>::ptr_cmp): Change
+	tostatic constexpr variable. Define in terms of requires expressions
+	and __not_overloaded_spaceship check.
+	* include/std/concepts: (__detail::__not_overloaded_spaceship):
+	Define.
+	* libsupc++/compare: (__detail::__3way_builtin_ptr_cmp): Use
+	__not_overloaded_spaceship concept.
+	* testsuite/20_util/function_objects/comparisons_pointer_spaceship.cc: New test.
+
+2026-01-26  Jonathan Wakely  <jwakely@redhat.com>
+
+	Backported from master:
+	2025-03-13  Jonathan Wakely  <jwakely@redhat.com>
+
+	* include/Makefile.am: Add stdckdint.h.
+	* include/Makefile.in: Regenerate.
+	* include/c_compatibility/stdckdint.h: New file.
+	* testsuite/26_numerics/stdckdint/1.cc: New test.
+	* testsuite/26_numerics/stdckdint/2_neg.cc: New test.
+
+2026-01-26  Jonathan Wakely  <jwakely@redhat.com>
+
+	Backported from master:
+	2025-03-13  Jonathan Wakely  <jwakely@redhat.com>
+
+	* include/Makefile.am: Add stdbit.h.
+	* include/Makefile.in: Regenerate.
+	* include/c_compatibility/stdbit.h: New file.
+	* testsuite/20_util/stdbit/1.cc: New test.
+	* testsuite/20_util/stdbit/2_neg.cc: New test.
+
+2026-01-26  Jonathan Wakely  <jwakely@redhat.com>
+
+	Backported from master:
+	2024-11-27  Jonathan Wakely  <jwakely@redhat.com>
+
+	PR libstdc++/105857
+	* config/locale/dragonfly/codecvt_members.cc (do_length): Limit
+	size of alloca buffer to 4k.
+	* config/locale/gnu/codecvt_members.cc (do_length): Likewise.
+	* testsuite/22_locale/codecvt/length/wchar_t/105857.cc: New
+	test.
+
+2026-01-23  Wang Jinghao  <zheng.xianyuwang@gmail.com>
+
+	Backported from master:
+	2026-01-10  Wang Jinghao  <zheng.xianyuwang@gmail.com>
+
+	* src/c++11/system_error.cc (system_error_category) [_WIN32]:
+	Use FormatMessageA function instead of FormatMessage macro.
+	* testsuite/19_diagnostics/error_category/system_category.cc:
+	Fix typo in __MINGW32__ macro name.  Adjust behavior on the
+	mingw32 target.
+
+2026-01-22  Jonathan Wakely  <jwakely@redhat.com>
+
+	Backported from master:
+	2025-12-19  Jonathan Wakely  <jwakely@redhat.com>
+
+	PR libstdc++/123147
+	* include/bits/chrono_io.h (_Parser::operator()) <%S>: Use a
+	buffer of narrow characters to be parsed by std::from_chars.
+	* testsuite/std/time/parse/parse.cc: Check wchar_t parsing.
+
+2026-01-22  Jonathan Wakely  <jwakely@redhat.com>
+
+	Backported from master:
+	2025-12-06  Jonathan Wakely  <jwakely@redhat.com>
+
+	* include/bits/atomic_wait.h (__detail::__atomic_compare): Use
+	std::addressof instead of &.
+	* include/std/atomic (atomic::wait, atomic::notify_one)
+	(atomic::notify_all): Likewise.
+
+2025-11-18  Jonathan Wakely  <jwakely@redhat.com>
+
+	Backported from master:
+	2025-11-17  Jonathan Wakely  <jwakely@redhat.com>
+
+	PR libstdc++/122726
+	* src/filesystem/ops-common.h [_GLIBCXX_FILESYSTEM_IS_WINDOWS]
+	(rename): Use __last_system_error to set errno accurately.
+	* testsuite/27_io/filesystem/operations/rename.cc: Test
+	error_code matches errc::no_such_file_or_directory.
+
+2025-11-14  Jonathan Wakely  <jwakely@redhat.com>
+
+	* include/std/any: Add diagnostic pragmas to disable warning
+	about std::aligned_storage being deprecated.
+
+2025-11-14  Jonathan Wakely  <jwakely@redhat.com>
+
+	Backported from master:
+	2024-09-27  Jonathan Wakely  <jwakely@redhat.com>
+
+	* include/bits/atomic_base.h (__atomic_base<T*>::_M_type_size):
+	Replace overloaded functions with static _S_type_size.
+	* include/std/atomic (atomic<T*>): Use is_object_v instead of
+	is_object.
+	* testsuite/29_atomics/atomic/operators/pointer_partial_void.cc:
+	Add dg-warning for -Wpointer-arith warning.
+
+2025-11-14  Jonathan Wakely  <jwakely@redhat.com>
+
+	Backported from master:
+	2024-09-27  Jonathan Wakely  <jwakely@redhat.com>
+
+	* testsuite/20_util/bind/dangling_ref.cc: Add an additional
+	dg-warning for -Wreturn-local-addr warning.
+	* testsuite/30_threads/packaged_task/cons/dangling_ref.cc:
+	Likewise.
+
+2025-11-14  Jonathan Wakely  <jwakely@redhat.com>
+
+	Backported from master:
+	2025-11-13  Jonathan Wakely  <jwakely@redhat.com>
+
+	PR libstdc++/122661
+	* include/bits/forward_list.h (forward_list::assign(I, I)): Fix
+	value category in is_assignable check.
+	* testsuite/23_containers/forward_list/modifiers/122661.cc:
+	New test.
+
+2025-11-14  Jonathan Wakely  <jwakely@redhat.com>
+
+	Backported from master:
+	2025-07-08  Jonathan Wakely  <jwakely@redhat.com>
+
+	PR libstdc++/118681
+	* src/c++17/memory_resource.cc (choose_block_size): New
+	function.
+	(synchronized_pool_resource::do_allocate): Use choose_block_size
+	to determine appropriate block size.
+	(synchronized_pool_resource::do_deallocate): Likewise
+	(unsynchronized_pool_resource::do_allocate): Likewise.
+	(unsynchronized_pool_resource::do_deallocate): Likewise
+	* testsuite/20_util/synchronized_pool_resource/118681.cc: New
+	test.
+	* testsuite/20_util/unsynchronized_pool_resource/118681.cc: New
+	test.
+
+2025-10-20  Jonathan Wakely  <jwakely@redhat.com>
+
+	Backported from master:
+	2025-10-20  Jonathan Wakely  <jwakely@redhat.com>
+
+	PR libstdc++/122322
+	* configure.ac (with_newlib) <*-rtems*>: Remove
+	HAVE_SYS_IOCT4YL_H, _GLIBCXX_USE_LINK, _GLIBCXX_USE_READLINK,
+	_GLIBCXX_USE_SYMLINK, _GLIBCXX_USE_TRUNCATE, and
+	_GLIBCXX_USE_FDOPENDIR. Remove duplicates.
+	* configure: Regenerate.
+
+2025-10-15  Joel Sherrill  <joel@rtems.org>
+
+	* configure: Regenerate.
+	* configure.ac (newlib, *-rtems*): Add HAVE_SYS_IOCTL_H,
+	HAVE_SYS_STAT_H, HAVE_SYS_TYPES_H, HAVE_S_ISREG, HAVE_UNISTD_H,
+	HAVE_UNLINKAT, _GLIBCXX_USE_CHMOD, _GLIBCXX_USE_MKDIR,
+	_GLIBCXX_USE_CHDIR, _GLIBCXX_USE_GETCWD, _GLIBCXX_USE_UTIME,
+	_GLIBCXX_USE_LINK, _GLIBCXX_USE_READLINK, _GLIBCXX_USE_SYMLINK,
+	_GLIBCXX_USE_TRUNCATE and _GLIBCXX_USE_FDOPENDIR.
+
+2025-10-14  Jakub Jelinek  <jakub@redhat.com>
+
+	Backported from master:
+	2025-09-08  Jakub Jelinek  <jakub@redhat.com>
+
+	PR libstdc++/121827
+	* include/precompiled/extc++.h: Don't include ext/cast.h which is an
+	internal header.
+	* include/ext/pointer.h: Include bits/c++config.h before
+	#if _GLIBCXX_HOSTED.
+
+2025-10-06  Jonathan Wakely  <jwakely@redhat.com>
+
+	PR libstdc++/122168
+	* testsuite/20_util/ratio/operations/ops_overflow_neg.cc: Add
+	dg-error for additional error seen with -Wsystem-headers.
+
+2025-10-01  Patrick Palka  <ppalka@redhat.com>
+
+	Backported from master:
+	2025-09-24  Patrick Palka  <ppalka@redhat.com>
+
+	* testsuite/17_intro/names.cc: Undefine 'u' on s390*-linux.
+
+2025-10-01  Patrick Palka  <ppalka@redhat.com>
+
+	Backported from master:
+	2025-09-17  Patrick Palka  <ppalka@redhat.com>
+
+	* testsuite/20_util/bind/dangling_ref.cc: Compile with
+	-Wsystem-headers.
+	* testsuite/20_util/ratio/operations/ops_overflow_neg.cc: Likewise.
+	* testsuite/29_atomics/atomic/operators/pointer_partial_void.cc:
+	Likewise.
+	* testsuite/30_threads/packaged_task/cons/dangling_ref.cc:
+	Likewise.
+
+2025-09-15  Jonathan Wakely  <jwakely@redhat.com>
+
+	Backported from master:
+	2025-09-12  Jonathan Wakely  <jwakely@redhat.com>
+
+	PR libstdc++/117276
+	* include/pstl/parallel_backend_tbb.h (__func_task::finalize):
+	Make deallocation unconditional.
+
+2025-09-15  Jonathan Wakely  <jwakely@redhat.com>
+
+	Backported from master:
+	2025-09-10  Jonathan Wakely  <jwakely@redhat.com>
+
+	* include/bits/unique_ptr.h: Remove blank line.
+
+2025-09-09  Tomasz Kamiński  <tkaminsk@redhat.com>
+
+	Backported from master:
+	2025-09-05  Tomasz Kamiński  <tkaminsk@redhat.com>
+
+	* doc/html/manual/status.html: Regenerate.
+	* doc/xml/manual/status_cxx2011.xml: Add entry for bad_function_call.
+	* doc/xml/manual/status_cxx2017.xml: Add entries for bad_any_cast
+	and nullptr_t output. Update entry for sf.cmath. Fix stable name for
+	mem.res.
+
+2025-09-09  Tomasz Kamiński  <tkaminsk@redhat.com>
+
+	Backported from master:
+	2025-09-05  Tomasz Kamiński  <tkaminsk@redhat.com>
+
+	* doc/html/manual/status.html: Regenerate the file.
+	* doc/xml/manual/status_cxx2017.xml: Addd more entires.
+
+2025-09-08  Jonathan Wakely  <jwakely@redhat.com>
+
+	Backported from master:
+	2025-09-08  Jonathan Wakely  <jwakely@redhat.com>
+
+	PR libstdc++/120698
+	* doc/xml/manual/configure.xml: Do not claim that vtv is enabled
+	by default.
+	* doc/html/manual/configure.html: Regenerate.
+
+2025-09-04  Jonathan Wakely  <jwakely@redhat.com>
+
+	Backported from master:
+	2025-09-03  Jonathan Wakely  <jwakely@redhat.com>
+
+	PR libstdc++/110853
+	* include/bits/stl_pair.h [C++20] (pair(const T1&, const T2&)):
+	Use std::type_identity_t<T1> for first parameter.
+	* testsuite/20_util/pair/cons/110853.cc: New test.
+
+2025-09-04  Jonathan Wakely  <jwakely@redhat.com>
+
+	Backported from master:
+	2025-09-03  Jonathan Wakely  <jwakely@redhat.com>
+
+	PR libstdc++/121745
+	* include/bits/stl_pair.h (get): Use forward instead of move in
+	std::get<T> overloads for rvalue pairs.
+	* testsuite/20_util/pair/astuple/get_by_type.cc: Check all value
+	categories and cv-qualification.
+
+2025-09-04  Yihan Wang  <yronglin777@gmail.com>
+
+	Backported from master:
+	2025-09-03  Yihan Wang  <yronglin777@gmail.com>
+
+	* include/std/expected (expected(U&&)): Add missing constraint
+	as per LWG 4222.
+	* testsuite/20_util/expected/lwg4222.cc: New test.
+
+2025-09-04  Jonathan Wakely  <jwakely@redhat.com>
+
+	Backported from master:
+	2024-07-25  Jonathan Wakely  <jwakely@redhat.com>
+
+	* include/std/expected (expected): Constrain constructors to
+	prevent problematic bool conversions, as per LWG 3836.
+	* testsuite/20_util/expected/lwg3836.cc: New test.
+
+2025-09-03  Jonathan Wakely  <jwakely@redhat.com>
+
+	Backported from master:
+	2024-11-01  Jonathan Wakely  <jwakely@redhat.com>
+
+	* testsuite/23_containers/unordered_set/pr115285.cc: Include
+	missing header for std::vector.
+
+2025-09-03  Jonathan Wakely  <jwakely@redhat.com>
+
+	* include/bits/regex_compiler.h (_Compiler::_S_validate): Add
+	diagnostic pragma to disable -Wswitch warning.
+
+2025-09-03  Jonathan Wakely  <jwakely@redhat.com>
+
+	Backported from master:
+	2025-08-21  Jonathan Wakely  <jwakely@redhat.com>
+
+	PR libstdc++/121496
+	* include/std/mutex (__timed_mutex_impl::_M_try_wait_until):
+	Change preprocessor condition to use #if instead of #ifdef.
+	(recursive_timed_mutex::_M_clocklock): Likewise.
+	* testsuite/30_threads/timed_mutex/121496.cc: New test.
+
+2025-09-03  Jonathan Wakely  <jwakely@redhat.com>
+
+	Backported from master:
+	2025-08-21  Jonathan Wakely  <jwakely@redhat.com>
+
+	PR libstdc++/121374
+	* include/std/limits (numeric_limits<__float128>::max_digits10):
+	Fix value.
+	* testsuite/18_support/numeric_limits/128bit.cc: Check value.
+
+2025-09-03  Jonathan Wakely  <jwakely@redhat.com>
+
+	Backported from master:
+	2025-07-17  Jonathan Wakely  <jwakely@redhat.com>
+
+	PR libstdc++/121097
+	* include/c_global/cmath (hypot): Use __promote_3 instead of
+	__promoted.
+
+2025-06-11  Jonathan Wakely  <jwakely@redhat.com>
+
+	Backported from master:
+	2025-06-05  Jonathan Wakely  <jwakely@redhat.com>
+
+	PR libstdc++/120548
+	* include/std/format (__formatter_fp::_M_localize): Do not
+	include a leading sign character in the string to be grouped.
+	* testsuite/std/format/functions/format.cc: Check grouping when
+	sign is present in the output.
+
+2025-06-11  Jonathan Wakely  <jwakely@redhat.com>
+
+	Backported from master:
+	2024-09-14  Jonathan Wakely  <jwakely@redhat.com>
+
+	* include/std/format (__formatter_fp::_M_localize): Add comments
+	and micro-optimize string copy.
+
+2025-06-11  Jonathan Wakely  <jwakely@redhat.com>
+
+	Backported from master:
+	2025-06-04  Jonathan Wakely  <jwakely@redhat.com>
+
+	PR libstdc++/99832
+	* include/bits/chrono.h (system_clock::to_time_t): Add
+	always_inline attribute to be agnostic to the underlying type of
+	time_t.
+	(system_clock::from_time_t): Add always_inline for consistency
+	with to_time_t.
+	* testsuite/20_util/system_clock/99832.cc: New test.
+
+2025-06-10  Jonathan Wakely  <jwakely@redhat.com>
+
+	Backported from master:
+	2025-05-20  Jonathan Wakely  <jwakely@redhat.com>
+
+	* doc/xml/faq.xml: Update URL for archived SGI STL docs.
+	* doc/xml/manual/containers.xml: Likewise.
+	* doc/xml/manual/extensions.xml: Likewise.
+	* doc/xml/manual/using.xml: Likewise.
+	* doc/xml/manual/utilities.xml: Likewise.
+	* doc/html/*: Regenerate.
+
+2025-06-05  Giuseppe D'Angelo  <giuseppe.dangelo@kdab.com>
+
+	Backported from master:
+	2025-03-14  Giuseppe D'Angelo  <giuseppe.dangelo@kdab.com>
+
+	* include/bits/shared_ptr_base.h (lock): Fixed a compile error
+	when calling lock() on a weak_ptr<T[]>, by removing an
+	erroneous usage of element_type from within lock().
+	* testsuite/20_util/shared_ptr/requirements/explicit_instantiation/1.cc:
+	Add more tests for array types.
+	* testsuite/20_util/weak_ptr/requirements/explicit_instantiation/1.cc:
+	Likewise.
+	* testsuite/20_util/shared_ptr/requirements/1.cc: New test.
+	* testsuite/20_util/weak_ptr/requirements/1.cc: New test.
+
 2025-05-23  Release Manager
 
 	* GCC 14.3.0 released.
--- a/src/libstdc++-v3/config/locale/dragonfly/codecvt_members.cc
+++ b/src/libstdc++-v3/config/locale/dragonfly/codecvt_members.cc
@@ -226,12 +226,14 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
 
     // mbsnrtowcs is *very* fast but stops if encounters NUL characters:
     // in case we advance past it and then continue, in a loop.
-    // NB: mbsnrtowcs is a GNU extension
+    // NB: mbsnrtowcs is in POSIX.1-2008
+
+    const size_t __to_len = 1024; // Size of alloca'd output buffer
 
     // A dummy internal buffer is needed in order for mbsnrtocws to consider
     // its fourth parameter (it wouldn't with NULL as first parameter).
     wchar_t* __to = static_cast<wchar_t*>(__builtin_alloca(sizeof(wchar_t)
-							   * __max));
+							   * __to_len));
     while (__from < __end && __max)
       {
 	const extern_type* __from_chunk_end;
@@ -244,7 +246,8 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
 	const extern_type* __tmp_from = __from;
 	size_t __conv = mbsnrtowcs(__to, &__from,
 				   __from_chunk_end - __from,
-				   __max, &__state);
+				   __max > __to_len ? __to_len : __max,
+				   &__state);
 	if (__conv == static_cast<size_t>(-1))
 	  {
 	    // In case of error, in order to stop at the exact place we
--- a/src/libstdc++-v3/config/locale/gnu/codecvt_members.cc
+++ b/src/libstdc++-v3/config/locale/gnu/codecvt_members.cc
@@ -230,12 +230,14 @@ namespace
 
     // mbsnrtowcs is *very* fast but stops if encounters NUL characters:
     // in case we advance past it and then continue, in a loop.
-    // NB: mbsnrtowcs is a GNU extension
+    // NB: mbsnrtowcs is in POSIX.1-2008
+
+    const size_t __to_len = 1024; // Size of alloca'd output buffer
 
     // A dummy internal buffer is needed in order for mbsnrtocws to consider
     // its fourth parameter (it wouldn't with NULL as first parameter).
     wchar_t* __to = static_cast<wchar_t*>(__builtin_alloca(sizeof(wchar_t)
-							   * __max));
+							   * __to_len));
     while (__from < __end && __max)
       {
 	const extern_type* __from_chunk_end;
@@ -248,7 +250,8 @@ namespace
 	const extern_type* __tmp_from = __from;
 	size_t __conv = mbsnrtowcs(__to, &__from,
 				   __from_chunk_end - __from,
-				   __max, &__state);
+				   __max > __to_len ? __to_len : __max,
+				   &__state);
 	if (__conv == static_cast<size_t>(-1))
 	  {
 	    // In case of error, in order to stop at the exact place we
--- a/src/libstdc++-v3/configure
+++ b/src/libstdc++-v3/configure
@@ -28592,6 +28592,10 @@ _ACEOF
 
         $as_echo "#define HAVE_LINK 1" >>confdefs.h
 
+        $as_echo "#define HAVE_SYS_STAT_H 1" >>confdefs.h
+
+        $as_echo "#define HAVE_SYS_TYPES_H 1" >>confdefs.h
+
         $as_echo "#define HAVE_QUICK_EXIT 1" >>confdefs.h
 
         $as_echo "#define HAVE_READLINK 1" >>confdefs.h
@@ -28606,8 +28610,26 @@ _ACEOF
 
         $as_echo "#define HAVE_SYMLINK 1" >>confdefs.h
 
+        $as_echo "#define HAVE_S_ISREG 1" >>confdefs.h
+
         $as_echo "#define HAVE_TRUNCATE 1" >>confdefs.h
 
+        $as_echo "#define HAVE_UNISTD_H 1" >>confdefs.h
+
+        $as_echo "#define HAVE_UNLINKAT 1" >>confdefs.h
+
+        $as_echo "#define HAVE_USLEEP 1" >>confdefs.h
+
+        $as_echo "#define _GLIBCXX_USE_CHMOD 1" >>confdefs.h
+
+        $as_echo "#define _GLIBCXX_USE_MKDIR 1" >>confdefs.h
+
+        $as_echo "#define _GLIBCXX_USE_CHDIR 1" >>confdefs.h
+
+        $as_echo "#define _GLIBCXX_USE_GETCWD 1" >>confdefs.h
+
+        $as_echo "#define _GLIBCXX_USE_UTIME 1" >>confdefs.h
+
         $as_echo "#define HAVE_USLEEP 1" >>confdefs.h
 
         ;;
--- a/src/libstdc++-v3/configure.ac
+++ b/src/libstdc++-v3/configure.ac
@@ -391,6 +391,8 @@ dnl # rather than hardcoding that information.
         AC_DEFINE(HAVE_ALIGNED_ALLOC)
         AC_DEFINE(HAVE_AT_QUICK_EXIT)
         AC_DEFINE(HAVE_LINK)
+        AC_DEFINE(HAVE_SYS_STAT_H)
+        AC_DEFINE(HAVE_SYS_TYPES_H)
         AC_DEFINE(HAVE_QUICK_EXIT)
         AC_DEFINE(HAVE_READLINK)
         AC_DEFINE(HAVE_SETENV)
@@ -398,7 +400,16 @@ dnl # rather than hardcoding that information.
         AC_DEFINE(HAVE_SOCKATMARK)
         AC_DEFINE(HAVE_STRERROR_L)
         AC_DEFINE(HAVE_SYMLINK)
+        AC_DEFINE(HAVE_S_ISREG)
         AC_DEFINE(HAVE_TRUNCATE)
+        AC_DEFINE(HAVE_UNISTD_H)
+        AC_DEFINE(HAVE_UNLINKAT)
+        AC_DEFINE(HAVE_USLEEP)
+        AC_DEFINE(_GLIBCXX_USE_CHMOD)
+        AC_DEFINE(_GLIBCXX_USE_MKDIR)
+        AC_DEFINE(_GLIBCXX_USE_CHDIR)
+        AC_DEFINE(_GLIBCXX_USE_GETCWD)
+        AC_DEFINE(_GLIBCXX_USE_UTIME)
         AC_DEFINE(HAVE_USLEEP)
         ;;
     esac
--- a/src/libstdc++-v3/doc/html/faq.html
+++ b/src/libstdc++-v3/doc/html/faq.html
@@ -796,7 +796,7 @@
     Libstdc++-v3 incorporates a lot of code from
     <a class="link" href="https://web.archive.org/web/20171225062613/http://www.sgi.com/tech/stl/" target="_top">the SGI STL</a>
     (the final merge was from
-    <a class="link" href="https://web.archive.org/web/20171225062613/http://www.sgi.com/tech/stl/whats_new.html" target="_top">release 3.3</a>).
+    <a class="link" href="https://web.archive.org/web/20171206110416/http://www.sgi.com/tech/stl/whats_new.html" target="_top">release 3.3</a>).
     The code in libstdc++ contains many fixes and changes compared to the
     original SGI code.
     </p><p>
--- a/src/libstdc++-v3/doc/html/manual/configure.html
+++ b/src/libstdc++-v3/doc/html/manual/configure.html
@@ -268,7 +268,7 @@
         operations (e.g. the library is configured for armv7 and then code
         is compiled with <code class="option">-march=armv5t</code>) then the program
         might rely on support in libgcc to provide the atomics.
-    </p></dd><dt><span class="term"><code class="code">--enable-vtable-verify</code>[default]</span></dt><dd><p>Use <code class="code">-fvtable-verify=std</code> to compile the C++
+    </p></dd><dt><span class="term"><code class="code">--enable-vtable-verify</code></span></dt><dd><p>Use <code class="code">-fvtable-verify=std</code> to compile the C++
     runtime with instrumentation for vtable verification. All virtual
     functions in the standard library will be verified at runtime.
     Types impacted include <code class="classname">locale</code> and
--- a/src/libstdc++-v3/doc/html/manual/containers.html
+++ b/src/libstdc++-v3/doc/html/manual/containers.html
@@ -11,7 +11,7 @@
      Yes it is, at least using the <a class="link" href="using_dual_abi.html" title="Dual ABI">old
      ABI</a>, and that's okay.  This is a decision that we preserved
      when we imported SGI's STL implementation.  The following is
-     quoted from <a class="link" href="https://web.archive.org/web/20171225062613/http://www.sgi.com/tech/stl/FAQ.html" target="_top">their FAQ</a>:
+     quoted from <a class="link" href="https://web.archive.org/web/20161222192301/http://www.sgi.com/tech/stl/FAQ.html" target="_top">their FAQ</a>:
    </p><div class="blockquote"><blockquote class="blockquote"><p>
        The size() member function, for list and slist, takes time
        proportional to the number of elements in the list.  This was a
--- a/src/libstdc++-v3/doc/html/manual/ext_numerics.html
+++ b/src/libstdc++-v3/doc/html/manual/ext_numerics.html
@@ -14,7 +14,7 @@
    The operation functor must be associative.
 </p><p>The <code class="code">iota</code> function wins the award for Extension With the
    Coolest Name (the name comes from Ken Iverson's APL language.)  As
-   described in the <a class="link" href="https://web.archive.org/web/20171225062613/http://www.sgi.com/tech/stl/iota.html" target="_top">SGI
+   described in the <a class="link" href="https://web.archive.org/web/20170201044840/http://www.sgi.com/tech/stl/iota.html" target="_top">SGI
    documentation</a>, it "assigns sequentially increasing values to a range.
    That is, it assigns <code class="code">value</code> to <code class="code">*first</code>,
    <code class="code">value + 1</code> to<code class="code"> *(first + 1)</code> and so on."
--- a/src/libstdc++-v3/doc/html/manual/ext_sgi.html
+++ b/src/libstdc++-v3/doc/html/manual/ext_sgi.html
@@ -28,12 +28,12 @@
       and sets.
    </p><p>Each of the associative containers map, multimap, set, and multiset
       have a counterpart which uses a
-      <a class="link" href="https://web.archive.org/web/20171225062613/http://www.sgi.com/tech/stl/HashFunction.html" target="_top">hashing
+      <a class="link" href="https://web.archive.org/web/20171230172024/http://www.sgi.com/tech/stl/HashFunction.html" target="_top">hashing
       function</a> to do the arranging, instead of a strict weak ordering
       function.  The classes take as one of their template parameters a
       function object that will return the hash value; by default, an
       instantiation of
-      <a class="link" href="https://web.archive.org/web/20171225062613/http://www.sgi.com/tech/stl/hash.html" target="_top">hash</a>.
+      <a class="link" href="https://web.archive.org/web/20171230172200/http://www.sgi.com/tech/stl/hash.html" target="_top">hash</a>.
       You should specialize this functor for your class, or define your own,
       before trying to use one of the hashing classes.
    </p><p>The hashing classes support all the usual associative container
--- a/src/libstdc++-v3/doc/html/manual/status.html
+++ b/src/libstdc++-v3/doc/html/manual/status.html
@@ -254,6 +254,9 @@ the GCC 14 release series.
    </p><p>
       <span class="emphasis"><em>20.7.2.0 [util.smartptr.weakptr]</em></span>
       <code class="code">what()</code> returns <code class="literal">"bad_weak_ptr"</code>.
+   </p><p>
+      <span class="emphasis"><em>20.8.11.1 [func.wrap.badcall]</em></span>
+      <code class="code">what()</code> returns <code class="literal">"bad_function_call"</code>.
    </p><p>
       <span class="emphasis"><em>20.8.9.1.3 [func.bind.place]/1</em></span> There are 29
       placeholders defined and the placeholder types are
@@ -1054,7 +1057,11 @@ since C++14 and the implementation is complete.
       <code class="literal">"std::visit: variant is valueless"</code>,
       or <code class="literal">"std::visit&lt;R&gt;: variant is valueless"</code>.
    </p><p>
-      <span class="emphasis"><em>23.12.5.2 [memory.resource.pool.options]</em></span>
+      <span class="emphasis"><em>23.8.2 [any.bad_any_cast]</em></span>
+      <code class="code">what()</code> returns <code class="literal">"bad any_cast"</code>.
+   </p><p>
+      <span class="emphasis"><em>23.12.5 [mem.res.pool.options]</em></span>,
+      <span class="emphasis"><em>23.12.5 [mem.res.pool.mem]</em></span>
       Let S equal <code class="code">numeric_limits&lt;size_t&gt;::digits</code>.
       The limit for maximum number of blocks in a chunk is given by
       <span class="mathphrase">2<sup>N</sup>-1</span>,
@@ -1065,7 +1072,7 @@ since C++14 and the implementation is complete.
       otherwise 3072 when <span class="mathphrase">S &gt; 16</span>,
       otherwise 768.
    </p><p>
-      <span class="emphasis"><em>23.12.6.1 [memory.resource.monotonic.buffer.ctor]</em></span>
+      <span class="emphasis"><em>23.12.6.1 [mem.res.monotonic.buffer.ctor]</em></span>
       The default <code class="code">next_buffer_size</code> is <code class="code">128 * sizeof(void*)</code>.
       The default growth factor is <code class="code">1.5</code>.
    </p><p>
@@ -1100,10 +1107,14 @@ since C++14 and the implementation is complete.
       races depends on the target C library that provides the function.
    </p><p>
       <span class="emphasis"><em>29.9.5 [sf.cmath]</em></span>
-      The effect of calling the mathematical special functions with large
-      inputs should be documented here.
+      Calling the mathematical special functions with large inputs is supported
+      but the results may be imprecise.
+   </p><p>
+      <span class="emphasis"><em>30.7.5.2.3 [ostream.inserters]</em></span>
+      NTCTS for <code class="code">nullptr_t</code> is <code class="literal">"nullptr"</code>.
    </p><p>
-      <span class="emphasis"><em>30.10.2.1 [fs.conform.9945]</em></span>
+      <span class="emphasis"><em>30.10.2.1 [fs.conform.9945]</em></span>,
+      <span class="emphasis"><em>30.10.2.2 [fs.conform.os]</em></span>
       The behavior of the filesystem library implementation will depend on
       the target operating system. Some features will not be supported
       on some targets. Symbolic links and file permissions
@@ -1139,7 +1150,20 @@ since C++14 and the implementation is complete.
       Specifically, it is not possible to rename a directory to replace another
       directory (POSIX requires that to work if the directory being
       replaced is empty).
-    </p><div class="section"><div class="titlepage"><div><div><h5 class="title"><a id="iso.2017.par2ts"></a>Parallelism 2 TS</h5></div></div></div><p>
+   </p><p>
+      <span class="emphasis"><em>30.10.29.2 [fs.enum.file_type]</em></span>,
+      <span class="emphasis"><em>30.10.34.3 [fs.op.copy]</em></span>,
+      <span class="emphasis"><em>30.10.34.35 [fs.op.status]</em></span>
+      No additional file types are supported, and there are no
+      implementation-defined enumerators in
+      <code class="code">std::filesystem::file_type</code>.
+   </p><p>
+     <span class="emphasis"><em>30.10.32 [fs.class.directory_iterator]</em></span>,
+     <span class="emphasis"><em>30.10.33 [fs.class.rec.dir.itr]</em></span>
+     Any directory-like file types supported by
+     <code class="code">opendir</code>/<code class="code">readdir</code>
+     (or <code class="code">_wopendir</code>/<code class="code">_wreaddir</code> on Windows).
+   </p><div class="section"><div class="titlepage"><div><div><h5 class="title"><a id="iso.2017.par2ts"></a>Parallelism 2 TS</h5></div></div></div><p>
         <span class="emphasis"><em>9.3 [parallel.simd.abi]</em></span>
         <code class="code">max_fixed_size&lt;T&gt;</code> is 32, except when targetting
         AVX512BW and <code class="code">sizeof(T)</code> is 1.
--- a/src/libstdc++-v3/doc/html/manual/using_concurrency.html
+++ b/src/libstdc++-v3/doc/html/manual/using_concurrency.html
@@ -40,7 +40,7 @@ The standard places requirements on the library to ensure that no data
 races are caused by the library itself or by programs which use the
 library correctly (as described below).
 The C++11 memory model and library requirements are a more formal version
-of the <a class="link" href="https://web.archive.org/web/20171225062613/http://www.sgi.com/tech/stl/thread_safety.html" target="_top">SGI STL</a> definition of thread safety, which the library used
+of the <a class="link" href="https://web.archive.org/web/20171221154911/http://www.sgi.com/tech/stl/thread_safety.html" target="_top">SGI STL</a> definition of thread safety, which the library used
 prior to the 2011 standard.
 </p><p>The library strives to be thread-safe when all of the following
 	 conditions are met:
@@ -243,10 +243,10 @@ gcc version 4.1.2 20070925 (Red Hat 4.1.2-33)
       threaded and non-threaded code), see Chapter 17.
    </p><p>Two excellent pages to read when working with the Standard C++
       containers and threads are
-      <a class="link" href="https://web.archive.org/web/20171225062613/http://www.sgi.com/tech/stl/thread_safety.html" target="_top">SGI's
-      https://web.archive.org/web/20171225062613/http://www.sgi.com/tech/stl/thread_safety.html</a> and
-      <a class="link" href="https://web.archive.org/web/20171225062613/http://www.sgi.com/tech/stl/Allocators.html" target="_top">SGI's
-      https://web.archive.org/web/20171225062613/http://www.sgi.com/tech/stl/Allocators.html</a>.
+      <a class="link" href="https://web.archive.org/web/20171221154911/http://www.sgi.com/tech/stl/thread_safety.html" target="_top">SGI's
+      https://web.archive.org/web/20171221154911/http://www.sgi.com/tech/stl/thread_safety.html</a> and
+      <a class="link" href="https://web.archive.org/web/20171108142526/http://www.sgi.com/tech/stl/Allocators.html" target="_top">SGI's
+      https://web.archive.org/web/20171108142526/http://www.sgi.com/tech/stl/Allocators.html</a>.
    </p><p><span class="emphasis"><em>However, please ignore all discussions about the user-level
       configuration of the lock implementation inside the STL
       container-memory allocator on those pages.  For the sake of this
--- a/src/libstdc++-v3/doc/html/manual/utilities.html
+++ b/src/libstdc++-v3/doc/html/manual/utilities.html
@@ -11,6 +11,6 @@
       get slightly the wrong idea.  In the interest of not reinventing
       the wheel, we will refer you to the introduction to the functor
       concept written by SGI as part of their STL, in
-      <a class="link" href="https://web.archive.org/web/20171225062613/http://www.sgi.com/tech/stl/functors.html" target="_top">their
-      https://web.archive.org/web/20171225062613/http://www.sgi.com/tech/stl/functors.html</a>.
+      <a class="link" href="https://web.archive.org/web/20171209002754/http://www.sgi.com/tech/stl/functors.html" target="_top">their
+      https://web.archive.org/web/20171209002754/http://www.sgi.com/tech/stl/functors.html</a>.
    </p></div></div><div class="navfooter"><hr /><table width="100%" summary="Navigation footer"><tr><td width="40%" align="left"><a accesskey="p" href="concept_checking.html">Prev</a> </td><td width="20%" align="center"><a accesskey="u" href="std_contents.html">Up</a></td><td width="40%" align="right"> <a accesskey="n" href="pairs.html">Next</a></td></tr><tr><td width="40%" align="left" valign="top">Concept Checking </td><td width="20%" align="center"><a accesskey="h" href="../index.html">Home</a></td><td width="40%" align="right" valign="top"> Pairs</td></tr></table></div></body></html>
\ No newline at end of file
--- a/src/libstdc++-v3/doc/xml/faq.xml
+++ b/src/libstdc++-v3/doc/xml/faq.xml
@@ -1130,7 +1130,7 @@
     Libstdc++-v3 incorporates a lot of code from
     <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="https://web.archive.org/web/20171225062613/http://www.sgi.com/tech/stl/">the SGI STL</link>
     (the final merge was from
-    <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="https://web.archive.org/web/20171225062613/http://www.sgi.com/tech/stl/whats_new.html">release 3.3</link>).
+    <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="https://web.archive.org/web/20171206110416/http://www.sgi.com/tech/stl/whats_new.html">release 3.3</link>).
     The code in libstdc++ contains many fixes and changes compared to the
     original SGI code.
     </para>
--- a/src/libstdc++-v3/doc/xml/manual/configure.xml
+++ b/src/libstdc++-v3/doc/xml/manual/configure.xml
@@ -438,7 +438,7 @@
     </para>
  </listitem></varlistentry>
 
- <varlistentry><term><code>--enable-vtable-verify</code>[default]</term>
+ <varlistentry><term><code>--enable-vtable-verify</code></term>
  <listitem>
     <para>Use <code>-fvtable-verify=std</code> to compile the C++
     runtime with instrumentation for vtable verification. All virtual
--- a/src/libstdc++-v3/doc/xml/manual/containers.xml
+++ b/src/libstdc++-v3/doc/xml/manual/containers.xml
@@ -28,7 +28,7 @@
      Yes it is, at least using the <link linkend="manual.intro.using.abi">old
      ABI</link>, and that's okay.  This is a decision that we preserved
      when we imported SGI's STL implementation.  The following is
-     quoted from <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="https://web.archive.org/web/20171225062613/http://www.sgi.com/tech/stl/FAQ.html">their FAQ</link>:
+     quoted from <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="https://web.archive.org/web/20161222192301/http://www.sgi.com/tech/stl/FAQ.html">their FAQ</link>:
    </para>
    <blockquote>
      <para>
--- a/src/libstdc++-v3/doc/xml/manual/extensions.xml
+++ b/src/libstdc++-v3/doc/xml/manual/extensions.xml
@@ -227,12 +227,12 @@ extensions, be aware of two things:
    </para>
    <para>Each of the associative containers map, multimap, set, and multiset
       have a counterpart which uses a
-      <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="https://web.archive.org/web/20171225062613/http://www.sgi.com/tech/stl/HashFunction.html">hashing
+      <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="https://web.archive.org/web/20171230172024/http://www.sgi.com/tech/stl/HashFunction.html">hashing
       function</link> to do the arranging, instead of a strict weak ordering
       function.  The classes take as one of their template parameters a
       function object that will return the hash value; by default, an
       instantiation of
-      <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="https://web.archive.org/web/20171225062613/http://www.sgi.com/tech/stl/hash.html">hash</link>.
+      <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="https://web.archive.org/web/20171230172200/http://www.sgi.com/tech/stl/hash.html">hash</link>.
       You should specialize this functor for your class, or define your own,
       before trying to use one of the hashing classes.
    </para>
@@ -394,7 +394,7 @@ get_temporary_buffer(5, (int*)0);
 </para>
 <para>The <code>iota</code> function wins the award for Extension With the
    Coolest Name (the name comes from Ken Iverson's APL language.)  As
-   described in the <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="https://web.archive.org/web/20171225062613/http://www.sgi.com/tech/stl/iota.html">SGI
+   described in the <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="https://web.archive.org/web/20170201044840/http://www.sgi.com/tech/stl/iota.html">SGI
    documentation</link>, it "assigns sequentially increasing values to a range.
    That is, it assigns <code>value</code> to <code>*first</code>,
    <code>value + 1</code> to<code> *(first + 1)</code> and so on."
--- a/src/libstdc++-v3/doc/xml/manual/status_cxx2011.xml
+++ b/src/libstdc++-v3/doc/xml/manual/status_cxx2011.xml
@@ -2613,6 +2613,11 @@ the GCC 14 release series.
       <code>what()</code> returns <literal>"bad_weak_ptr"</literal>.
    </para>
 
+   <para>
+      <emphasis>20.8.11.1 [func.wrap.badcall]</emphasis>
+      <code>what()</code> returns <literal>"bad_function_call"</literal>.
+   </para>
+
    <para>
       <emphasis>20.8.9.1.3 [func.bind.place]/1</emphasis> There are 29
       placeholders defined and the placeholder types are
--- a/src/libstdc++-v3/doc/xml/manual/status_cxx2017.xml
+++ b/src/libstdc++-v3/doc/xml/manual/status_cxx2017.xml
@@ -2918,7 +2918,13 @@ since C++14 and the implementation is complete.
    </para>
 
    <para>
-      <emphasis>23.12.5.2 [memory.resource.pool.options]</emphasis>
+      <emphasis>23.8.2 [any.bad_any_cast]</emphasis>
+      <code>what()</code> returns <literal>"bad any_cast"</literal>.
+   </para>
+
+   <para>
+      <emphasis>23.12.5 [mem.res.pool.options]</emphasis>,
+      <emphasis>23.12.5 [mem.res.pool.mem]</emphasis>
       Let S equal <code>numeric_limits&lt;size_t&gt;::digits</code>.
       The limit for maximum number of blocks in a chunk is given by
       <inlineequation><mathphrase>2<superscript>N</superscript>-1</mathphrase></inlineequation>,
@@ -2931,7 +2937,7 @@ since C++14 and the implementation is complete.
    </para>
 
    <para>
-      <emphasis>23.12.6.1 [memory.resource.monotonic.buffer.ctor]</emphasis>
+      <emphasis>23.12.6.1 [mem.res.monotonic.buffer.ctor]</emphasis>
       The default <code>next_buffer_size</code> is <code>128 * sizeof(void*)</code>.
       The default growth factor is <code>1.5</code>.
    </para>
@@ -2981,12 +2987,18 @@ since C++14 and the implementation is complete.
 
    <para>
       <emphasis>29.9.5 [sf.cmath]</emphasis>
-      The effect of calling the mathematical special functions with large
-      inputs should be documented here.
+      Calling the mathematical special functions with large inputs is supported
+      but the results may be imprecise.
    </para>
 
    <para>
-      <emphasis>30.10.2.1 [fs.conform.9945]</emphasis>
+      <emphasis>30.7.5.2.3 [ostream.inserters]</emphasis>
+      NTCTS for <code>nullptr_t</code> is <literal>"nullptr"</literal>.
+   </para>
+
+   <para>
+      <emphasis>30.10.2.1 [fs.conform.9945]</emphasis>,
+      <emphasis>30.10.2.2 [fs.conform.os]</emphasis>
       The behavior of the filesystem library implementation will depend on
       the target operating system. Some features will not be supported
       on some targets. Symbolic links and file permissions
@@ -3023,7 +3035,7 @@ since C++14 and the implementation is complete.
       If <code>!is_regular_file(p)</code>, an error is reported.
    </para>
 
-    <para>
+   <para>
       <emphasis>30.10.15.32 [fs.op.rename]</emphasis>
       On Windows, <code>filesystem::rename</code>
       is implemented by calling <code>MoveFileExW</code> and so
@@ -3032,8 +3044,24 @@ since C++14 and the implementation is complete.
       Specifically, it is not possible to rename a directory to replace another
       directory (POSIX requires that to work if the directory being
       replaced is empty).
-    </para>
+   </para>
+
+   <para>
+      <emphasis>30.10.29.2 [fs.enum.file_type]</emphasis>,
+      <emphasis>30.10.34.3 [fs.op.copy]</emphasis>,
+      <emphasis>30.10.34.35 [fs.op.status]</emphasis>
+      No additional file types are supported, and there are no
+      implementation-defined enumerators in
+      <code>std::filesystem::file_type</code>.
+   </para>
 
+   <para>
+     <emphasis>30.10.32 [fs.class.directory_iterator]</emphasis>,
+     <emphasis>30.10.33 [fs.class.rec.dir.itr]</emphasis>
+     Any directory-like file types supported by
+     <code>opendir</code>/<code>readdir</code>
+     (or <code>_wopendir</code>/<code>_wreaddir</code> on Windows).
+   </para>
 
    <section xml:id="iso.2017.par2ts" xreflabel="Implementation Specific Behavior of the Parallelism 2 TS"><info><title>Parallelism 2 TS</title></info>
 
--- a/src/libstdc++-v3/doc/xml/manual/using.xml
+++ b/src/libstdc++-v3/doc/xml/manual/using.xml
@@ -1929,7 +1929,7 @@ The standard places requirements on the library to ensure that no data
 races are caused by the library itself or by programs which use the
 library correctly (as described below).
 The C++11 memory model and library requirements are a more formal version
-of the <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="https://web.archive.org/web/20171225062613/http://www.sgi.com/tech/stl/thread_safety.html">SGI STL</link> definition of thread safety, which the library used
+of the <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="https://web.archive.org/web/20171221154911/http://www.sgi.com/tech/stl/thread_safety.html">SGI STL</link> definition of thread safety, which the library used
 prior to the 2011 standard.
 </para>
 
@@ -2214,10 +2214,10 @@ gcc version 4.1.2 20070925 (Red Hat 4.1.2-33)
    </para>
    <para>Two excellent pages to read when working with the Standard C++
       containers and threads are
-      <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="https://web.archive.org/web/20171225062613/http://www.sgi.com/tech/stl/thread_safety.html">SGI's
-      https://web.archive.org/web/20171225062613/http://www.sgi.com/tech/stl/thread_safety.html</link> and
-      <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="https://web.archive.org/web/20171225062613/http://www.sgi.com/tech/stl/Allocators.html">SGI's
-      https://web.archive.org/web/20171225062613/http://www.sgi.com/tech/stl/Allocators.html</link>.
+      <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="https://web.archive.org/web/20171221154911/http://www.sgi.com/tech/stl/thread_safety.html">SGI's
+      https://web.archive.org/web/20171221154911/http://www.sgi.com/tech/stl/thread_safety.html</link> and
+      <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="https://web.archive.org/web/20171108142526/http://www.sgi.com/tech/stl/Allocators.html">SGI's
+      https://web.archive.org/web/20171108142526/http://www.sgi.com/tech/stl/Allocators.html</link>.
    </para>
    <para><emphasis>However, please ignore all discussions about the user-level
       configuration of the lock implementation inside the STL
--- a/src/libstdc++-v3/doc/xml/manual/utilities.xml
+++ b/src/libstdc++-v3/doc/xml/manual/utilities.xml
@@ -22,8 +22,8 @@
       get slightly the wrong idea.  In the interest of not reinventing
       the wheel, we will refer you to the introduction to the functor
       concept written by SGI as part of their STL, in
-      <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="https://web.archive.org/web/20171225062613/http://www.sgi.com/tech/stl/functors.html">their
-      https://web.archive.org/web/20171225062613/http://www.sgi.com/tech/stl/functors.html</link>.
+      <link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="https://web.archive.org/web/20171209002754/http://www.sgi.com/tech/stl/functors.html">their
+      https://web.archive.org/web/20171209002754/http://www.sgi.com/tech/stl/functors.html</link>.
    </para>
 </section>
 
--- a/src/libstdc++-v3/include/Makefile.am
+++ b/src/libstdc++-v3/include/Makefile.am
@@ -907,6 +907,8 @@ c_compatibility_headers = \
 	${c_compatibility_srcdir}/tgmath.h \
 	${c_compatibility_srcdir}/math.h \
 	${c_compatibility_srcdir}/stdatomic.h \
+	${c_compatibility_srcdir}/stdbit.h \
+	${c_compatibility_srcdir}/stdckdint.h \
 	${c_compatibility_srcdir}/stdlib.h
 endif
 
--- a/src/libstdc++-v3/include/Makefile.in
+++ b/src/libstdc++-v3/include/Makefile.in
@@ -1244,6 +1244,8 @@ c_compatibility_builddir = .
 @GLIBCXX_C_HEADERS_C_GLOBAL_TRUE@	${c_compatibility_srcdir}/tgmath.h \
 @GLIBCXX_C_HEADERS_C_GLOBAL_TRUE@	${c_compatibility_srcdir}/math.h \
 @GLIBCXX_C_HEADERS_C_GLOBAL_TRUE@	${c_compatibility_srcdir}/stdatomic.h \
+@GLIBCXX_C_HEADERS_C_GLOBAL_TRUE@	${c_compatibility_srcdir}/stdbit.h \
+@GLIBCXX_C_HEADERS_C_GLOBAL_TRUE@	${c_compatibility_srcdir}/stdckdint.h \
 @GLIBCXX_C_HEADERS_C_GLOBAL_TRUE@	${c_compatibility_srcdir}/stdlib.h
 
 @GLIBCXX_C_HEADERS_C_STD_TRUE@c_compatibility_headers = 
--- a/src/libstdc++-v3/include/bits/atomic_base.h
+++ b/src/libstdc++-v3/include/bits/atomic_base.h
@@ -686,12 +686,9 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
 
       __pointer_type 	_M_p _GLIBCXX20_INIT(nullptr);
 
-      // Factored out to facilitate explicit specialization.
-      constexpr ptrdiff_t
-      _M_type_size(ptrdiff_t __d) const { return __d * sizeof(_PTp); }
-
-      constexpr ptrdiff_t
-      _M_type_size(ptrdiff_t __d) const volatile { return __d * sizeof(_PTp); }
+      static constexpr ptrdiff_t
+      _S_type_size(ptrdiff_t __d)
+      { return __d * sizeof(_PTp); }
 
     public:
       __atomic_base() noexcept = default;
@@ -741,42 +738,42 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
 
       __pointer_type
       operator++() noexcept
-      { return __atomic_add_fetch(&_M_p, _M_type_size(1),
+      { return __atomic_add_fetch(&_M_p, _S_type_size(1),
 				  int(memory_order_seq_cst)); }
 
       __pointer_type
       operator++() volatile noexcept
-      { return __atomic_add_fetch(&_M_p, _M_type_size(1),
+      { return __atomic_add_fetch(&_M_p, _S_type_size(1),
 				  int(memory_order_seq_cst)); }
 
       __pointer_type
       operator--() noexcept
-      { return __atomic_sub_fetch(&_M_p, _M_type_size(1),
+      { return __atomic_sub_fetch(&_M_p, _S_type_size(1),
 				  int(memory_order_seq_cst)); }
 
       __pointer_type
       operator--() volatile noexcept
-      { return __atomic_sub_fetch(&_M_p, _M_type_size(1),
+      { return __atomic_sub_fetch(&_M_p, _S_type_size(1),
 				  int(memory_order_seq_cst)); }
 
       __pointer_type
       operator+=(ptrdiff_t __d) noexcept
-      { return __atomic_add_fetch(&_M_p, _M_type_size(__d),
+      { return __atomic_add_fetch(&_M_p, _S_type_size(__d),
 				  int(memory_order_seq_cst)); }
 
       __pointer_type
       operator+=(ptrdiff_t __d) volatile noexcept
-      { return __atomic_add_fetch(&_M_p, _M_type_size(__d),
+      { return __atomic_add_fetch(&_M_p, _S_type_size(__d),
 				  int(memory_order_seq_cst)); }
 
       __pointer_type
       operator-=(ptrdiff_t __d) noexcept
-      { return __atomic_sub_fetch(&_M_p, _M_type_size(__d),
+      { return __atomic_sub_fetch(&_M_p, _S_type_size(__d),
 				  int(memory_order_seq_cst)); }
 
       __pointer_type
       operator-=(ptrdiff_t __d) volatile noexcept
-      { return __atomic_sub_fetch(&_M_p, _M_type_size(__d),
+      { return __atomic_sub_fetch(&_M_p, _S_type_size(__d),
 				  int(memory_order_seq_cst)); }
 
       bool
@@ -931,22 +928,22 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
       _GLIBCXX_ALWAYS_INLINE __pointer_type
       fetch_add(ptrdiff_t __d,
 		memory_order __m = memory_order_seq_cst) noexcept
-      { return __atomic_fetch_add(&_M_p, _M_type_size(__d), int(__m)); }
+      { return __atomic_fetch_add(&_M_p, _S_type_size(__d), int(__m)); }
 
       _GLIBCXX_ALWAYS_INLINE __pointer_type
       fetch_add(ptrdiff_t __d,
 		memory_order __m = memory_order_seq_cst) volatile noexcept
-      { return __atomic_fetch_add(&_M_p, _M_type_size(__d), int(__m)); }
+      { return __atomic_fetch_add(&_M_p, _S_type_size(__d), int(__m)); }
 
       _GLIBCXX_ALWAYS_INLINE __pointer_type
       fetch_sub(ptrdiff_t __d,
 		memory_order __m = memory_order_seq_cst) noexcept
-      { return __atomic_fetch_sub(&_M_p, _M_type_size(__d), int(__m)); }
+      { return __atomic_fetch_sub(&_M_p, _S_type_size(__d), int(__m)); }
 
       _GLIBCXX_ALWAYS_INLINE __pointer_type
       fetch_sub(ptrdiff_t __d,
 		memory_order __m = memory_order_seq_cst) volatile noexcept
-      { return __atomic_fetch_sub(&_M_p, _M_type_size(__d), int(__m)); }
+      { return __atomic_fetch_sub(&_M_p, _S_type_size(__d), int(__m)); }
     };
 
   namespace __atomic_impl
@@ -967,13 +964,16 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
 #endif
       }
 
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wc++17-extensions"
+
     template<typename _Tp>
       _GLIBCXX_ALWAYS_INLINE _GLIBCXX14_CONSTEXPR _Tp*
       __clear_padding(_Tp& __val) noexcept
       {
 	auto* __ptr = std::__addressof(__val);
 #if __has_builtin(__builtin_clear_padding)
-	if _GLIBCXX17_CONSTEXPR (__atomic_impl::__maybe_has_padding<_Tp>())
+	if constexpr (__atomic_impl::__maybe_has_padding<_Tp>())
 	  __builtin_clear_padding(__ptr);
 #endif
 	return __ptr;
@@ -983,9 +983,6 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
     template<typename _Tp>
       using _Val = typename remove_volatile<_Tp>::type;
 
-#pragma GCC diagnostic push
-#pragma GCC diagnostic ignored "-Wc++17-extensions"
-
     template<bool _AtomicRef = false, typename _Tp>
       _GLIBCXX_ALWAYS_INLINE bool
       __compare_exchange(_Tp& __val, _Val<_Tp>& __e, _Val<_Tp>& __i,
@@ -1283,7 +1280,10 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
 
       constexpr
       __atomic_float(_Fp __t) : _M_fp(__t)
-      { __atomic_impl::__clear_padding(_M_fp); }
+      { 
+ 	if (!std::__is_constant_evaluated())
+	  __atomic_impl::__clear_padding(_M_fp);
+      }
 
       __atomic_float(const __atomic_float&) = delete;
       __atomic_float& operator=(const __atomic_float&) = delete;
--- a/src/libstdc++-v3/include/bits/atomic_wait.h
+++ b/src/libstdc++-v3/include/bits/atomic_wait.h
@@ -186,7 +186,8 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
       bool __atomic_compare(const _Tp& __a, const _Tp& __b)
       {
 	// TODO make this do the correct padding bit ignoring comparison
-	return __builtin_memcmp(&__a, &__b, sizeof(_Tp)) == 0;
+	return __builtin_memcmp(std::addressof(__a), std::addressof(__b),
+				sizeof(_Tp)) == 0;
       }
 
     struct __waiter_pool_base
--- a/src/libstdc++-v3/include/bits/basic_string.h
+++ b/src/libstdc++-v3/include/bits/basic_string.h
@@ -3272,7 +3272,6 @@ _GLIBCXX_BEGIN_NAMESPACE_CXX11
 	_GLIBCXX_NODISCARD _GLIBCXX20_CONSTEXPR
 	_If_sv<_Tp, int>
 	compare(size_type __pos, size_type __n, const _Tp& __svt) const
-	noexcept(is_same<_Tp, __sv_type>::value)
 	{
 	  __sv_type __sv = __svt;
 	  return __sv_type(*this).substr(__pos, __n).compare(__sv);
@@ -3293,7 +3292,6 @@ _GLIBCXX_BEGIN_NAMESPACE_CXX11
 	_If_sv<_Tp, int>
 	compare(size_type __pos1, size_type __n1, const _Tp& __svt,
 		size_type __pos2, size_type __n2 = npos) const
-	noexcept(is_same<_Tp, __sv_type>::value)
 	{
 	  __sv_type __sv = __svt;
 	  return __sv_type(*this)
--- a/src/libstdc++-v3/include/bits/chrono.h
+++ b/src/libstdc++-v3/include/bits/chrono.h
@@ -1239,6 +1239,7 @@ _GLIBCXX_BEGIN_INLINE_ABI_NAMESPACE(_V2)
       now() noexcept;
 
       // Map to C API
+      [[__gnu__::__always_inline__]]
       static std::time_t
       to_time_t(const time_point& __t) noexcept
       {
@@ -1246,6 +1247,7 @@ _GLIBCXX_BEGIN_INLINE_ABI_NAMESPACE(_V2)
 			   (__t.time_since_epoch()).count());
       }
 
+      [[__gnu__::__always_inline__]]
       static time_point
       from_time_t(std::time_t __t) noexcept
       {
--- a/src/libstdc++-v3/include/bits/chrono_io.h
+++ b/src/libstdc++-v3/include/bits/chrono_io.h
@@ -3659,14 +3659,14 @@ namespace __detail
 		    }
 		  else // Read fractional seconds
 		    {
-		      basic_stringstream<_CharT> __buf;
+		      stringstream __buf;
 		      auto __digit = _S_try_read_digit(__is, __err);
 		      if (__digit != -1)
 			{
-			  __buf.put(_CharT('0') + __digit);
+			  __buf.put('0' + __digit);
 			  __digit = _S_try_read_digit(__is, __err);
 			  if (__digit != -1)
-			    __buf.put(_CharT('0') + __digit);
+			    __buf.put('0' + __digit);
 			}
 
 		      auto __i = __is.peek();
@@ -3691,7 +3691,7 @@ namespace __detail
 				{
 				  __digit = _S_try_read_digit(__is, __err);
 				  if (__digit != -1)
-				    __buf.put(_CharT('0') + __digit);
+				    __buf.put('0' + __digit);
 				  else
 				    break;
 				}
--- a/src/libstdc++-v3/include/bits/cow_string.h
+++ b/src/libstdc++-v3/include/bits/cow_string.h
@@ -2847,7 +2847,6 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
       template<typename _Tp>
 	_If_sv<_Tp, int>
 	compare(size_type __pos, size_type __n, const _Tp& __svt) const
-	noexcept(is_same<_Tp, __sv_type>::value)
 	{
 	  __sv_type __sv = __svt;
 	  return __sv_type(*this).substr(__pos, __n).compare(__sv);
@@ -2867,7 +2866,6 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
 	_If_sv<_Tp, int>
 	compare(size_type __pos1, size_type __n1, const _Tp& __svt,
 		size_type __pos2, size_type __n2 = npos) const
-	noexcept(is_same<_Tp, __sv_type>::value)
 	{
 	  __sv_type __sv = __svt;
 	  return __sv_type(*this)
--- a/src/libstdc++-v3/include/bits/forward_list.h
+++ b/src/libstdc++-v3/include/bits/forward_list.h
@@ -670,7 +670,7 @@ _GLIBCXX_BEGIN_NAMESPACE_CONTAINER
 	void
 	assign(_InputIterator __first, _InputIterator __last)
 	{
-	  typedef is_assignable<_Tp, decltype(*__first)> __assignable;
+	  typedef is_assignable<_Tp&, decltype(*__first)> __assignable;
 	  _M_assign(__first, __last, __assignable());
 	}
 
--- a/src/libstdc++-v3/include/bits/out_ptr.h
+++ b/src/libstdc++-v3/include/bits/out_ptr.h
@@ -395,7 +395,7 @@ namespace __detail
    * @tparam _Pointer The type of pointer to convert to.
    * @param __s The pointer that should take ownership of the result.
    * @param __args... Arguments to use when resetting the smart pointer.
-   * @return A std::inout_ptr_t referring to `__s`.
+   * @return A `std::out_ptr_t` referring to `__s`.
    * @since C++23
    * @headerfile <memory>
    */
@@ -416,7 +416,7 @@ namespace __detail
    * @tparam _Pointer The type of pointer to convert to.
    * @param __s The pointer that should take ownership of the result.
    * @param __args... Arguments to use when resetting the smart pointer.
-   * @return A std::inout_ptr_t referring to `__s`.
+   * @return A `std::inout_ptr_t` referring to `__s`.
    * @since C++23
    * @headerfile <memory>
    */
--- a/src/libstdc++-v3/include/bits/ranges_cmp.h
+++ b/src/libstdc++-v3/include/bits/ranges_cmp.h
@@ -68,10 +68,11 @@ namespace ranges
 	= requires (_Tp&& __t, _Up&& __u) { { __t < __u } -> same_as<bool>; }
 	  && convertible_to<_Tp, const volatile void*>
 	  && convertible_to<_Up, const volatile void*>
-	  && (! requires(_Tp&& __t, _Up&& __u)
+	  && ! requires(_Tp&& __t, _Up&& __u)
 	      { operator<(std::forward<_Tp>(__t), std::forward<_Up>(__u)); }
-	      && ! requires(_Tp&& __t, _Up&& __u)
-	      { std::forward<_Tp>(__t).operator<(std::forward<_Up>(__u)); });
+	  && ! requires(_Tp&& __t, _Up&& __u)
+	      { std::forward<_Tp>(__t).operator<(std::forward<_Up>(__u)); }
+	  && std::__detail::__not_overloaded_spaceship<_Tp, _Up>;
   } // namespace __detail
 
   // [range.cmp] Concept-constrained comparisons
--- a/src/libstdc++-v3/include/bits/regex_compiler.h
+++ b/src/libstdc++-v3/include/bits/regex_compiler.h
@@ -188,8 +188,11 @@ namespace __detail
 	  case grep:
 	  case egrep:
 	    return __f;
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wswitch" // do not warn about non-enumerator
 	  case _FlagT(0):
 	    return __f | ECMAScript;
+#pragma GCC diagnostic pop
 	  default:
 	    std::__throw_regex_error(_S_grammar, "conflicting grammar options");
 	  }
--- a/src/libstdc++-v3/include/bits/shared_ptr_base.h
+++ b/src/libstdc++-v3/include/bits/shared_ptr_base.h
@@ -2069,7 +2069,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
 
       __shared_ptr<_Tp, _Lp>
       lock() const noexcept
-      { return __shared_ptr<element_type, _Lp>(*this, std::nothrow); }
+      { return __shared_ptr<_Tp, _Lp>(*this, std::nothrow); }
 
       long
       use_count() const noexcept
--- a/src/libstdc++-v3/include/bits/stl_function.h
+++ b/src/libstdc++-v3/include/bits/stl_function.h
@@ -59,6 +59,9 @@
 #if __cplusplus > 201103L
 #include <bits/move.h>
 #endif
+#if __cplusplus >= 202002L
+#include <concepts>
+#endif
 
 namespace std _GLIBCXX_VISIBILITY(default)
 {
@@ -525,8 +528,15 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
 	noexcept(noexcept(std::forward<_Tp>(__t) > std::forward<_Up>(__u)))
 	-> decltype(std::forward<_Tp>(__t) > std::forward<_Up>(__u))
 	{
-	  return _S_cmp(std::forward<_Tp>(__t), std::forward<_Up>(__u),
-			__ptr_cmp<_Tp, _Up>{});
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wc++17-extensions" // if constexpr
+	  if constexpr (__ptr_cmp<_Tp, _Up>)
+	    return greater<const volatile void*>{}(
+	      static_cast<const volatile void*>(std::forward<_Tp>(__t)),
+	      static_cast<const volatile void*>(std::forward<_Up>(__u)));
+	  else
+	    return std::forward<_Tp>(__t) > std::forward<_Up>(__u);
+#pragma GCC diagnostic pop
 	}
 
       template<typename _Tp, typename _Up>
@@ -537,20 +547,20 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
       typedef __is_transparent is_transparent;
 
     private:
-      template <typename _Tp, typename _Up>
-	static constexpr decltype(auto)
-	_S_cmp(_Tp&& __t, _Up&& __u, false_type)
-	{ return std::forward<_Tp>(__t) > std::forward<_Up>(__u); }
-
-      template <typename _Tp, typename _Up>
-	static constexpr bool
-	_S_cmp(_Tp&& __t, _Up&& __u, true_type) noexcept
+#if __cplusplus >= 202002L
+      template<typename _Tp, typename _Up>
+	static constexpr bool __ptr_cmp = requires
 	{
-	  return greater<const volatile void*>{}(
-	      static_cast<const volatile void*>(std::forward<_Tp>(__t)),
-	      static_cast<const volatile void*>(std::forward<_Up>(__u)));
-	}
-
+	  requires
+	       ! requires
+		{ operator>(std::declval<_Tp>(), std::declval<_Up>()); }
+	    && ! requires
+		{ std::declval<_Tp>().operator>(std::declval<_Up>()); }
+	    && __detail::__not_overloaded_spaceship<_Tp, _Up>
+	    && is_convertible_v<_Tp, const volatile void*>
+	    && is_convertible_v<_Up, const volatile void*>;
+	};
+#else
       // True if there is no viable operator> member function.
       template<typename _Tp, typename _Up, typename = void>
 	struct __not_overloaded2 : true_type { };
@@ -572,9 +582,11 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
 	: false_type { };
 
       template<typename _Tp, typename _Up>
-	using __ptr_cmp = __and_<__not_overloaded<_Tp, _Up>,
-	      is_convertible<_Tp, const volatile void*>,
-	      is_convertible<_Up, const volatile void*>>;
+	static constexpr bool __ptr_cmp = __and_<
+	  __not_overloaded<_Tp, _Up>,
+	  is_convertible<_Tp, const volatile void*>,
+	  is_convertible<_Up, const volatile void*>>::value;
+#endif
     };
 
   /// One of the @link comparison_functors comparison functors@endlink.
@@ -587,8 +599,15 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
 	noexcept(noexcept(std::forward<_Tp>(__t) < std::forward<_Up>(__u)))
 	-> decltype(std::forward<_Tp>(__t) < std::forward<_Up>(__u))
 	{
-	  return _S_cmp(std::forward<_Tp>(__t), std::forward<_Up>(__u),
-			__ptr_cmp<_Tp, _Up>{});
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wc++17-extensions" // if constexpr
+	  if constexpr (__ptr_cmp<_Tp, _Up>)
+	    return less<const volatile void*>{}(
+	      static_cast<const volatile void*>(std::forward<_Tp>(__t)),
+	      static_cast<const volatile void*>(std::forward<_Up>(__u)));
+	  else
+	    return std::forward<_Tp>(__t) < std::forward<_Up>(__u);
+#pragma GCC diagnostic pop
 	}
 
       template<typename _Tp, typename _Up>
@@ -599,20 +618,20 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
       typedef __is_transparent is_transparent;
 
     private:
-      template <typename _Tp, typename _Up>
-	static constexpr decltype(auto)
-	_S_cmp(_Tp&& __t, _Up&& __u, false_type)
-	{ return std::forward<_Tp>(__t) < std::forward<_Up>(__u); }
-
-      template <typename _Tp, typename _Up>
-	static constexpr bool
-	_S_cmp(_Tp&& __t, _Up&& __u, true_type) noexcept
+#if __cplusplus >= 202002L
+      template<typename _Tp, typename _Up>
+	static constexpr bool __ptr_cmp = requires
 	{
-	  return less<const volatile void*>{}(
-	      static_cast<const volatile void*>(std::forward<_Tp>(__t)),
-	      static_cast<const volatile void*>(std::forward<_Up>(__u)));
-	}
-
+	  requires
+	       ! requires
+		{ operator<(std::declval<_Tp>(), std::declval<_Up>()); }
+	    && ! requires
+		{ std::declval<_Tp>().operator<(std::declval<_Up>()); }
+	    && __detail::__not_overloaded_spaceship<_Tp, _Up>
+	    && is_convertible_v<_Tp, const volatile void*>
+	    && is_convertible_v<_Up, const volatile void*>;
+	};
+#else
       // True if there is no viable operator< member function.
       template<typename _Tp, typename _Up, typename = void>
 	struct __not_overloaded2 : true_type { };
@@ -634,9 +653,11 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
 	: false_type { };
 
       template<typename _Tp, typename _Up>
-	using __ptr_cmp = __and_<__not_overloaded<_Tp, _Up>,
-	      is_convertible<_Tp, const volatile void*>,
-	      is_convertible<_Up, const volatile void*>>;
+	static constexpr bool __ptr_cmp = __and_<
+	  __not_overloaded<_Tp, _Up>,
+	  is_convertible<_Tp, const volatile void*>,
+	  is_convertible<_Up, const volatile void*>>::value;
+#endif
     };
 
   /// One of the @link comparison_functors comparison functors@endlink.
@@ -649,8 +670,15 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
 	noexcept(noexcept(std::forward<_Tp>(__t) >= std::forward<_Up>(__u)))
 	-> decltype(std::forward<_Tp>(__t) >= std::forward<_Up>(__u))
 	{
-	  return _S_cmp(std::forward<_Tp>(__t), std::forward<_Up>(__u),
-			__ptr_cmp<_Tp, _Up>{});
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wc++17-extensions" // if constexpr
+	  if constexpr (__ptr_cmp<_Tp, _Up>)
+	    return greater_equal<const volatile void*>{}(
+	      static_cast<const volatile void*>(std::forward<_Tp>(__t)),
+	      static_cast<const volatile void*>(std::forward<_Up>(__u)));
+	  else
+	    return std::forward<_Tp>(__t) >= std::forward<_Up>(__u);
+#pragma GCC diagnostic pop
 	}
 
       template<typename _Tp, typename _Up>
@@ -661,20 +689,20 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
       typedef __is_transparent is_transparent;
 
     private:
-      template <typename _Tp, typename _Up>
-	static constexpr decltype(auto)
-	_S_cmp(_Tp&& __t, _Up&& __u, false_type)
-	{ return std::forward<_Tp>(__t) >= std::forward<_Up>(__u); }
-
-      template <typename _Tp, typename _Up>
-	static constexpr bool
-	_S_cmp(_Tp&& __t, _Up&& __u, true_type) noexcept
+#if __cplusplus >= 202002L
+      template<typename _Tp, typename _Up>
+	static constexpr bool __ptr_cmp = requires
 	{
-	  return greater_equal<const volatile void*>{}(
-	      static_cast<const volatile void*>(std::forward<_Tp>(__t)),
-	      static_cast<const volatile void*>(std::forward<_Up>(__u)));
-	}
-
+	  requires
+	       ! requires
+		{ operator>=(std::declval<_Tp>(), std::declval<_Up>()); }
+	    && ! requires
+		{ std::declval<_Tp>().operator>=(std::declval<_Up>()); }
+	    && __detail::__not_overloaded_spaceship<_Tp, _Up>
+	    && is_convertible_v<_Tp, const volatile void*>
+	    && is_convertible_v<_Up, const volatile void*>;
+	};
+#else
       // True if there is no viable operator>= member function.
       template<typename _Tp, typename _Up, typename = void>
 	struct __not_overloaded2 : true_type { };
@@ -696,9 +724,11 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
 	: false_type { };
 
       template<typename _Tp, typename _Up>
-	using __ptr_cmp = __and_<__not_overloaded<_Tp, _Up>,
-	      is_convertible<_Tp, const volatile void*>,
-	      is_convertible<_Up, const volatile void*>>;
+	static constexpr bool __ptr_cmp = __and_<
+	  __not_overloaded<_Tp, _Up>,
+	  is_convertible<_Tp, const volatile void*>,
+	  is_convertible<_Up, const volatile void*>>::value;
+#endif
     };
 
   /// One of the @link comparison_functors comparison functors@endlink.
@@ -711,8 +741,15 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
 	noexcept(noexcept(std::forward<_Tp>(__t) <= std::forward<_Up>(__u)))
 	-> decltype(std::forward<_Tp>(__t) <= std::forward<_Up>(__u))
 	{
-	  return _S_cmp(std::forward<_Tp>(__t), std::forward<_Up>(__u),
-			__ptr_cmp<_Tp, _Up>{});
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wc++17-extensions" // if constexpr
+	  if constexpr (__ptr_cmp<_Tp, _Up>)
+	    return less_equal<const volatile void*>{}(
+	      static_cast<const volatile void*>(std::forward<_Tp>(__t)),
+	      static_cast<const volatile void*>(std::forward<_Up>(__u)));
+	  else
+	    return std::forward<_Tp>(__t) <= std::forward<_Up>(__u);
+#pragma GCC diagnostic pop
 	}
 
       template<typename _Tp, typename _Up>
@@ -723,20 +760,20 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
       typedef __is_transparent is_transparent;
 
     private:
-      template <typename _Tp, typename _Up>
-	static constexpr decltype(auto)
-	_S_cmp(_Tp&& __t, _Up&& __u, false_type)
-	{ return std::forward<_Tp>(__t) <= std::forward<_Up>(__u); }
-
-      template <typename _Tp, typename _Up>
-	static constexpr bool
-	_S_cmp(_Tp&& __t, _Up&& __u, true_type) noexcept
+#if __cplusplus >= 202002L
+      template<typename _Tp, typename _Up>
+	static constexpr bool __ptr_cmp = requires
 	{
-	  return less_equal<const volatile void*>{}(
-	      static_cast<const volatile void*>(std::forward<_Tp>(__t)),
-	      static_cast<const volatile void*>(std::forward<_Up>(__u)));
-	}
-
+	  requires
+	       ! requires
+		{ operator<=(std::declval<_Tp>(), std::declval<_Up>()); }
+	    && ! requires
+		{ std::declval<_Tp>().operator<=(std::declval<_Up>()); }
+	    && __detail::__not_overloaded_spaceship<_Tp, _Up>
+	    && is_convertible_v<_Tp, const volatile void*>
+	    && is_convertible_v<_Up, const volatile void*>;
+	};
+#else
       // True if there is no viable operator<= member function.
       template<typename _Tp, typename _Up, typename = void>
 	struct __not_overloaded2 : true_type { };
@@ -758,9 +795,11 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
 	: false_type { };
 
       template<typename _Tp, typename _Up>
-	using __ptr_cmp = __and_<__not_overloaded<_Tp, _Up>,
-	      is_convertible<_Tp, const volatile void*>,
-	      is_convertible<_Up, const volatile void*>>;
+	static constexpr bool __ptr_cmp = __and_<
+	  __not_overloaded<_Tp, _Up>,
+	  is_convertible<_Tp, const volatile void*>,
+	  is_convertible<_Up, const volatile void*>>::value;
+#endif
     };
 #endif // __glibcxx_transparent_operators
   /** @}  */
--- a/src/libstdc++-v3/include/bits/stl_pair.h
+++ b/src/libstdc++-v3/include/bits/stl_pair.h
@@ -425,7 +425,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
 
       /// Constructor accepting lvalues of `first_type` and `second_type`
       constexpr explicit(!_S_convertible<const _T1&, const _T2&>())
-      pair(const _T1& __x, const _T2& __y)
+      pair(const type_identity_t<_T1>& __x, const _T2& __y)
       noexcept(_S_nothrow_constructible<const _T1&, const _T2&>())
       requires (_S_constructible<const _T1&, const _T2&>())
       : first(__x), second(__y)
@@ -1286,12 +1286,12 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
   template <typename _Tp, typename _Up>
     constexpr _Tp&&
     get(pair<_Tp, _Up>&& __p) noexcept
-    { return std::move(__p.first); }
+    { return std::forward<_Tp>(__p.first); }
 
   template <typename _Tp, typename _Up>
     constexpr const _Tp&&
     get(const pair<_Tp, _Up>&& __p) noexcept
-    { return std::move(__p.first); }
+    { return std::forward<const _Tp>(__p.first); }
 
   template <typename _Tp, typename _Up>
     constexpr _Tp&
@@ -1306,12 +1306,12 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
   template <typename _Tp, typename _Up>
     constexpr _Tp&&
     get(pair<_Up, _Tp>&& __p) noexcept
-    { return std::move(__p.second); }
+    { return std::forward<_Tp>(__p.second); }
 
   template <typename _Tp, typename _Up>
     constexpr const _Tp&&
     get(const pair<_Up, _Tp>&& __p) noexcept
-    { return std::move(__p.second); }
+    { return std::forward<const _Tp>(__p.second); }
 #endif // __glibcxx_tuples_by_type
 
 
--- a/src/libstdc++-v3/include/bits/stl_vector.h
+++ b/src/libstdc++-v3/include/bits/stl_vector.h
@@ -1047,7 +1047,7 @@ _GLIBCXX_BEGIN_NAMESPACE_CONTAINER
       resize(size_type __new_size, const value_type& __x)
       {
 	if (__new_size > size())
-	  _M_fill_insert(end(), __new_size - size(), __x);
+	  _M_fill_append(__new_size - size(), __x);
 	else if (__new_size < size())
 	  _M_erase_at_end(this->_M_impl._M_start + __new_size);
       }
@@ -1068,7 +1068,7 @@ _GLIBCXX_BEGIN_NAMESPACE_CONTAINER
       resize(size_type __new_size, value_type __x = value_type())
       {
 	if (__new_size > size())
-	  _M_fill_insert(end(), __new_size - size(), __x);
+	  _M_fill_append(__new_size - size(), __x);
 	else if (__new_size < size())
 	  _M_erase_at_end(this->_M_impl._M_start + __new_size);
       }
@@ -1828,6 +1828,11 @@ _GLIBCXX_BEGIN_NAMESPACE_CONTAINER
       void
       _M_fill_insert(iterator __pos, size_type __n, const value_type& __x);
 
+      // Called by resize(n,x), and the _M_fill_insert(end(), n, x)
+      _GLIBCXX20_CONSTEXPR
+      void
+      _M_fill_append(size_type __n, const value_type& __x);
+
 #if __cplusplus >= 201103L
       // Called by resize(n).
       _GLIBCXX20_CONSTEXPR
--- a/src/libstdc++-v3/include/bits/unique_ptr.h
+++ b/src/libstdc++-v3/include/bits/unique_ptr.h
@@ -1,4 +1,3 @@
-
 // unique_ptr implementation -*- C++ -*-
 
 // Copyright (C) 2008-2024 Free Software Foundation, Inc.
--- a/src/libstdc++-v3/include/bits/vector.tcc
+++ b/src/libstdc++-v3/include/bits/vector.tcc
@@ -702,8 +702,10 @@ _GLIBCXX_BEGIN_NAMESPACE_CONTAINER
     {
       if (__n != 0)
 	{
-	  if (size_type(this->_M_impl._M_end_of_storage
-			- this->_M_impl._M_finish) >= __n)
+	  if (__position.base() == this->_M_impl._M_finish)
+	    _M_fill_append(__n, __x);
+	  else if (size_type(this->_M_impl._M_end_of_storage
+			       - this->_M_impl._M_finish) >= __n)
 	    {
 #if __cplusplus < 201103L
 	      value_type __x_copy = __x;
@@ -798,6 +800,60 @@ _GLIBCXX_BEGIN_NAMESPACE_CONTAINER
 	}
     }
 
+  template<typename _Tp, typename _Alloc>
+    _GLIBCXX20_CONSTEXPR
+    void
+    vector<_Tp, _Alloc>::
+    _M_fill_append(size_type __n, const value_type& __x)
+    {
+       if (size_type(this->_M_impl._M_end_of_storage
+		     - this->_M_impl._M_finish) >= __n)
+	 {
+	   _GLIBCXX_ASAN_ANNOTATE_GROW(__n);
+	   this->_M_impl._M_finish =
+	     std::__uninitialized_fill_n_a(this->_M_impl._M_finish, __n, __x,
+					   _M_get_Tp_allocator());
+	   _GLIBCXX_ASAN_ANNOTATE_GREW(__n);
+	 }
+       else
+	 {
+	   // Make local copies of these members because the compiler thinks
+	   // the allocator can alter them if 'this' is globally reachable.
+	   pointer __old_start = this->_M_impl._M_start;
+	   pointer __old_finish = this->_M_impl._M_finish;
+	   const size_type __old_size = __old_finish - __old_start;
+
+	   const size_type __len =
+	     _M_check_len(__n, "vector::_M_fill_append");
+	   pointer __new_start(this->_M_allocate(__len));
+	   pointer __new_finish(__new_start + __old_size);
+	   __try
+	     {
+	       // See _M_realloc_insert above.
+	       __new_finish = std::__uninitialized_fill_n_a(
+				__new_finish, __n, __x,
+				_M_get_Tp_allocator());
+	       std::__uninitialized_move_if_noexcept_a(
+		 __old_start, __old_finish, __new_start,
+		 _M_get_Tp_allocator());
+	     }
+	   __catch(...)
+	     {
+		std::_Destroy(__new_start + __old_size, __new_finish,
+			      _M_get_Tp_allocator());
+		_M_deallocate(__new_start, __len);
+		__throw_exception_again;
+	      }
+	   std::_Destroy(__old_start, __old_finish, _M_get_Tp_allocator());
+	   _GLIBCXX_ASAN_ANNOTATE_REINIT;
+	   _M_deallocate(__old_start,
+			 this->_M_impl._M_end_of_storage - __old_start);
+	   this->_M_impl._M_start = __new_start;
+	   this->_M_impl._M_finish = __new_finish;
+	   this->_M_impl._M_end_of_storage = __new_start + __len;
+	 }
+    }
+
 #if __cplusplus >= 201103L
   template<typename _Tp, typename _Alloc>
     _GLIBCXX20_CONSTEXPR
new file mode 100644
--- /dev/null
+++ b/src/libstdc++-v3/include/c_compatibility/stdbit.h
@@ -0,0 +1,582 @@
+// C compatibility header <stdbit.h> -*- C++ -*-
+
+// Copyright The GNU Toolchain Authors.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// Under Section 7 of GPL version 3, you are granted additional
+// permissions described in the GCC Runtime Library Exception, version
+// 3.1, as published by the Free Software Foundation.
+
+// You should have received a copy of the GNU General Public License and
+// a copy of the GCC Runtime Library Exception along with this program;
+// see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+// <http://www.gnu.org/licenses/>.
+
+/** @file include/stdbit.h
+ *  This is a Standard C++ Library header.
+ */
+
+#ifndef _GLIBCXX_STDBIT_H
+#define _GLIBCXX_STDBIT_H
+
+#if __cplusplus > 202302L
+#include <bit>
+
+#define __STDC_VERSION_STDBIT_H__ 202311L
+
+#define __STDC_ENDIAN_BIG__     __ORDER_BIG_ENDIAN__
+#define __STDC_ENDIAN_LITTLE__  __ORDER_LITTLE_ENDIAN__
+#define __STDC_ENDIAN_NATIVE__  __BYTE_ORDER__
+
+#ifndef _GLIBCXX_DOXYGEN
+// We define these in our own namespace, but let Doxygen think otherwise.
+namespace __gnu_cxx _GLIBCXX_VISIBILITY(default)
+{
+#endif
+
+/** Count the number of leading zero bits
+ *
+ * @param  __value An unsigned integer.
+ * @since C++26
+ * @{
+ */
+template<typename _Tp>
+inline unsigned int
+stdc_leading_zeros(_Tp __value)
+{
+  static_assert(std::__unsigned_integer<_Tp>);
+  return std::countl_zero(__value);
+}
+
+inline unsigned int
+stdc_leading_zeros_uc(unsigned char __value)
+{ return stdc_leading_zeros(__value); }
+
+inline unsigned int
+stdc_leading_zeros_us(unsigned short __value)
+{ return stdc_leading_zeros(__value); }
+
+inline unsigned int
+stdc_leading_zeros_ui(unsigned int __value)
+{ return stdc_leading_zeros(__value); }
+
+inline unsigned int
+stdc_leading_zeros_ul(unsigned long int __value)
+{ return stdc_leading_zeros(__value); }
+
+inline unsigned int
+stdc_leading_zeros_ull(unsigned long long int __value)
+{ return stdc_leading_zeros(__value); }
+/// @}
+
+/** Count the number of leading one bits
+ *
+ * @param  __value An unsigned integer.
+ * @since C++26
+ * @{
+ */
+template<typename _Tp>
+inline unsigned int
+stdc_leading_ones(_Tp __value)
+{
+  static_assert(std::__unsigned_integer<_Tp>);
+  return std::countl_one(__value);
+}
+
+inline unsigned int
+stdc_leading_ones_uc(unsigned char __value)
+{ return stdc_leading_ones(__value); }
+
+inline unsigned int
+stdc_leading_ones_us(unsigned short __value)
+{ return stdc_leading_ones(__value); }
+
+inline unsigned int
+stdc_leading_ones_ui(unsigned int __value)
+{ return stdc_leading_ones(__value); }
+
+inline unsigned int
+stdc_leading_ones_ul(unsigned long int __value)
+{ return stdc_leading_ones(__value); }
+
+inline unsigned int
+stdc_leading_ones_ull(unsigned long long int __value)
+{ return stdc_leading_ones(__value); }
+/// @}
+
+/** Count the number of trailing zero bits
+ *
+ * @param  __value An unsigned integer.
+ * @since C++26
+ * @{
+ */
+template<typename _Tp>
+inline unsigned int
+stdc_trailing_zeros(_Tp __value)
+{
+  static_assert(std::__unsigned_integer<_Tp>);
+  return std::countr_zero(__value);
+}
+
+inline unsigned int
+stdc_trailing_zeros_uc(unsigned char __value)
+{ return stdc_trailing_zeros(__value); }
+
+inline unsigned int
+stdc_trailing_zeros_us(unsigned short __value)
+{ return stdc_trailing_zeros(__value); }
+
+inline unsigned int
+stdc_trailing_zeros_ui(unsigned int __value)
+{ return stdc_trailing_zeros(__value); }
+
+inline unsigned int
+stdc_trailing_zeros_ul(unsigned long int __value)
+{ return stdc_trailing_zeros(__value); }
+
+inline unsigned int
+stdc_trailing_zeros_ull(unsigned long long int __value)
+{ return stdc_trailing_zeros(__value); }
+/// @}
+
+/** Count the number of trailing one bits
+ *
+ * @param  __value An unsigned integer.
+ * @since C++26
+ * @{
+ */
+template<typename _Tp>
+inline unsigned int
+stdc_trailing_ones(_Tp __value)
+{
+  static_assert(std::__unsigned_integer<_Tp>);
+  return std::countr_one(__value);
+}
+
+inline unsigned int
+stdc_trailing_ones_uc(unsigned char __value)
+{ return stdc_trailing_ones(__value); }
+
+inline unsigned int
+stdc_trailing_ones_us(unsigned short __value)
+{ return stdc_trailing_ones(__value); }
+
+inline unsigned int
+stdc_trailing_ones_ui(unsigned int __value)
+{ return stdc_trailing_ones(__value); }
+
+inline unsigned int
+stdc_trailing_ones_ul(unsigned long int __value)
+{ return stdc_trailing_ones(__value); }
+
+inline unsigned int
+stdc_trailing_ones_ull(unsigned long long int __value)
+{ return stdc_trailing_ones(__value); }
+/// @}
+
+/** Find the leftmost (i.e. most significant) zero bit
+ *
+ * @param  __value An unsigned integer.
+ * @return The one-based index of the first zero bit counting from the left,
+ *         or zero if there are no zero bits.
+ * @since C++26
+ * @{
+ */
+template<typename _Tp>
+inline unsigned int
+stdc_first_leading_zero(_Tp __value)
+{
+  static_assert(std::__unsigned_integer<_Tp>);
+  return __value == _Tp(-1) ? 0 : 1 + std::countl_one(__value);
+}
+
+inline unsigned int
+stdc_first_leading_zero_uc(unsigned char __value)
+{ return stdc_first_leading_zero(__value); }
+
+inline unsigned int
+stdc_first_leading_zero_us(unsigned short __value)
+{ return stdc_first_leading_zero(__value); }
+
+inline unsigned int
+stdc_first_leading_zero_ui(unsigned int __value)
+{ return stdc_first_leading_zero(__value); }
+
+inline unsigned int
+stdc_first_leading_zero_ul(unsigned long int __value)
+{ return stdc_first_leading_zero(__value); }
+
+inline unsigned int
+stdc_first_leading_zero_ull(unsigned long long int __value)
+{ return stdc_first_leading_zero(__value); }
+/// @}
+
+/** Find the leftmost (i.e. most significant) one bit
+ *
+ * @param  __value An unsigned integer.
+ * @return The one-based index of the first one bit counting from the left,
+ *         or zero if there are no one bits.
+ * @since C++26
+ * @{
+ */
+template<typename _Tp>
+inline unsigned int
+stdc_first_leading_one(_Tp __value)
+{
+  static_assert(std::__unsigned_integer<_Tp>);
+  return __value == 0 ? 0 : 1 + std::countl_zero(__value);
+}
+
+inline unsigned int
+stdc_first_leading_one_uc(unsigned char __value)
+{ return stdc_first_leading_one(__value); }
+
+inline unsigned int
+stdc_first_leading_one_us(unsigned short __value)
+{ return stdc_first_leading_one(__value); }
+
+inline unsigned int
+stdc_first_leading_one_ui(unsigned int __value)
+{ return stdc_first_leading_one(__value); }
+
+inline unsigned int
+stdc_first_leading_one_ul(unsigned long int __value)
+{ return stdc_first_leading_one(__value); }
+
+inline unsigned int
+stdc_first_leading_one_ull(unsigned long long int __value)
+{ return stdc_first_leading_one(__value); }
+/// @}
+
+/** Find the rightmost (i.e. least significant) zero bit
+ *
+ * @param  __value An unsigned integer.
+ * @return The one-based index of the first zero bit counting from the right,
+ *         or zero if there are no zero bits.
+ * @since C++26
+ * @{
+ */
+template<typename _Tp>
+inline unsigned int
+stdc_first_trailing_zero(_Tp __value)
+{
+  static_assert(std::__unsigned_integer<_Tp>);
+  return __value == _Tp(-1) ? 0 : 1 + std::countr_one(__value);
+}
+
+inline unsigned int
+stdc_first_trailing_zero_uc(unsigned char __value)
+{ return stdc_first_trailing_zero(__value); }
+
+inline unsigned int
+stdc_first_trailing_zero_us(unsigned short __value)
+{ return stdc_first_trailing_zero(__value); }
+
+inline unsigned int
+stdc_first_trailing_zero_ui(unsigned int __value)
+{ return stdc_first_trailing_zero(__value); }
+
+inline unsigned int
+stdc_first_trailing_zero_ul(unsigned long int __value)
+{ return stdc_first_trailing_zero(__value); }
+
+inline unsigned int
+stdc_first_trailing_zero_ull(unsigned long long int __value)
+{ return stdc_first_trailing_zero(__value); }
+/// @}
+
+/** Find the rightmost (i.e. least significant) one bit
+ *
+ * @param  __value An unsigned integer.
+ * @return The one-based index of the first one bit counting from the right,
+ *         or zero if there are no one bits.
+ * @since C++26
+ * @{
+ */
+template<typename _Tp>
+inline unsigned int
+stdc_first_trailing_one(_Tp __value)
+{
+  static_assert(std::__unsigned_integer<_Tp>);
+  return __value == 0 ? 0 : 1 + std::countr_zero(__value);
+}
+
+inline unsigned int
+stdc_first_trailing_one_uc(unsigned char __value)
+{ return stdc_first_trailing_one(__value); }
+
+inline unsigned int
+stdc_first_trailing_one_us(unsigned short __value)
+{ return stdc_first_trailing_one(__value); }
+
+inline unsigned int
+stdc_first_trailing_one_ui(unsigned int __value)
+{ return stdc_first_trailing_one(__value); }
+
+inline unsigned int
+stdc_first_trailing_one_ul(unsigned long int __value)
+{ return stdc_first_trailing_one(__value); }
+
+inline unsigned int
+stdc_first_trailing_one_ull(unsigned long long int __value)
+{ return stdc_first_trailing_one(__value); }
+/// @}
+
+/** Count zeros
+ *
+ * @param  __value An unsigned integer.
+ * @return The total number of zero bits in `__value`.
+ * @since C++26
+ * @{
+ */
+template<typename _Tp>
+inline unsigned int
+stdc_count_zeros(_Tp __value)
+{
+  static_assert(std::__unsigned_integer<_Tp>);
+  return std::popcount(_Tp(~__value));
+}
+
+inline unsigned int
+stdc_count_zeros_uc(unsigned char __value)
+{ return stdc_count_zeros(__value); }
+
+inline unsigned int
+stdc_count_zeros_us(unsigned short __value)
+{ return stdc_count_zeros(__value); }
+
+inline unsigned int
+stdc_count_zeros_ui(unsigned int __value)
+{ return stdc_count_zeros(__value); }
+
+inline unsigned int
+stdc_count_zeros_ul(unsigned long int __value)
+{ return stdc_count_zeros(__value); }
+
+inline unsigned int
+stdc_count_zeros_ull(unsigned long long int __value)
+{ return stdc_count_zeros(__value); }
+/// @}
+
+/** Count ones
+ *
+ * @param  __value An unsigned integer.
+ * @return The total number of one bits in `__value`.
+ * @since C++26
+ * @{
+ */
+template<typename _Tp>
+inline unsigned int
+stdc_count_ones(_Tp __value)
+{
+  static_assert(std::__unsigned_integer<_Tp>);
+  return std::popcount(__value);
+}
+
+inline unsigned int
+stdc_count_ones_uc(unsigned char __value)
+{ return stdc_count_ones(__value); }
+
+inline unsigned int
+stdc_count_ones_us(unsigned short __value)
+{ return stdc_count_ones(__value); }
+
+inline unsigned int
+stdc_count_ones_ui(unsigned int __value)
+{ return stdc_count_ones(__value); }
+
+inline unsigned int
+stdc_count_ones_ul(unsigned long int __value)
+{ return stdc_count_ones(__value); }
+
+inline unsigned int
+stdc_count_ones_ull(unsigned long long int __value)
+{ return stdc_count_ones(__value); }
+/// @}
+
+/** Power of two check
+ *
+ * @param  __value An unsigned integer.
+ * @return True if the value has a single bit set, false otherwise.
+ * @since C++26
+ * @{
+ */
+template<typename _Tp>
+inline bool
+stdc_has_single_bit(_Tp __value)
+{
+  static_assert(std::__unsigned_integer<_Tp>);
+  return std::has_single_bit(__value);
+}
+
+inline bool
+stdc_has_single_bit_uc(unsigned char __value)
+{ return stdc_has_single_bit(__value); }
+
+inline bool
+stdc_has_single_bit_us(unsigned short __value)
+{ return stdc_has_single_bit(__value); }
+
+inline bool
+stdc_has_single_bit_ui(unsigned int __value)
+{ return stdc_has_single_bit(__value); }
+
+inline bool
+stdc_has_single_bit_ul(unsigned long int __value)
+{ return stdc_has_single_bit(__value); }
+
+inline bool
+stdc_has_single_bit_ull(unsigned long long int __value)
+{ return stdc_has_single_bit(__value); }
+/// @}
+
+/** Bit width
+ *
+ * @param  __value An unsigned integer.
+ * @return The minimum number of bits needed to represent `__value`.
+ * @since C++26
+ * @{
+ */
+template<typename _Tp>
+inline unsigned int
+stdc_bit_width(_Tp __value)
+{
+  static_assert(std::__unsigned_integer<_Tp>);
+  return std::bit_width(__value);
+}
+
+inline unsigned int
+stdc_bit_width_uc(unsigned char __value)
+{ return stdc_bit_width(__value); }
+
+inline unsigned int
+stdc_bit_width_us(unsigned short __value)
+{ return stdc_bit_width(__value); }
+
+inline unsigned int
+stdc_bit_width_ui(unsigned int __value)
+{ return stdc_bit_width(__value); }
+
+inline unsigned int
+stdc_bit_width_ul(unsigned long int __value)
+{ return stdc_bit_width(__value); }
+
+inline unsigned int
+stdc_bit_width_ull(unsigned long long int __value)
+{ return stdc_bit_width(__value); }
+/// @}
+
+/** Bit floor
+ *
+ * @param  __value An unsigned integer.
+ * @return The largest power of two that is not greater than `__value`.
+ * @since C++26
+ * @{
+ */
+template<typename _Tp>
+inline _Tp
+stdc_bit_floor(_Tp __value)
+{
+  static_assert(std::__unsigned_integer<_Tp>);
+  return std::bit_floor(__value);
+}
+
+inline unsigned char
+stdc_bit_floor_uc(unsigned char __value)
+{ return stdc_bit_floor(__value); }
+
+inline unsigned short
+stdc_bit_floor_us(unsigned short __value)
+{ return stdc_bit_floor(__value); }
+
+inline unsigned int
+stdc_bit_floor_ui(unsigned int __value)
+{ return stdc_bit_floor(__value); }
+
+inline unsigned long int
+stdc_bit_floor_ul(unsigned long int __value)
+{ return stdc_bit_floor(__value); }
+
+inline unsigned long long int
+stdc_bit_floor_ull(unsigned long long int __value)
+{ return stdc_bit_floor(__value); }
+/// @}
+
+/** Bit ceiling
+ *
+ * Unlike `std::bit_ceil`, this is defined to return zero for values which
+ * are not representable in the return type.
+ *
+ * @param  __value An unsigned integer.
+ * @return The smallest power of two that is not less than `__value`.
+ * @since C++26
+ * @{
+ */
+template<typename _Tp>
+inline _Tp
+stdc_bit_ceil(_Tp __value)
+{
+  static_assert(std::__unsigned_integer<_Tp>);
+  constexpr _Tp __msb = _Tp(1) << (__gnu_cxx::__int_traits<_Tp>::__digits - 1);
+  return (__value & __msb) ? 0 : std::bit_ceil(__value);
+}
+
+inline unsigned char
+stdc_bit_ceil_uc(unsigned char __value)
+{ return stdc_bit_ceil(__value); }
+
+inline unsigned short
+stdc_bit_ceil_us(unsigned short __value)
+{ return stdc_bit_ceil(__value); }
+
+inline unsigned int
+stdc_bit_ceil_ui(unsigned int __value)
+{ return stdc_bit_ceil(__value); }
+
+inline unsigned long int
+stdc_bit_ceil_ul(unsigned long int __value)
+{ return stdc_bit_ceil(__value); }
+
+inline unsigned long long int
+stdc_bit_ceil_ull(unsigned long long int __value)
+{ return stdc_bit_ceil(__value); }
+/// @}
+
+#ifndef _GLIBCXX_DOXYGEN
+} // namespace __gnu_cxx
+#define _GLIBCXX_STDBIT_FUNC(F) \
+  using __gnu_cxx::F ## _uc; \
+  using __gnu_cxx::F ## _us; \
+  using __gnu_cxx::F ## _ui; \
+  using __gnu_cxx::F ## _ul; \
+  using __gnu_cxx::F ## _ull; \
+  using __gnu_cxx::F
+_GLIBCXX_STDBIT_FUNC(stdc_leading_zeros);
+_GLIBCXX_STDBIT_FUNC(stdc_leading_ones);
+_GLIBCXX_STDBIT_FUNC(stdc_trailing_zeros);
+_GLIBCXX_STDBIT_FUNC(stdc_trailing_ones);
+_GLIBCXX_STDBIT_FUNC(stdc_first_leading_zero);
+_GLIBCXX_STDBIT_FUNC(stdc_first_leading_one);
+_GLIBCXX_STDBIT_FUNC(stdc_first_trailing_zero);
+_GLIBCXX_STDBIT_FUNC(stdc_first_trailing_one);
+_GLIBCXX_STDBIT_FUNC(stdc_count_zeros);
+_GLIBCXX_STDBIT_FUNC(stdc_count_ones);
+_GLIBCXX_STDBIT_FUNC(stdc_has_single_bit);
+_GLIBCXX_STDBIT_FUNC(stdc_bit_width);
+_GLIBCXX_STDBIT_FUNC(stdc_bit_floor);
+_GLIBCXX_STDBIT_FUNC(stdc_bit_ceil);
+#undef _GLIBCXX_STDBIT_FUNC
+#endif // !DOXYGEN
+#endif // C++26
+
+#endif // _GLIBCXX_STDBIT_H
new file mode 100644
--- /dev/null
+++ b/src/libstdc++-v3/include/c_compatibility/stdckdint.h
@@ -0,0 +1,113 @@
+// C compatibility header <stdckdint.h> -*- C++ -*-
+
+// Copyright The GNU Toolchain Authors.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// Under Section 7 of GPL version 3, you are granted additional
+// permissions described in the GCC Runtime Library Exception, version
+// 3.1, as published by the Free Software Foundation.
+
+// You should have received a copy of the GNU General Public License and
+// a copy of the GCC Runtime Library Exception along with this program;
+// see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+// <http://www.gnu.org/licenses/>.
+
+/** @file include/stdckdint.h
+ *  This is a Standard C++ Library header.
+ */
+
+#ifndef _GLIBCXX_STDCKDINT_H
+#define _GLIBCXX_STDCKDINT_H
+
+#if __cplusplus > 202302L
+#include <type_traits>
+#include <concepts>
+
+#define __STDC_VERSION_STDCKDINT_H__ 202311L
+
+#ifndef _GLIBCXX_DOXYGEN
+// We define these in our own namespace, but let Doxygen think otherwise.
+namespace __gnu_cxx _GLIBCXX_VISIBILITY(default)
+{
+#endif
+/// @cond undocumented
+namespace __detail
+{
+  template<typename _Tp>
+    concept __cv_unqual_signed_or_unsigned_integer_type
+      = std::same_as<_Tp, std::remove_cv_t<_Tp>>
+	  && std::__is_standard_integer<_Tp>::value;
+}
+/// @endcond
+
+/** Checked integer arithmetic
+ *
+ * Performs arithmetic on `__a` and `__b` and stores the result in `*__result`,
+ * with overflow detection.
+ * The arithmetic is performed in infinite signed precision, without overflow,
+ * then converted to the result type, `_Tp1`. If the converted result is not
+ * equal to the infinite precision result, the stored result is wrapped to the
+ * width of `_Tp1` and `true` is returned. Otherwise, the stored result is
+ * correct and `false` is returned.
+ *
+ * @param __result A pointer to a signed or unsigned integer type.
+ * @param __a      A signed or unsigned integer type.
+ * @param __b      A signed or unsigned integer type.
+ * @return True if overflow occurred, false otherwise.
+ * @since C++26
+ * @{
+ */
+template<typename _Tp1, typename _Tp2, typename _Tp3>
+  inline bool
+  ckd_add(_Tp1* __result, _Tp2 __a, _Tp3 __b)
+  {
+    using __gnu_cxx::__detail::__cv_unqual_signed_or_unsigned_integer_type;
+    static_assert(__cv_unqual_signed_or_unsigned_integer_type<_Tp1>);
+    static_assert(__cv_unqual_signed_or_unsigned_integer_type<_Tp2>);
+    static_assert(__cv_unqual_signed_or_unsigned_integer_type<_Tp3>);
+    return __builtin_add_overflow(__a, __b, __result);
+  }
+
+template<typename _Tp1, typename _Tp2, typename _Tp3>
+  inline bool
+  ckd_sub(_Tp1* __result, _Tp2 __a, _Tp3 __b)
+  {
+    using __gnu_cxx::__detail::__cv_unqual_signed_or_unsigned_integer_type;
+    static_assert(__cv_unqual_signed_or_unsigned_integer_type<_Tp1>);
+    static_assert(__cv_unqual_signed_or_unsigned_integer_type<_Tp2>);
+    static_assert(__cv_unqual_signed_or_unsigned_integer_type<_Tp3>);
+    return __builtin_sub_overflow(__a, __b, __result);
+  }
+
+template<typename _Tp1, typename _Tp2, typename _Tp3>
+  inline bool
+  ckd_mul(_Tp1* __result, _Tp2 __a, _Tp3 __b)
+  {
+    using __gnu_cxx::__detail::__cv_unqual_signed_or_unsigned_integer_type;
+    static_assert(__cv_unqual_signed_or_unsigned_integer_type<_Tp1>);
+    static_assert(__cv_unqual_signed_or_unsigned_integer_type<_Tp2>);
+    static_assert(__cv_unqual_signed_or_unsigned_integer_type<_Tp3>);
+    return __builtin_mul_overflow(__a, __b, __result);
+  }
+/// @}
+#ifndef _GLIBCXX_DOXYGEN
+}
+
+using __gnu_cxx::ckd_add;
+using __gnu_cxx::ckd_sub;
+using __gnu_cxx::ckd_mul;
+#endif
+
+#endif // C++26
+
+#endif // _GLIBCXX_STDCKDINT_H
--- a/src/libstdc++-v3/include/c_global/cmath
+++ b/src/libstdc++-v3/include/c_global/cmath
@@ -3785,10 +3785,10 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
   { return std::__hypot3<long double>(__x, __y, __z); }
 
   template<typename _Tp, typename _Up, typename _Vp>
-    __gnu_cxx::__promoted_t<_Tp, _Up, _Vp>
+    typename __gnu_cxx::__promote_3<_Tp, _Up, _Vp>::__type
     hypot(_Tp __x, _Up __y, _Vp __z)
     {
-      using __type = __gnu_cxx::__promoted_t<_Tp, _Up, _Vp>;
+      using __type = typename __gnu_cxx::__promote_3<_Tp, _Up, _Vp>::__type;
       return std::__hypot3<__type>(__x, __y, __z);
     }
 
--- a/src/libstdc++-v3/include/ext/pointer.h
+++ b/src/libstdc++-v3/include/ext/pointer.h
@@ -38,6 +38,7 @@
 
 #pragma GCC system_header
 
+#include <bits/c++config.h>
 #if _GLIBCXX_HOSTED
 #  include <iosfwd>
 #endif
--- a/src/libstdc++-v3/include/precompiled/extc++.h
+++ b/src/libstdc++-v3/include/precompiled/extc++.h
@@ -37,7 +37,6 @@
 #endif
 #include <ext/alloc_traits.h>
 #include <ext/atomicity.h>
-#include <ext/cast.h>
 #include <ext/iterator>
 #include <ext/numeric_traits.h>
 #include <ext/pointer.h>
--- a/src/libstdc++-v3/include/pstl/parallel_backend_tbb.h
+++ b/src/libstdc++-v3/include/pstl/parallel_backend_tbb.h
@@ -521,7 +521,7 @@ class __root_task
     friend class __func_task<_Func>;
 };
 
-#else  // TBB_INTERFACE_VERSION <= 12000
+#else  // TBB_INTERFACE_VERSION > 12000
 class __task : public tbb::detail::d1::task
 {
   protected:
@@ -656,10 +656,16 @@ class __func_task : public __task
 
         _PSTL_ASSERT(__parent != nullptr);
         _PSTL_ASSERT(__parent->_M_refcount.load(std::memory_order_relaxed) > 0);
-        if (--__parent->_M_refcount == 0)
+
+        auto __refcount = --__parent->_M_refcount;
+
+        // Placing the deallocation after the refcount decrement allows another thread to proceed with tree
+        // folding concurrently with this task cleanup.
+        __alloc.deallocate(this, *__ed);
+
+        if (__refcount == 0)
         {
             _PSTL_ASSERT(__next == nullptr);
-            __alloc.deallocate(this, *__ed);
             return __parent;
         }
 
--- a/src/libstdc++-v3/include/std/any
+++ b/src/libstdc++-v3/include/std/any
@@ -42,6 +42,9 @@
 #include <type_traits>
 #include <bits/utility.h> // in_place_type_t
 
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wdeprecated-declarations" // aligned_storage
+
 namespace std _GLIBCXX_VISIBILITY(default)
 {
 _GLIBCXX_BEGIN_NAMESPACE_VERSION
@@ -661,5 +664,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
 _GLIBCXX_END_NAMESPACE_VERSION
 } // namespace std
 
+#pragma GCC diagnostic pop
+
 #endif // __cpp_lib_any
 #endif // _GLIBCXX_ANY
--- a/src/libstdc++-v3/include/std/atomic
+++ b/src/libstdc++-v3/include/std/atomic
@@ -235,13 +235,17 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
       atomic& operator=(const atomic&) = delete;
       atomic& operator=(const atomic&) volatile = delete;
 
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wc++14-extensions" // constexpr ctor body
       constexpr atomic(_Tp __i) noexcept : _M_i(__i)
       {
-#if __cplusplus >= 201402L && __has_builtin(__builtin_clear_padding)
+#if __has_builtin(__builtin_clear_padding)
 	if _GLIBCXX17_CONSTEXPR (__atomic_impl::__maybe_has_padding<_Tp>())
-	  __builtin_clear_padding(std::__addressof(_M_i));
+	  if (!std::__is_constant_evaluated())
+	    __builtin_clear_padding(std::__addressof(_M_i));
 #endif
       }
+#pragma GCC diagnostic pop
 
       operator _Tp() const noexcept
       { return load(); }
@@ -395,21 +399,20 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
       void
       wait(_Tp __old, memory_order __m = memory_order_seq_cst) const noexcept
       {
-	std::__atomic_wait_address_v(&_M_i, __old,
-			   [__m, this] { return this->load(__m); });
+	std::__atomic_wait_address_v(std::addressof(_M_i), __old,
+				     [__m, this] { return this->load(__m); });
       }
 
       // TODO add const volatile overload
 
       void
       notify_one() noexcept
-      { std::__atomic_notify_address(&_M_i, false); }
+      { std::__atomic_notify_address(std::addressof(_M_i), false); }
 
       void
       notify_all() noexcept
-      { std::__atomic_notify_address(&_M_i, true); }
+      { std::__atomic_notify_address(std::addressof(_M_i), true); }
 #endif // __cpp_lib_atomic_wait
-
     };
 #undef _GLIBCXX20_INIT
 
@@ -450,7 +453,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
       operator++(int) noexcept
       {
 #if __cplusplus >= 201703L
-	static_assert( is_object<_Tp>::value, "pointer to object type" );
+	static_assert( is_object_v<_Tp>, "pointer to object type" );
 #endif
 	return _M_b++;
       }
@@ -459,7 +462,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
       operator++(int) volatile noexcept
       {
 #if __cplusplus >= 201703L
-	static_assert( is_object<_Tp>::value, "pointer to object type" );
+	static_assert( is_object_v<_Tp>, "pointer to object type" );
 #endif
 	return _M_b++;
       }
@@ -468,7 +471,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
       operator--(int) noexcept
       {
 #if __cplusplus >= 201703L
-	static_assert( is_object<_Tp>::value, "pointer to object type" );
+	static_assert( is_object_v<_Tp>, "pointer to object type" );
 #endif
 	return _M_b--;
       }
@@ -477,7 +480,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
       operator--(int) volatile noexcept
       {
 #if __cplusplus >= 201703L
-	static_assert( is_object<_Tp>::value, "pointer to object type" );
+	static_assert( is_object_v<_Tp>, "pointer to object type" );
 #endif
 	return _M_b--;
       }
@@ -486,7 +489,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
       operator++() noexcept
       {
 #if __cplusplus >= 201703L
-	static_assert( is_object<_Tp>::value, "pointer to object type" );
+	static_assert( is_object_v<_Tp>, "pointer to object type" );
 #endif
 	return ++_M_b;
       }
@@ -495,7 +498,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
       operator++() volatile noexcept
       {
 #if __cplusplus >= 201703L
-	static_assert( is_object<_Tp>::value, "pointer to object type" );
+	static_assert( is_object_v<_Tp>, "pointer to object type" );
 #endif
 	return ++_M_b;
       }
@@ -504,7 +507,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
       operator--() noexcept
       {
 #if __cplusplus >= 201703L
-	static_assert( is_object<_Tp>::value, "pointer to object type" );
+	static_assert( is_object_v<_Tp>, "pointer to object type" );
 #endif
 	return --_M_b;
       }
@@ -513,7 +516,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
       operator--() volatile noexcept
       {
 #if __cplusplus >= 201703L
-	static_assert( is_object<_Tp>::value, "pointer to object type" );
+	static_assert( is_object_v<_Tp>, "pointer to object type" );
 #endif
 	return --_M_b;
       }
@@ -522,7 +525,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
       operator+=(ptrdiff_t __d) noexcept
       {
 #if __cplusplus >= 201703L
-	static_assert( is_object<_Tp>::value, "pointer to object type" );
+	static_assert( is_object_v<_Tp>, "pointer to object type" );
 #endif
 	return _M_b.operator+=(__d);
       }
@@ -531,7 +534,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
       operator+=(ptrdiff_t __d) volatile noexcept
       {
 #if __cplusplus >= 201703L
-	static_assert( is_object<_Tp>::value, "pointer to object type" );
+	static_assert( is_object_v<_Tp>, "pointer to object type" );
 #endif
 	return _M_b.operator+=(__d);
       }
@@ -540,7 +543,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
       operator-=(ptrdiff_t __d) noexcept
       {
 #if __cplusplus >= 201703L
-	static_assert( is_object<_Tp>::value, "pointer to object type" );
+	static_assert( is_object_v<_Tp>, "pointer to object type" );
 #endif
 	return _M_b.operator-=(__d);
       }
@@ -549,7 +552,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
       operator-=(ptrdiff_t __d) volatile noexcept
       {
 #if __cplusplus >= 201703L
-	static_assert( is_object<_Tp>::value, "pointer to object type" );
+	static_assert( is_object_v<_Tp>, "pointer to object type" );
 #endif
 	return _M_b.operator-=(__d);
       }
@@ -670,7 +673,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
 		memory_order __m = memory_order_seq_cst) noexcept
       {
 #if __cplusplus >= 201703L
-	static_assert( is_object<_Tp>::value, "pointer to object type" );
+	static_assert( is_object_v<_Tp>, "pointer to object type" );
 #endif
 	return _M_b.fetch_add(__d, __m);
       }
@@ -680,7 +683,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
 		memory_order __m = memory_order_seq_cst) volatile noexcept
       {
 #if __cplusplus >= 201703L
-	static_assert( is_object<_Tp>::value, "pointer to object type" );
+	static_assert( is_object_v<_Tp>, "pointer to object type" );
 #endif
 	return _M_b.fetch_add(__d, __m);
       }
@@ -690,7 +693,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
 		memory_order __m = memory_order_seq_cst) noexcept
       {
 #if __cplusplus >= 201703L
-	static_assert( is_object<_Tp>::value, "pointer to object type" );
+	static_assert( is_object_v<_Tp>, "pointer to object type" );
 #endif
 	return _M_b.fetch_sub(__d, __m);
       }
@@ -700,7 +703,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
 		memory_order __m = memory_order_seq_cst) volatile noexcept
       {
 #if __cplusplus >= 201703L
-	static_assert( is_object<_Tp>::value, "pointer to object type" );
+	static_assert( is_object_v<_Tp>, "pointer to object type" );
 #endif
 	return _M_b.fetch_sub(__d, __m);
       }
--- a/src/libstdc++-v3/include/std/concepts
+++ b/src/libstdc++-v3/include/std/concepts
@@ -382,6 +382,22 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
   template<typename _Rel, typename _Tp, typename _Up>
     concept strict_weak_order = relation<_Rel, _Tp, _Up>;
 
+  namespace __detail
+  {
+    // operator<=> are automatically reversed, so we need to consider
+    // both directions if types are different.
+    template<typename _Tp, typename _Up>
+      concept __not_overloaded_spaceship
+        =  ! requires(_Tp&& __t, _Up&& __u)
+	    { operator<=>(static_cast<_Tp&&>(__t), static_cast<_Up&&>(__u)); }
+	&& ! requires(_Tp&& __t, _Up&& __u)
+	    { static_cast<_Tp&&>(__t).operator<=>(static_cast<_Up&&>(__u)); }
+	&& (is_same_v<_Tp, _Up>
+	    || (! requires(_Tp&& __t, _Up&& __u)
+	         { operator<=>(static_cast<_Up&&>(__u), static_cast<_Tp&&>(__t)); }
+	       && ! requires(_Tp&& __t, _Up&& __u)
+	         { static_cast<_Up&&>(__u).operator<=>(static_cast<_Tp&&>(__t)); }));
+  }
 _GLIBCXX_END_NAMESPACE_VERSION
 } // namespace
 #endif // __cpp_lib_concepts
--- a/src/libstdc++-v3/include/std/expected
+++ b/src/libstdc++-v3/include/std/expected
@@ -314,6 +314,17 @@ namespace __expected
 	  __guard.release();
 	}
     }
+
+  // _GLIBCXX_RESOLVE_LIB_DEFECTS
+  // 3836. std::expected<bool, E1> conversion constructor
+  // expected(const expected<U, G>&) should take precedence over
+  // expected(U&&) with operator bool
+
+  // If T is cv bool, remove_cvref_t<U> is not a specialization of expected.
+  template<typename _Tp, typename _Up>
+    concept __not_constructing_bool_from_expected
+      = ! is_same_v<remove_cv_t<_Tp>, bool>
+	  || ! __is_expected<remove_cvref_t<_Up>>;
 }
 /// @endcond
 
@@ -327,26 +338,41 @@ namespace __expected
       static_assert( ! __expected::__is_unexpected<remove_cv_t<_Tp>> );
       static_assert( __expected::__can_be_unexpected<_Er> );
 
-      template<typename _Up, typename _Err, typename _Unex = unexpected<_Er>>
+      // If T is not cv bool, converts-from-any-cvref<T, expected<U, G>> and
+      // is_constructible<unexpected<E>, cv expected<U, G> ref-qual> are false.
+      template<typename _Up, typename _Gr, typename _Unex = unexpected<_Er>,
+	       typename = remove_cv_t<_Tp>>
 	static constexpr bool __cons_from_expected
-	  = __or_v<is_constructible<_Tp, expected<_Up, _Err>&>,
-		   is_constructible<_Tp, expected<_Up, _Err>>,
-		   is_constructible<_Tp, const expected<_Up, _Err>&>,
-		   is_constructible<_Tp, const expected<_Up, _Err>>,
-		   is_convertible<expected<_Up, _Err>&, _Tp>,
-		   is_convertible<expected<_Up, _Err>, _Tp>,
-		   is_convertible<const expected<_Up, _Err>&, _Tp>,
-		   is_convertible<const expected<_Up, _Err>, _Tp>,
-		   is_constructible<_Unex, expected<_Up, _Err>&>,
-		   is_constructible<_Unex, expected<_Up, _Err>>,
-		   is_constructible<_Unex, const expected<_Up, _Err>&>,
-		   is_constructible<_Unex, const expected<_Up, _Err>>
+	  = __or_v<is_constructible<_Tp, expected<_Up, _Gr>&>,
+		   is_constructible<_Tp, expected<_Up, _Gr>>,
+		   is_constructible<_Tp, const expected<_Up, _Gr>&>,
+		   is_constructible<_Tp, const expected<_Up, _Gr>>,
+		   is_convertible<expected<_Up, _Gr>&, _Tp>,
+		   is_convertible<expected<_Up, _Gr>, _Tp>,
+		   is_convertible<const expected<_Up, _Gr>&, _Tp>,
+		   is_convertible<const expected<_Up, _Gr>, _Tp>,
+		   is_constructible<_Unex, expected<_Up, _Gr>&>,
+		   is_constructible<_Unex, expected<_Up, _Gr>>,
+		   is_constructible<_Unex, const expected<_Up, _Gr>&>,
+		   is_constructible<_Unex, const expected<_Up, _Gr>>
 		  >;
 
-      template<typename _Up, typename _Err>
+      // _GLIBCXX_RESOLVE_LIB_DEFECTS
+      // If t is cv bool, we know it can be constructed from expected<U, G>,
+      // but we don't want to cause the expected(U&&) constructor to be used,
+      // so we only check the is_constructible<unexpected<E>, ...> cases.
+      template<typename _Up, typename _Gr, typename _Unex>
+	static constexpr bool __cons_from_expected<_Up, _Gr, _Unex, bool>
+	  = __or_v<is_constructible<_Unex, expected<_Up, _Gr>&>,
+		   is_constructible<_Unex, expected<_Up, _Gr>>,
+		   is_constructible<_Unex, const expected<_Up, _Gr>&>,
+		   is_constructible<_Unex, const expected<_Up, _Gr>>
+		  >;
+
+      template<typename _Up, typename _Gr>
 	constexpr static bool __explicit_conv
 	  = __or_v<__not_<is_convertible<_Up, _Tp>>,
-		   __not_<is_convertible<_Err, _Er>>
+		   __not_<is_convertible<_Gr, _Er>>
 		  >;
 
       template<typename _Up>
@@ -445,8 +471,10 @@ namespace __expected
       template<typename _Up = _Tp>
 	requires (!is_same_v<remove_cvref_t<_Up>, expected>)
 	  && (!is_same_v<remove_cvref_t<_Up>, in_place_t>)
-	  && (!__expected::__is_unexpected<remove_cvref_t<_Up>>)
+	  && (!is_same_v<remove_cvref_t<_Up>, unexpect_t>)
 	  && is_constructible_v<_Tp, _Up>
+	  && (!__expected::__is_unexpected<remove_cvref_t<_Up>>)
+	  && __expected::__not_constructing_bool_from_expected<_Tp, _Up>
 	constexpr explicit(!is_convertible_v<_Up, _Tp>)
 	expected(_Up&& __v)
 	noexcept(is_nothrow_constructible_v<_Tp, _Up>)
--- a/src/libstdc++-v3/include/std/format
+++ b/src/libstdc++-v3/include/std/format
@@ -1831,25 +1831,35 @@ namespace __format
 	if (__grp.empty() && __point == __dot)
 	  return __lstr; // Locale uses '.' and no grouping.
 
-	size_t __d = __str.find(__dot);
-	size_t __e = min(__d, __str.find(__exp));
+	size_t __d = __str.find(__dot); // Index of radix character (if any).
+	size_t __e = min(__d, __str.find(__exp)); // First of radix or exponent
 	if (__e == __str.npos)
 	  __e = __str.size();
-	const size_t __r = __str.size() - __e;
+	const size_t __r = __str.size() - __e; // Length of remainder.
 	auto __overwrite = [&](_CharT* __p, size_t) {
-	  auto __end = std::__add_grouping(__p, __np.thousands_sep(),
+	  // Apply grouping to the digits before the radix or exponent.
+	  int __off = 0;
+	  if (auto __c = __str.front(); __c == '-' || __c == '+' || __c == ' ')
+	    {
+	      *__p = __c;
+	      __off = 1;
+	    }
+	  auto __end = std::__add_grouping(__p + __off, __np.thousands_sep(),
 					   __grp.data(), __grp.size(),
-					   __str.data(), __str.data() + __e);
-	  if (__r)
+					   __str.data() + __off,
+					   __str.data() + __e);
+	  if (__r) // If there's a fractional part or exponent
 	    {
 	      if (__d != __str.npos)
 		{
-		  *__end = __point;
+		  *__end = __point; // Add the locale's radix character.
 		  ++__end;
 		  ++__e;
 		}
-	      if (__r > 1)
-		__end += __str.copy(__end, __str.npos, __e);
+	      const size_t __rlen = __str.size() - __e;
+	      // Append fractional digits and/or exponent:
+	      char_traits<_CharT>::copy(__end, __str.data() + __e, __rlen);
+	      __end += __rlen;
 	    }
 	  return (__end - __p);
 	};
--- a/src/libstdc++-v3/include/std/limits
+++ b/src/libstdc++-v3/include/std/limits
@@ -2122,7 +2122,7 @@ __glibcxx_float_n(128)
       static _GLIBCXX_USE_CONSTEXPR int digits = 113;
       static _GLIBCXX_USE_CONSTEXPR int digits10 = 33;
 #if __cplusplus >= 201103L
-      static constexpr int max_digits10 = 35;
+      static constexpr int max_digits10 = 36;
 #endif
       static _GLIBCXX_USE_CONSTEXPR bool is_signed = true;
       static _GLIBCXX_USE_CONSTEXPR bool is_integer = false;
--- a/src/libstdc++-v3/include/std/mutex
+++ b/src/libstdc++-v3/include/std/mutex
@@ -188,7 +188,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
 	  return static_cast<_Derived*>(this)->_M_timedlock(__ts);
 	}
 
-#ifdef _GLIBCXX_USE_PTHREAD_MUTEX_CLOCKLOCK
+#if _GLIBCXX_USE_PTHREAD_MUTEX_CLOCKLOCK
       template<typename _Duration>
 	bool
 	_M_try_lock_until(const chrono::time_point<chrono::steady_clock,
@@ -375,7 +375,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
       _M_timedlock(const __gthread_time_t& __ts)
       { return !__gthread_recursive_mutex_timedlock(&_M_mutex, &__ts); }
 
-#ifdef _GLIBCXX_USE_PTHREAD_MUTEX_CLOCKLOCK
+#if _GLIBCXX_USE_PTHREAD_MUTEX_CLOCKLOCK
       bool
       _M_clocklock(clockid_t __clockid, const __gthread_time_t& __ts)
       { return !pthread_mutex_clocklock(&_M_mutex, __clockid, &__ts); }
--- a/src/libstdc++-v3/include/std/string_view
+++ b/src/libstdc++-v3/include/std/string_view
@@ -906,6 +906,6 @@ _GLIBCXX_END_NAMESPACE_VERSION
 
 #include <bits/string_view.tcc>
 
-#endif // __cplusplus <= 201402L
+#endif // C++17
 
-#endif // _GLIBCXX_EXPERIMENTAL_STRING_VIEW
+#endif // _GLIBCXX_STRING_VIEW
--- a/src/libstdc++-v3/libsupc++/compare
+++ b/src/libstdc++-v3/libsupc++/compare
@@ -531,10 +531,7 @@ namespace std _GLIBCXX_VISIBILITY(default)
 	  { static_cast<_Tp&&>(__t) <=> static_cast<_Up&&>(__u); }
 	  && convertible_to<_Tp, const volatile void*>
 	  && convertible_to<_Up, const volatile void*>
-	  && ! requires(_Tp&& __t, _Up&& __u)
-	  { operator<=>(static_cast<_Tp&&>(__t), static_cast<_Up&&>(__u)); }
-	  && ! requires(_Tp&& __t, _Up&& __u)
-	  { static_cast<_Tp&&>(__t).operator<=>(static_cast<_Up&&>(__u)); };
+	  && __not_overloaded_spaceship<_Tp, _Up>;
   } // namespace __detail
 
   // _GLIBCXX_RESOLVE_LIB_DEFECTS
--- a/src/libstdc++-v3/python/libstdcxx/v6/xmethods.py
+++ b/src/libstdc++-v3/python/libstdcxx/v6/xmethods.py
@@ -28,8 +28,6 @@ def get_bool_type():
 def get_std_size_type():
     return gdb.lookup_type('std::size_t')
 
-_versioned_namespace = '__8::'
-
 def is_specialization_of(x, template_name):
     """
     Test whether a type is a specialization of the named class template.
@@ -39,8 +37,7 @@ def is_specialization_of(x, template_name):
     """
     if isinstance(x, gdb.Type):
         x = x.tag
-    template_name = '(%s)?%s' % (_versioned_namespace, template_name)
-    return re.match(r'^std::(__\d::)?%s<.*>$' % template_name, x) is not None
+    return re.match(r'^std::(__\d::|__debug::)?%s<.*>$' % template_name, x) is not None
 
 class LibStdCxxXMethod(gdb.xmethod.XMethod):
     def __init__(self, name, worker_class):
@@ -445,7 +442,7 @@ class ListMethodsMatcher(gdb.xmethod.XMethodMatcher):
         if method is None or not method.enabled:
             return None
         val_type = class_type.template_argument(0)
-        node_type = gdb.lookup_type(str(class_type) + '::_Node').pointer()
+        node_type = gdb.lookup_type(str(class_type) + '::_Node_ptr')
         return method.worker_class(val_type, node_type)
 
 # Xmethods for std::vector
--- a/src/libstdc++-v3/src/c++11/system_error.cc
+++ b/src/libstdc++-v3/src/c++11/system_error.cc
@@ -157,22 +157,23 @@ namespace
 #if defined(_WIN32) && !defined(__CYGWIN__)
       char* buf = nullptr;
       auto len
-	= FormatMessage(FORMAT_MESSAGE_FROM_SYSTEM
-			| FORMAT_MESSAGE_ALLOCATE_BUFFER,
-			nullptr,
-			i,
-			LANG_USER_DEFAULT,
-			reinterpret_cast<LPTSTR>(&buf),
-			0,
-			nullptr);
+	= FormatMessageA(FORMAT_MESSAGE_FROM_SYSTEM
+			 | FORMAT_MESSAGE_ALLOCATE_BUFFER
+			 | FORMAT_MESSAGE_IGNORE_INSERTS,
+			 nullptr,
+			 i,
+			 LANG_USER_DEFAULT,
+			 reinterpret_cast<LPTSTR>(&buf),
+			 0,
+			 nullptr);
       if (len > 0)
       {
 	struct deleter {
 	  void operator()(void* p) const { ::LocalFree(p); }
 	};
 	std::unique_ptr<char[], deleter> guard(buf);
-	if (len > 3 && !__builtin_memcmp(buf + len - 3, ".\r\n", 3)) [[likely]]
-	  len -= 3;
+	if (len > 2 && !__builtin_memcmp (buf + len - 2, "\r\n", 2)) [[likely]]
+	  len -= 2 + (buf[len - 3] == '.');
 	return string(buf, len);
       }
       return string("Unknown error code");
--- a/src/libstdc++-v3/src/c++17/memory_resource.cc
+++ b/src/libstdc++-v3/src/c++17/memory_resource.cc
@@ -179,8 +179,8 @@ namespace pmr
   // versions will not use this symbol.
   monotonic_buffer_resource::~monotonic_buffer_resource() { release(); }
 
-  namespace {
-
+namespace
+{
   // aligned_size<N> stores the size and alignment of a memory allocation.
   // The size must be a multiple of N, leaving the low log2(N) bits free
   // to store the base-2 logarithm of the alignment.
@@ -218,7 +218,7 @@ namespace pmr
     return (n + alignment - 1) & ~(alignment - 1);
   }
 
-  } // namespace
+} // namespace
 
   // Memory allocated by the upstream resource is managed in a linked list
   // of _Chunk objects. A _Chunk object recording the size and alignment of
@@ -304,8 +304,8 @@ namespace pmr
 
   // Helper types for synchronized_pool_resource & unsynchronized_pool_resource
 
-  namespace {
-
+namespace
+{
   // Simple bitset with runtime size.
   // Tracks which blocks in a pool chunk are used/unused.
   struct bitset
@@ -632,7 +632,7 @@ namespace pmr
 
   static_assert(sizeof(big_block) == (2 * sizeof(void*)));
 
-  } // namespace
+} // namespace
 
   // A pool that serves blocks of a particular size.
   // Each pool manages a number of chunks.
@@ -864,7 +864,16 @@ namespace pmr
     using big_block::big_block;
   };
 
-  namespace {
+namespace
+{
+  // N.B. it is important that we don't skip any power of two sizes if there
+  // is a non-power of two size between them, e.g. must not have pool sizes
+  // of 24 and 40 without having a pool size of 32. Otherwise an allocation
+  // of 32 bytes with alignment 16 would choose the 40-byte pool which is not
+  // correctly aligned for 16-byte alignment. It would be OK (but suboptimal)
+  // to have no pool of size 32 if we have pool sizes of 16 and 64 and no
+  // non-power of two sizes between those, because the example of (32, 16)
+  // would choose the 64-byte pool, which would be correctly aligned.
 
   constexpr size_t pool_sizes[] = {
       8, 16, 24,
@@ -979,7 +988,7 @@ namespace pmr
   using exclusive_lock = lock_guard<shared_mutex>;
 #endif
 
-  } // namespace
+} // namespace
 
   __pool_resource::
   __pool_resource(const pool_options& opts, memory_resource* upstream)
@@ -1071,12 +1080,33 @@ namespace pmr
     return p;
   }
 
+  // Determine the appropriate allocation size, rounding up to a multiple
+  // of the alignment if needed.
+  static inline size_t
+  choose_block_size(size_t bytes, size_t alignment)
+  {
+    if (bytes == 0) [[unlikely]]
+      return alignment;
+
+    // Use bit_ceil in case alignment is invalid (i.e. not a power of two).
+    size_t mask = std::__bit_ceil(alignment) - 1;
+    // Round up to a multiple of alignment.
+    size_t block_size = (bytes + mask) & ~mask;
+
+    if (block_size >= bytes) [[likely]]
+      return block_size;
+
+    // Wrapped around to zero, bytes must have been impossibly large.
+    return numeric_limits<size_t>::max();
+  }
+
+
 #ifdef _GLIBCXX_HAS_GTHREADS
   // synchronized_pool_resource members.
 
   /* Notes on implementation and thread safety:
    *
-   * Each synchronized_pool_resource manages an linked list of N+1 _TPools
+   * Each synchronized_pool_resource manages a linked list of N+1 _TPools
    * objects, where N is the number of threads using the pool resource.
    * Each _TPools object has its own set of pools, with their own chunks.
    * The first element of the list, _M_tpools[0], can be used by any thread.
@@ -1243,7 +1273,7 @@ namespace pmr
   synchronized_pool_resource::
   do_allocate(size_t bytes, size_t alignment)
   {
-    const auto block_size = std::max(bytes, alignment);
+    const auto block_size = choose_block_size(bytes, alignment);
     const pool_options opts = _M_impl._M_opts;
     if (block_size <= opts.largest_required_pool_block)
       {
@@ -1290,7 +1320,7 @@ namespace pmr
   synchronized_pool_resource::
   do_deallocate(void* p, size_t bytes, size_t alignment)
   {
-    size_t block_size = std::max(bytes, alignment);
+    size_t block_size = choose_block_size(bytes, alignment);
     if (block_size <= _M_impl._M_opts.largest_required_pool_block)
       {
 	const ptrdiff_t index = pool_index(block_size, _M_impl._M_npools);
@@ -1449,7 +1479,7 @@ namespace pmr
   void*
   unsynchronized_pool_resource::do_allocate(size_t bytes, size_t alignment)
   {
-    const auto block_size = std::max(bytes, alignment);
+    const auto block_size = choose_block_size(bytes, alignment);
     if (block_size <= _M_impl._M_opts.largest_required_pool_block)
       {
 	// Recreate pools if release() has been called:
@@ -1466,7 +1496,7 @@ namespace pmr
   unsynchronized_pool_resource::
   do_deallocate(void* p, size_t bytes, size_t alignment)
   {
-    size_t block_size = std::max(bytes, alignment);
+    size_t block_size = choose_block_size(bytes, alignment);
     if (block_size <= _M_impl._M_opts.largest_required_pool_block)
       {
 	if (auto pool = _M_find_pool(block_size))
--- a/src/libstdc++-v3/src/filesystem/ops-common.h
+++ b/src/libstdc++-v3/src/filesystem/ops-common.h
@@ -159,10 +159,7 @@ namespace __gnu_posix
     if (MoveFileExW(oldname, newname,
 		    MOVEFILE_REPLACE_EXISTING | MOVEFILE_COPY_ALLOWED))
       return 0;
-    if (GetLastError() == ERROR_ACCESS_DENIED)
-      errno = EACCES;
-    else
-      errno = EIO;
+    errno = std::__last_system_error().default_error_condition().value();
     return -1;
   }
 
--- a/src/libstdc++-v3/testsuite/17_intro/names.cc
+++ b/src/libstdc++-v3/testsuite/17_intro/names.cc
@@ -280,6 +280,8 @@
 // <sys/ucontext.h> defines fpreg_t::d and fpreg_t::f
 #undef d
 #undef f
+// <asm/types.h> defines __vector128::u
+#undef u
 #endif
 
 #if defined (__linux__) && defined (__sparc__)
--- a/src/libstdc++-v3/testsuite/18_support/numeric_limits/128bit.cc
+++ b/src/libstdc++-v3/testsuite/18_support/numeric_limits/128bit.cc
@@ -4,6 +4,11 @@
 
 #if __SIZEOF_FLOAT128__
 __extension__ template class std::numeric_limits<__float128>;
+
+# if __cplusplus >= 201103L
+static_assert( std::numeric_limits<__float128>::max_digits10 == 36,
+	       "PR libstdc++/121374" );
+# endif
 #endif
 
 #if __SIZEOF_INT128__
--- a/src/libstdc++-v3/testsuite/19_diagnostics/error_category/system_category.cc
+++ b/src/libstdc++-v3/testsuite/19_diagnostics/error_category/system_category.cc
@@ -21,6 +21,11 @@
 #include <locale>
 #include <testsuite_hooks.h>
 
+#if defined __MINGW32__ || defined __MINGW64__
+#define WIN32_LEAN_AND_MEAN
+#include <windows.h>
+#endif
+
 void
 test01()
 {
@@ -34,7 +39,7 @@ test02()
   const std::error_category& cat = std::system_category();
   std::error_condition cond;
 
-#if defined __MING32__ || defined __MINGW64__
+#if defined __MINGW32__ || defined __MINGW64__
   cond = cat.default_error_condition(8); // ERROR_NOT_ENOUGH_MEMORY
   VERIFY( cond.value() == ENOMEM );
   VERIFY( cond.category() == std::generic_category() );
@@ -112,9 +117,17 @@ test03()
   // set "C" locale to get expected message
   auto loc = std::locale::global(std::locale::classic());
 
-#if defined __MING32__ || defined __MINGW64__
+#if defined __MINGW32__ || defined __MINGW64__
+  // On Windows, set thread preferred UI languages to "en-US"
+  // to get expected message
+  ULONG num_langs = 1;
+  SetThreadPreferredUILanguages(MUI_LANGUAGE_NAME, L"en-US\0", &num_langs);
+
   std::string msg = std::system_category().message(5); // ERROR_ACCESS_DENIED
-  VERIFY(msg == "Access denied");
+  // Windows returns "Access is denied" but Wine returns "Access denied".
+  VERIFY(msg == "Access is denied" || msg == "Access denied");
+
+  SetThreadPreferredUILanguages(MUI_RESET_FILTERS, nullptr, nullptr);
 #else
   std::string msg = std::system_category().message(EBADF);
   VERIFY( msg.find("file") != std::string::npos );
--- a/src/libstdc++-v3/testsuite/20_util/bind/dangling_ref.cc
+++ b/src/libstdc++-v3/testsuite/20_util/bind/dangling_ref.cc
@@ -1,9 +1,11 @@
 // { dg-do compile { target c++11 } }
+// { dg-additional-options "-Wsystem-headers" }
 #include <functional>
 
 int f();
 auto b = std::bind<const int&>(f);
 int i = b(); // { dg-error "here" "" { target { c++14_down } } }
 // { dg-error "dangling reference" "" { target { c++14_down } } 0 }
+// { dg-error "reference to temporary" "" { target { c++14_down } } 0 }
 // { dg-error "no matching function" "" { target c++17 } 0 }
 // { dg-error "enable_if" "" { target c++17 } 0 }
new file mode 100644
--- /dev/null
+++ b/src/libstdc++-v3/testsuite/20_util/expected/lwg3836.cc
@@ -0,0 +1,34 @@
+// { dg-do run { target c++23 } }
+
+#include <expected>
+#include <testsuite_hooks.h>
+
+constexpr void
+test_convert_contained_value_to_bool()
+{
+  struct BaseError { };
+  struct DerivedError : BaseError { };
+
+  std::expected<bool, DerivedError> e = false;
+
+  // Should use expected(const expected<U, G>&) ctor, not expected(U&&):
+  std::expected<bool, BaseError> e2 = e;
+
+  // Contained value should be e.value() not static_cast<bool>(e):
+  VERIFY( e2.value() == false );
+
+  std::expected<bool, DerivedError> e3(std::unexpect);
+  std::expected<const bool, BaseError> e4 = e3;
+  // Should have error, not static_cast<bool>(e3):
+  VERIFY( ! e4.has_value() );
+}
+
+int main()
+{
+  test_convert_contained_value_to_bool();
+
+  static_assert([] {
+    test_convert_contained_value_to_bool();
+    return true;
+  }());
+}
new file mode 100644
--- /dev/null
+++ b/src/libstdc++-v3/testsuite/20_util/expected/lwg4222.cc
@@ -0,0 +1,39 @@
+// { dg-do run { target c++23 } }
+
+// LWG 4222. 'expected' constructor from a single value missing a constraint
+
+#include <expected>
+#include <type_traits>
+#include <testsuite_hooks.h>
+
+struct T {
+  explicit T(auto) {}
+};
+struct E {
+  E(int) {}
+};
+
+struct V {
+ explicit constexpr V(std::unexpect_t) {}
+};
+
+static_assert(!std::is_constructible_v<std::expected<T, E>, std::unexpect_t>);
+static_assert(!std::is_constructible_v<std::expected<T, E>, std::unexpect_t &>);
+static_assert(!std::is_constructible_v<std::expected<T, E>, std::unexpect_t &&>);
+static_assert(!std::is_constructible_v<std::expected<T, E>, const std::unexpect_t>);
+static_assert(!std::is_constructible_v<std::expected<T, E>, const std::unexpect_t &>);
+static_assert(!std::is_constructible_v<std::expected<T, E>, const std::unexpect_t &&>);
+
+constexpr bool test() {
+  std::expected<V, int> e1(std::in_place, std::unexpect);
+  VERIFY( e1.has_value() );
+  std::expected<int, V> e2(std::unexpect, std::unexpect);
+  VERIFY( !e2.has_value() );
+  return true;
+}
+
+int main() {
+  test();
+  static_assert(test());
+  return 0;
+}
new file mode 100644
--- /dev/null
+++ b/src/libstdc++-v3/testsuite/20_util/function_objects/comparisons_pointer_spaceship.cc
@@ -0,0 +1,336 @@
+// { dg-do run { target c++20 } }
+
+#include <compare>
+#include <cstring>
+#include <functional>
+#include <testsuite_hooks.h>
+
+constexpr const char arr[] = "efgh\0abcd\0ijkl";
+constexpr const char* s1 = arr;
+constexpr const char* s2 = arr+5;
+constexpr const char* s3 = arr+6;
+
+struct CStrNone
+{
+  const char* str;
+
+  constexpr
+  operator const char*() const
+  { return str; }
+};
+
+template<typename ResultCreator>
+struct CStrMem
+{
+  const char* str;
+
+  constexpr
+  operator const char*() const
+  { return str; }
+
+  auto operator<=>(CStrMem const& rhs) const
+  { return ResultCreator::create(std::strcmp(this->str, rhs.str)); }
+
+  auto operator<=>(const char* rhs) const
+  { return ResultCreator::create(std::strcmp(this->str, rhs)); }
+};
+
+template<typename ResultCreator>
+struct CStrFriend
+{
+  const char* str;
+
+  constexpr
+  operator const char*() const
+  { return str; }
+
+  friend auto operator<=>(CStrFriend lhs, CStrFriend rhs)
+  { return ResultCreator::create(std::strcmp(lhs.str, rhs.str)); }
+
+  friend auto operator<=>(CStrFriend lhs, const char* rhs)
+  { return ResultCreator::create(std::strcmp(lhs.str, rhs)); }
+};
+
+template<typename ResultCreator>
+struct CStrFree
+{
+  const char* str;
+
+  constexpr
+  operator const char*() const
+  { return str; }
+};
+
+template<typename RC>
+auto operator<=>(CStrFree<RC> lhs, CStrFree<RC> rhs)
+{ return RC::create(std::strcmp(lhs.str, rhs.str)); }
+
+template<typename RC>
+auto operator<=>(CStrFree<RC> lhs, const char* rhs)
+{ return RC::create(std::strcmp(lhs.str, rhs)); }
+
+template<typename ResultCreator>
+struct CStrMixed
+{
+  const char* str;
+
+  constexpr
+  operator const char*() const
+  { return str; }
+};
+
+template<typename RC>
+auto operator<=>(CStrMixed<RC> lhs, CStrMixed<RC> rhs)
+{ return RC::create(std::strcmp(lhs.str, rhs.str)); }
+
+template<typename RC>
+auto operator<=>(CStrMixed<RC> lhs, CStrFree<RC> rhs)
+{ return RC::create(std::strcmp(lhs.str, rhs.str)); }
+
+// If the type returned from shapeship does not support relational
+// operators, then synthesized operators are ill-formed, SFINAEable.
+struct ReturnVoid
+{
+  constexpr static void
+  create(int) { }
+};
+
+struct NoOperators
+{
+  constexpr static NoOperators
+  create(int)
+  { return NoOperators(); }
+};
+
+// std defined ordering types are expected
+template<typename Ord = std::strong_ordering>
+struct ReturnOrd
+{
+  constexpr static Ord
+  create(int cmp)
+  { return cmp <=> 0; }
+};
+
+// However, other types that provide required
+// operators are supported.
+struct ReturnInt
+{
+  constexpr static int
+  create(int cmp)
+  { return cmp; }
+};
+
+struct CustomOrd
+{
+  constexpr static CustomOrd
+  create(int cmp)
+  { return CustomOrd(cmp); }
+
+  CustomOrd() = default;
+
+  explicit constexpr
+  CustomOrd(int cmp)
+  : v(cmp) {}
+
+  friend constexpr bool
+  operator<(CustomOrd c, std::nullptr_t)
+  { return c.v < 0; }
+
+  friend constexpr bool
+  operator<(std::nullptr_t, CustomOrd c)
+  { return 0 < c.v; }
+
+  friend constexpr bool
+  operator>(CustomOrd c, std::nullptr_t)
+  { return c.v > 0; }
+
+  friend constexpr bool
+  operator>(std::nullptr_t, CustomOrd c)
+  { return 0 > c.v; }
+
+  friend constexpr bool
+  operator<=(CustomOrd c, std::nullptr_t)
+  { return c.v <= 0; }
+
+  friend constexpr bool
+  operator<=(std::nullptr_t, CustomOrd c)
+  { return 0 <= c.v; }
+
+  friend constexpr bool
+  operator>=(CustomOrd c, std::nullptr_t)
+  { return c.v >= 0; }
+
+  friend constexpr bool
+  operator>=(std::nullptr_t, CustomOrd c)
+  { return 0 >= c.v; }
+
+  friend constexpr CustomOrd
+  operator<=>(CustomOrd c, std::nullptr_t)
+  { return c; }
+
+  friend constexpr CustomOrd
+  operator<=>(std::nullptr_t, CustomOrd c)
+  { return CustomOrd(-c.v); }
+
+private:
+  int v = 0;
+};
+
+template<typename CStr1, typename CStr2>
+void
+test_relational(bool use_overloaded)
+{
+  CStr1 cs1{s1}; CStr2 cs2{s2};
+
+  if (use_overloaded)
+  {
+    // Overloaded operaetors compare content of the string,
+    // and cs1 > cs2;
+
+    VERIFY( !(cs1 < cs2) );
+    VERIFY( !std::less<>{}(cs1, cs2) );
+    VERIFY( !std::ranges::less{}(cs1, cs2) );
+
+    VERIFY( (cs1 > cs2) );
+    VERIFY( std::greater<>{}(cs1, cs2) );
+    VERIFY( std::ranges::greater{}(cs1, cs2) );
+
+    VERIFY( !(cs1 < cs2) );
+    VERIFY( !std::less_equal<>{}(cs1, cs2) );
+    VERIFY( !std::ranges::less_equal{}(cs1, cs2) );
+
+    VERIFY( (cs1 > cs2) );
+    VERIFY( std::greater_equal<>{}(cs1, cs2) );
+    VERIFY( std::ranges::greater_equal{}(cs1, cs2) );
+  }
+  else
+  {
+    // Without overloaded operators, we comapre pointers,
+    // and cs1 < cs2;
+
+    VERIFY( (cs1 < cs2) );
+    VERIFY( std::less<>{}(cs1, cs2) );
+    VERIFY( std::ranges::less{}(cs1, cs2) );
+
+    VERIFY( !(cs1 > cs2) );
+    VERIFY( !std::greater<>{}(cs1, cs2) );
+    VERIFY( !std::ranges::greater{}(cs1, cs2) );
+
+    VERIFY( (cs1 < cs2) );
+    VERIFY( std::less_equal<>{}(cs1, cs2) );
+    VERIFY( std::ranges::less_equal{}(cs1, cs2) );
+
+    VERIFY( !(cs1 > cs2) );
+    VERIFY( !std::greater_equal<>{}(cs1, cs2) );
+    VERIFY( !std::ranges::greater_equal{}(cs1, cs2) );
+  }
+}
+
+template<typename CStr>
+void
+test_relational_type(bool use_overloaded)
+{
+  test_relational<CStr, CStr>(use_overloaded);
+  test_relational<CStr, const char*>(use_overloaded);
+  test_relational<const char*, CStr>(use_overloaded);
+}
+
+template<typename RC>
+void
+test_relational_return()
+{
+  test_relational_type<CStrMem<RC>>(true);
+  test_relational_type<CStrFriend<RC>>(true);
+  test_relational_type<CStrFree<RC>>(true);
+  test_relational<CStrMixed<RC>, CStrFree<RC>>(true);
+  test_relational<CStrFree<RC>, CStrMixed<RC>>(true);
+}
+
+template<typename CStr1, typename CStr2>
+void
+test_spaceship(bool use_overloaded)
+{
+  CStr1 cs1{s1}; CStr2 cs2{s2};
+
+  if (use_overloaded)
+  {
+    // Overloaded operaetors compare content of the string,
+    // and cs1 > cs2;
+    VERIFY( (cs1 <=> cs2) > 0 );
+    VERIFY( std::compare_three_way{}(cs1, cs2) > 0 );
+  }
+  else
+  {
+    // Without overloaded operators, we comapre pointers,
+    // and cs1 < cs2;
+    VERIFY( (cs1 <=> cs2) < 0 );
+    VERIFY( std::compare_three_way{}(cs1, cs2) < 0 );
+  }
+}
+
+template<typename CStr>
+void
+test_spaceship_type(bool use_overloaded)
+{
+  test_spaceship<CStr, CStr>(use_overloaded);
+  test_spaceship<CStr, const char*>(use_overloaded);
+  test_spaceship<const char*, CStr>(use_overloaded);
+}
+
+template<typename Ordering>
+void
+test_std_ordering()
+{
+  using RC = ReturnOrd<Ordering>;
+  test_relational_return<RC>();
+  test_spaceship_type<CStrMem<RC>>(true);
+  test_spaceship_type<CStrFriend<RC>>(true);
+  test_spaceship_type<CStrFree<RC>>(true);
+  test_spaceship<CStrMixed<RC>, CStrFree<RC>>(true);
+  test_spaceship<CStrFree<RC>, CStrMixed<RC>>(true);
+}
+
+template<typename CStr1, typename CStr2>
+void
+test_no_relational()
+{
+  CStr1 c1{}; CStr2 c2{};
+  static_assert(!requires { c1 < c2; });
+  static_assert(!requires { c1 > c2; });
+  static_assert(!requires { c1 <= c2; });
+  static_assert(!requires { c1 >= c2; });
+}
+
+template<typename CStr>
+void
+test_no_relational_type()
+{
+  test_no_relational<CStr, CStr>();
+  test_no_relational<CStr, const char*>();
+  test_no_relational<const char*, CStr>();
+}
+
+template<typename RC>
+void
+test_no_relational_return()
+{
+  test_no_relational_type<CStrMem<RC>>();
+  test_no_relational_type<CStrFriend<RC>>();
+  test_no_relational_type<CStrFree<RC>>();
+  test_no_relational<CStrMixed<RC>, CStrFree<RC>>();
+  test_no_relational<CStrFree<RC>, CStrMixed<RC>>();
+}
+
+int main()
+{
+  test_std_ordering<std::strong_ordering>();
+  test_std_ordering<std::weak_ordering>();
+  test_std_ordering<std::partial_ordering>();
+
+  test_relational_type<CStrNone>(false);
+  test_relational_return<ReturnInt>();
+  test_relational_return<CustomOrd>();
+
+  test_no_relational_return<ReturnVoid>();
+  test_no_relational_return<NoOperators>();
+}
--- a/src/libstdc++-v3/testsuite/20_util/pair/astuple/get_by_type.cc
+++ b/src/libstdc++-v3/testsuite/20_util/pair/astuple/get_by_type.cc
@@ -33,3 +33,55 @@ void test01()
   const int&&  cpsecond __attribute__((unused)) =
     std::get<int>(std::move(cp));
 }
+
+// PR libstdc++/121745 return of get(pair<_Up, _Tp>&& __p) may be ill-formed
+void
+test_pr121745(std::pair<float&, int&> p)
+{
+  float& pfirst = std::get<float&>(std::move(p));
+  int& psecond  = std::get<int&>(std::move(p));
+
+  const auto& p2 = p;
+  float& p2first = std::get<float&>(std::move(p2));
+  int& p2second  = std::get<int&>(std::move(p2));
+}
+
+template<typename T, typename Pair>
+using get_t = decltype(std::get<T>(std::declval<Pair>()));
+
+// Check that get<T>(Pair) returns Ret
+template<typename T, typename Pair, typename Ret>
+constexpr bool verify = std::is_same<get_t<T, Pair>, Ret>::value;
+
+template<typename T1, typename T2>
+void
+check()
+{
+  // Overloads for accessing first member
+  static_assert( verify<T1, std::pair<T1, T2>&, T1&>,
+		 "T1& get(pair<T1, T2>&)" );
+  static_assert( verify<T1, const std::pair<T1, T2>&, const T1&>,
+		 "const T1& get(const pair<T1, T2>&)" );
+  static_assert( verify<T1, std::pair<T1, T2>&&, T1&&>,
+		 "T1&& get(pair<T1, T2>&&)" );
+  static_assert( verify<T1, const std::pair<T1, T2>&&, const T1&&>,
+		 "const T1&& get(const pair<T1, T2>&&)" );
+
+  // Overloads for accessing second member
+  static_assert( verify<T2, std::pair<T1, T2>&, T2&>,
+		 "T2& get(pair<T1, T2>&)" );
+  static_assert( verify<T2, const std::pair<T1, T2>&, const T2&>,
+		 "const T2& get(const pair<T1, T2>&)" );
+  static_assert( verify<T2, std::pair<T1, T2>&&, T2&&>,
+		 "T2&& get(pair<T1, T2>&&)" );
+  static_assert( verify<T2, const std::pair<T1, T2>&&, const T2&&>,
+		 "const T2&& get(const pair<T1, T2>&&)" );
+}
+
+void
+test_all()
+{
+  check<float, int>();
+  check<float&, int&>();
+  check<float&&, int&&>();
+}
new file mode 100644
--- /dev/null
+++ b/src/libstdc++-v3/testsuite/20_util/pair/cons/110853.cc
@@ -0,0 +1,10 @@
+// { dg-do compile { target c++17 } }
+// PR libstdc++/110853
+// Bad interaction between deduction guide with decay and constraints
+// (CTAD, std::pair and function lvalue)
+
+#include <utility>
+
+void func() {}
+std::pair p(1, func);
+std::pair<int, void (*)()>& r = p;
--- a/src/libstdc++-v3/testsuite/20_util/ratio/operations/ops_overflow_neg.cc
+++ b/src/libstdc++-v3/testsuite/20_util/ratio/operations/ops_overflow_neg.cc
@@ -1,6 +1,6 @@
 // { dg-do compile { target c++11 } }
 // { dg-require-cstdint "" }
-
+// { dg-additional-options "-Wsystem-headers" }
 // 2008-07-03 Chris Fairles <chris.fairles@gmail.com>
 
 // Copyright (C) 2008-2024 Free Software Foundation, Inc.
@@ -48,5 +48,6 @@ test02()
 // { dg-error "overflow in multiplication" "" { target *-*-* } 105 }
 // { dg-error "overflow in constant expression" "" { target *-*-* } 0 }
 // { dg-error "narrowing conversion" "" { target *-*-* } 0 }
+// { dg-error "overflow in expression" "" { target *-*-* } 112 }
 // { dg-prune-output "out of range" }
 // { dg-prune-output "not usable in a constant expression" }
new file mode 100644
--- /dev/null
+++ b/src/libstdc++-v3/testsuite/20_util/shared_ptr/requirements/1.cc
@@ -0,0 +1,33 @@
+// { dg-do compile { target c++11 } }
+// { dg-require-effective-target hosted }
+
+#include <memory>
+#include <testsuite_tr1.h>
+
+using namespace __gnu_test;
+
+void
+test01()
+{
+  std::shared_ptr<ClassType> ptr;
+  std::shared_ptr<const ClassType> ptr2 = ptr;
+
+#if __cpp_lib_shared_ptr_arrays >= 201611L
+  std::shared_ptr<ClassType[10]> ptr_array;
+  std::shared_ptr<ClassType[]> ptr_array2 = ptr_array;
+  std::shared_ptr<ClassType const []> ptr_array3 = ptr_array;
+#endif
+}
+
+void
+test02()
+{
+  std::shared_ptr<IncompleteClass> ptr;
+  std::shared_ptr<const IncompleteClass> ptr2 = ptr;
+
+#if __cpp_lib_shared_ptr_arrays >= 201611L
+  std::shared_ptr<IncompleteClass[10]> ptr_array;
+  std::shared_ptr<IncompleteClass[]> ptr_array2 = ptr_array;
+  std::shared_ptr<IncompleteClass const []> ptr_array3 = ptr_array;
+#endif
+}
--- a/src/libstdc++-v3/testsuite/20_util/shared_ptr/requirements/explicit_instantiation/1.cc
+++ b/src/libstdc++-v3/testsuite/20_util/shared_ptr/requirements/explicit_instantiation/1.cc
@@ -28,3 +28,15 @@ template class std::shared_ptr<int>;
 template class std::shared_ptr<void>;
 template class std::shared_ptr<ClassType>;
 template class std::shared_ptr<IncompleteClass>;
+
+#if __cpp_lib_shared_ptr_arrays >= 201611L
+template class std::shared_ptr<ClassType []>;
+template class std::shared_ptr<ClassType [42]>;
+template class std::shared_ptr<ClassType const []>;
+template class std::shared_ptr<ClassType const [42]>;
+
+template class std::shared_ptr<IncompleteClass []>;
+template class std::shared_ptr<IncompleteClass [42]>;
+template class std::shared_ptr<IncompleteClass const []>;
+template class std::shared_ptr<IncompleteClass const [42]>;
+#endif
new file mode 100644
--- /dev/null
+++ b/src/libstdc++-v3/testsuite/20_util/stdbit/1.cc
@@ -0,0 +1,320 @@
+// { dg-do run { target c++26 } }
+
+#include <stdbit.h>
+
+#if __STDC_VERSION_STDBIT_H__ != 202311L
+# error "__STDC_VERSION_STDBIT_H__ not defined correctly in <stdbit.h>"
+#endif
+#ifndef __STDC_ENDIAN_BIG__
+# error "__STDC_ENDIAN_BIG__ is not defined in <stdbit.h>"
+#endif
+#ifndef __STDC_ENDIAN_LITTLE__
+# error "__STDC_ENDIAN_LITTLE__ is not defined in <stdbit.h>"
+#endif
+#ifndef __STDC_ENDIAN_NATIVE__
+# error "__STDC_ENDIAN_NATIVE__ is not defined in <stdbit.h>"
+#endif
+
+#include <testsuite_hooks.h>
+#include <limits.h>
+
+void
+test_leading_zeros()
+{
+  VERIFY( stdc_leading_zeros_uc(0) == CHAR_BIT );
+  VERIFY( stdc_leading_zeros_uc(UCHAR_MAX) == 0 );
+  VERIFY( stdc_leading_zeros_uc(CHAR_MAX) == (CHAR_MIN ? 1 : 0) );
+  VERIFY( stdc_leading_zeros_uc(UCHAR_MAX >> 3) == 3 );
+  VERIFY( stdc_leading_zeros_uc((unsigned char)(UCHAR_MAX << 3)) == 0 );
+
+  // TODO: replace __X_WIDTH__ with the standard macros once they're in C++26
+  VERIFY( stdc_leading_zeros_us(0) == __SHRT_WIDTH__ );
+  VERIFY( stdc_leading_zeros_us(USHRT_MAX) == 0 );
+  VERIFY( stdc_leading_zeros_us(USHRT_MAX >> 11) == 11 );
+
+  VERIFY( stdc_leading_zeros_ui(0) == __INT_WIDTH__ );
+  VERIFY( stdc_leading_zeros_ui(UINT_MAX) == 0 );
+  VERIFY( stdc_leading_zeros_ui(UINT_MAX >> 11) == 11 );
+
+  VERIFY( stdc_leading_zeros_ul(0) == __LONG_WIDTH__ );
+  VERIFY( stdc_leading_zeros_ul(ULONG_MAX) == 0 );
+  VERIFY( stdc_leading_zeros_ul(ULONG_MAX >> 19) == 19 );
+
+  VERIFY( stdc_leading_zeros_ull(0) == __LONG_LONG_WIDTH__ );
+  VERIFY( stdc_leading_zeros_ull(ULLONG_MAX) == 0 );
+  VERIFY( stdc_leading_zeros_ull(ULLONG_MAX >> 33) == 33 );
+  VERIFY( stdc_leading_zeros_ull(7) == (__LONG_LONG_WIDTH__ - 3) );
+
+  VERIFY( stdc_leading_zeros(7U) == (__INT_WIDTH__ - 3) );
+  VERIFY( stdc_leading_zeros(7UL) == (__LONG_WIDTH__ - 3) );
+  VERIFY( stdc_leading_zeros(7ULL) == (__LONG_LONG_WIDTH__ - 3) );
+
+  static_assert( std::is_same_v<decltype(stdc_leading_zeros(0UL)), unsigned> );
+}
+
+void
+test_leading_ones()
+{
+  VERIFY( stdc_leading_ones_uc(0) == 0 );
+  VERIFY( stdc_leading_ones_uc(UCHAR_MAX) == CHAR_BIT );
+  VERIFY( stdc_leading_ones_uc(CHAR_MAX) == (CHAR_MIN ? 0 : CHAR_BIT) );
+  VERIFY( stdc_leading_ones_uc(UCHAR_MAX >> 3) == 0 );
+  VERIFY( stdc_leading_ones_uc((unsigned char)(UCHAR_MAX << 3)) == (CHAR_BIT - 3) );
+
+  VERIFY( stdc_leading_ones_us(0) == 0 );
+  VERIFY( stdc_leading_ones_us(USHRT_MAX) == __SHRT_WIDTH__ );
+  VERIFY( stdc_leading_ones_us((unsigned short)(USHRT_MAX << 11)) == (__SHRT_WIDTH__ - 11) );
+  VERIFY( stdc_leading_ones_us(USHRT_MAX >> 11) == 0 );
+
+  VERIFY( stdc_leading_ones_ui(0) == 0 );
+  VERIFY( stdc_leading_ones_ui(UINT_MAX) == __INT_WIDTH__ );
+  VERIFY( stdc_leading_ones_ui(UINT_MAX << 11) == (__INT_WIDTH__ - 11) );
+
+  VERIFY( stdc_leading_ones_ul(0) == 0 );
+  VERIFY( stdc_leading_ones_ul(ULONG_MAX) == __LONG_WIDTH__ );
+  VERIFY( stdc_leading_ones_ul(ULONG_MAX << 19) == (__LONG_WIDTH__ - 19) );
+
+  VERIFY( stdc_leading_ones_ull(0) == 0 );
+  VERIFY( stdc_leading_ones_ull(ULLONG_MAX) == __LONG_LONG_WIDTH__ );
+  VERIFY( stdc_leading_ones_ull(ULLONG_MAX << 33) == (__LONG_LONG_WIDTH__ - 33) );
+
+  VERIFY( stdc_leading_ones(-1U << 2) == (__INT_WIDTH__ - 2) );
+  VERIFY( stdc_leading_ones(-1UL << 3) == (__LONG_WIDTH__ - 3) );
+  VERIFY( stdc_leading_ones(-1ULL << 4) == (__LONG_LONG_WIDTH__ - 4) );
+
+  static_assert( std::is_same_v<decltype(stdc_leading_ones(0UL)), unsigned> );
+}
+
+void
+test_trailing_zeros()
+{
+  VERIFY( stdc_trailing_zeros_uc((unsigned char)(UCHAR_MAX << 5)) == 5 );
+  VERIFY( stdc_trailing_zeros_us((unsigned short)(USHRT_MAX << 5)) == 5 );
+  VERIFY( stdc_trailing_zeros_ui(UINT_MAX << 9) == 9 );
+  VERIFY( stdc_trailing_zeros_ul(ULONG_MAX << 19) == 19 );
+  VERIFY( stdc_trailing_zeros_ull(ULLONG_MAX << 39) == 39 );
+  VERIFY( stdc_trailing_zeros(8U) == 3 );
+
+  static_assert( std::is_same_v<decltype(stdc_trailing_zeros(0UL)), unsigned> );
+}
+
+void
+test_trailing_ones()
+{
+  VERIFY( stdc_trailing_ones_uc((unsigned char)3) == 2 );
+  VERIFY( stdc_trailing_ones_uc((unsigned char)135) == 3 );
+  VERIFY( stdc_trailing_ones_us((unsigned short)7) == 3 );
+  VERIFY( stdc_trailing_ones_us((unsigned short)23) == 3 );
+  VERIFY( stdc_trailing_ones_us((unsigned short)235) == 2 );
+  VERIFY( stdc_trailing_ones_ui(11U) == 2 );
+  VERIFY( stdc_trailing_ones_ui(15U) == 4 );
+  VERIFY( stdc_trailing_ones_ul(ULONG_MAX) == __LONG_WIDTH__ );
+  VERIFY( stdc_trailing_ones_ull(ULLONG_MAX) == __LONG_LONG_WIDTH__ );
+  VERIFY( stdc_trailing_ones(7U) == 3 );
+
+  static_assert( std::is_same_v<decltype(stdc_trailing_ones(0UL)), unsigned> );
+}
+
+void
+test_first_leading_zero()
+{
+  VERIFY( stdc_first_leading_zero_uc(0) == 1 );
+  VERIFY( stdc_first_leading_zero_uc(UCHAR_MAX) == 0 );
+  VERIFY( stdc_first_leading_zero_uc(UCHAR_MAX ^ 0b111) == (CHAR_BIT - 2) );
+  VERIFY( stdc_first_leading_zero_us(USHRT_MAX) == 0 );
+  VERIFY( stdc_first_leading_zero_us(USHRT_MAX ^ 0b111) == (__SHRT_WIDTH__ - 2) );
+  VERIFY( stdc_first_leading_zero_ui(UINT_MAX ^ 0b10111) == (__INT_WIDTH__ - 4) );
+  VERIFY( stdc_first_leading_zero_ul(ULONG_MAX ^ 0b10111) == (__LONG_WIDTH__ - 4) );
+  VERIFY( stdc_first_leading_zero_ull(ULLONG_MAX ^ 0b10111) == (__LONG_LONG_WIDTH__ - 4) );
+
+  VERIFY( stdc_first_leading_zero(0U) == 1 );
+  VERIFY( stdc_first_leading_zero(-1U ^ 0b1111) == (__INT_WIDTH__ - 3) );
+
+  static_assert( std::is_same_v<decltype(stdc_first_leading_zero(0UL)), unsigned> );
+}
+
+void
+test_first_leading_one()
+{
+  VERIFY( stdc_first_leading_one_uc(0) == 0 );
+  VERIFY( stdc_first_leading_one_uc(0b00100) == (CHAR_BIT - 2) );
+  VERIFY( stdc_first_leading_one_ui(0b001100) == (__INT_WIDTH__ - 3) );
+  VERIFY( stdc_first_leading_one_ul(0b101100) == (__LONG_WIDTH__ - 5) );
+  VERIFY( stdc_first_leading_one_ull(0b1110000) == (__LONG_LONG_WIDTH__ - 6) );
+
+  VERIFY( stdc_first_leading_one(0U) == 0 );
+  VERIFY( stdc_first_leading_one(-1U >> 4) == 5 );
+  VERIFY( stdc_first_leading_one(-1ULL >> 43) == 44 );
+
+  static_assert( std::is_same_v<decltype(stdc_first_leading_one(0UL)), unsigned> );
+}
+
+void
+test_first_trailing_zero()
+{
+  VERIFY( stdc_first_trailing_zero_uc(0) == 1 );
+  VERIFY( stdc_first_trailing_zero_uc(1) == 2 );
+  VERIFY( stdc_first_trailing_zero_uc(7) == 4 );
+  VERIFY( stdc_first_trailing_zero_us(15) == 5 );
+  VERIFY( stdc_first_trailing_zero_ui(15) == 5 );
+  VERIFY( stdc_first_trailing_zero_ul(15) == 5 );
+  VERIFY( stdc_first_trailing_zero_ull(15) == 5 );
+
+  VERIFY( stdc_first_trailing_zero(15U) == 5 );
+
+  static_assert( std::is_same_v<decltype(stdc_first_trailing_zero(0UL)), unsigned> );
+}
+
+void
+test_first_trailing_one()
+{
+  VERIFY( stdc_first_trailing_one_uc(0) == 0 );
+  VERIFY( stdc_first_trailing_one_uc(1) == 1 );
+  VERIFY( stdc_first_trailing_one_uc(7) == 1 );
+  VERIFY( stdc_first_trailing_one_us(16) == 5 );
+  VERIFY( stdc_first_trailing_one_ui(16) == 5 );
+  VERIFY( stdc_first_trailing_one_ul(16) == 5 );
+  VERIFY( stdc_first_trailing_one_ull(16) == 5 );
+
+  VERIFY( stdc_first_trailing_one(16U) == 5 );
+  VERIFY( stdc_first_trailing_one(-1ULL << 17) == 18 );
+
+  static_assert( std::is_same_v<decltype(stdc_first_trailing_one(0UL)), unsigned> );
+}
+
+void
+test_count_zeros()
+{
+  VERIFY( stdc_count_zeros_uc(0b101010) == (CHAR_BIT - 3) );
+  VERIFY( stdc_count_zeros_us(0b1010101) == (__SHRT_WIDTH__ - 4) );
+  VERIFY( stdc_count_zeros_ui(0b1010101111) == (__INT_WIDTH__ - 7) );
+  VERIFY( stdc_count_zeros_ul(0b10101011110101) == (__LONG_WIDTH__ - 9) );
+  VERIFY( stdc_count_zeros_ull(0b10101011110101) == (__LONG_LONG_WIDTH__ - 9) );
+
+  VERIFY( stdc_count_zeros(0b111UL) == (__LONG_WIDTH__ - 3) );
+  VERIFY( stdc_count_zeros(0U) == __INT_WIDTH__ );
+
+  // std::popcount returns signed int, stdc_count_zeros_uc returns unsigned int.
+  static_assert( std::is_same_v<decltype(stdc_count_zeros_uc(0)), unsigned> );
+  static_assert( std::is_same_v<decltype(stdc_count_zeros_uc(0)), unsigned> );
+  static_assert( std::is_same_v<decltype(stdc_count_zeros_uc(0)), unsigned> );
+  static_assert( std::is_same_v<decltype(stdc_count_zeros_uc(0)), unsigned> );
+  static_assert( std::is_same_v<decltype(stdc_count_zeros_uc(0)), unsigned> );
+  static_assert( std::is_same_v<decltype(stdc_count_zeros_uc(0u)), unsigned> );
+}
+
+void
+test_count_ones()
+{
+  VERIFY( stdc_count_ones_uc(0b101010) == 3 );
+  VERIFY( stdc_count_ones_us(0b1010101) == 4 );
+  VERIFY( stdc_count_ones_ui(0b1010101111) == 7 );
+  VERIFY( stdc_count_ones_ul(0b10101011110101) == 9 );
+  VERIFY( stdc_count_ones_ull(0b10101011110101) == 9 );
+
+  VERIFY( stdc_count_ones(0b10101011110101U) == 9 );
+  VERIFY( stdc_count_ones(0U) == 0 );
+
+  // std::popcount returns signed int, stdc_count_ones_uc returns unsigned int.
+  static_assert( std::is_same_v<decltype(stdc_count_ones_uc(0)), unsigned> );
+  static_assert( std::is_same_v<decltype(stdc_count_ones_uc(0)), unsigned> );
+  static_assert( std::is_same_v<decltype(stdc_count_ones_uc(0)), unsigned> );
+  static_assert( std::is_same_v<decltype(stdc_count_ones_uc(0)), unsigned> );
+  static_assert( std::is_same_v<decltype(stdc_count_ones_uc(0)), unsigned> );
+  static_assert( std::is_same_v<decltype(stdc_count_ones_uc(0u)), unsigned> );
+}
+
+void
+test_has_single_bit()
+{
+  VERIFY ( ! stdc_has_single_bit_uc(0) );
+  VERIFY ( ! stdc_has_single_bit_uc(41) );
+  VERIFY ( stdc_has_single_bit_uc(1) );
+  VERIFY ( stdc_has_single_bit_uc(64) );
+  VERIFY ( stdc_has_single_bit_us(1 << 7) );
+  VERIFY ( stdc_has_single_bit_ui(1 << 11) );
+  VERIFY ( stdc_has_single_bit_ul(1 << 14) );
+  VERIFY ( stdc_has_single_bit_ull(1 << 24) );
+
+  VERIFY ( stdc_has_single_bit(64U) );
+  VERIFY ( stdc_has_single_bit(128UL) );
+  VERIFY ( ! stdc_has_single_bit(129UL) );
+}
+
+void
+test_bit_width()
+{
+  VERIFY( stdc_bit_width_uc(0) == 0 );
+  VERIFY( stdc_bit_width_uc(7) == 3 );
+  VERIFY( stdc_bit_width_uc(0b10101) == 5 );
+  VERIFY( stdc_bit_width_us(0b101010) == 6 );
+  VERIFY( stdc_bit_width_ui(0b1010101) == 7 );
+  VERIFY( stdc_bit_width_ul(ULONG_MAX) == __LONG_WIDTH__ );
+  VERIFY( stdc_bit_width_ull(ULLONG_MAX >> 2) == (__LONG_LONG_WIDTH__ - 2) );
+
+  VERIFY( stdc_bit_width(0b1010101U) == 7U );
+
+  // std::bit_width returns signed int, stdc_bit_width returns unsigned int.
+  static_assert( std::is_same_v<decltype(stdc_bit_width_uc(0)), unsigned> );
+  static_assert( std::is_same_v<decltype(stdc_bit_width_us(0)), unsigned> );
+  static_assert( std::is_same_v<decltype(stdc_bit_width_ui(0)), unsigned> );
+  static_assert( std::is_same_v<decltype(stdc_bit_width_ul(0)), unsigned> );
+  static_assert( std::is_same_v<decltype(stdc_bit_width_ul(0)), unsigned> );
+  static_assert( std::is_same_v<decltype(stdc_bit_width(0u)), unsigned> );
+}
+
+void
+test_bit_floor()
+{
+  VERIFY( stdc_bit_floor_uc(0) == 0 );
+  VERIFY( stdc_bit_floor_uc(7) == 4 );
+  VERIFY( stdc_bit_floor_uc(0b10101) == 0b10000 );
+  VERIFY( stdc_bit_floor_us(0b101010) == 0b100000 );
+  VERIFY( stdc_bit_floor_ui(0b1010101) == 0b1000000 );
+  VERIFY( stdc_bit_floor_ul(ULONG_MAX) == (1ul << (__LONG_WIDTH__ - 1)) );
+  VERIFY( stdc_bit_floor_ull(1000000) == (1ULL << 19) );
+
+  VERIFY( stdc_bit_floor(0b1010101U) == 0b1000000 );
+}
+
+void
+test_bit_ceil()
+{
+  VERIFY( stdc_bit_ceil_uc(0) == 1 );
+  VERIFY( stdc_bit_ceil_uc(1) == 1 );
+  VERIFY( stdc_bit_ceil_uc(2) == 2 );
+  VERIFY( stdc_bit_ceil_uc(3) == 4 );
+  VERIFY( stdc_bit_ceil_us(11) == 16 );
+  VERIFY( stdc_bit_ceil_ui(257) == 512 );
+  VERIFY( stdc_bit_ceil_ul(1048) == 2048 );
+  VERIFY( stdc_bit_ceil_ull(1000000) == (1ULL << 20) );
+
+  VERIFY( stdc_bit_ceil(0b1010101U) == 0b10000000 );
+}
+
+int main()
+{
+  test_leading_zeros();
+  test_leading_ones();
+  test_trailing_zeros();
+  test_trailing_ones();
+  test_first_leading_zero();
+  test_first_leading_one();
+  test_first_trailing_zero();
+  test_first_trailing_one();
+  test_count_zeros();
+  test_count_ones();
+  test_has_single_bit();
+  test_bit_width();
+  test_bit_floor();
+  test_bit_ceil();
+}
+
+#include <bit>
+// The standard doesn't require these values to match,
+// so this is specific to libstdc++.
+#ifdef _GLIBCXX_RELEASE
+static_assert(__STDC_ENDIAN_BIG__    == (int)std::endian::big);
+static_assert(__STDC_ENDIAN_LITTLE__ == (int)std::endian::little);
+static_assert(__STDC_ENDIAN_NATIVE__ == (int)std::endian::native);
+#endif
new file mode 100644
--- /dev/null
+++ b/src/libstdc++-v3/testsuite/20_util/stdbit/2_neg.cc
@@ -0,0 +1,45 @@
+// { dg-do compile { target c++26 } }
+
+#include <stdbit.h>
+
+void
+test_mandates()
+{
+  // Mandates: T is an unsigned integer type.
+
+  ::stdc_leading_zeros(1); // { dg-error "here" }
+  ::stdc_leading_ones(1); // { dg-error "here" }
+  ::stdc_trailing_zeros(1); // { dg-error "here" }
+  ::stdc_trailing_ones(1); // { dg-error "here" }
+  ::stdc_first_leading_zero(1); // { dg-error "here" }
+  ::stdc_first_leading_one(1); // { dg-error "here" }
+  ::stdc_first_trailing_zero(1); // { dg-error "here" }
+  ::stdc_first_trailing_one(1); // { dg-error "here" }
+  ::stdc_count_zeros(1); // { dg-error "here" }
+  ::stdc_count_ones(1); // { dg-error "here" }
+  ::stdc_has_single_bit(1); // { dg-error "here" }
+  ::stdc_bit_width(1); // { dg-error "here" }
+  ::stdc_bit_floor(1); // { dg-error "here" }
+  ::stdc_bit_ceil(1); // { dg-error "here" }
+
+  ::stdc_leading_zeros(1.0); // { dg-error "here" }
+  ::stdc_leading_ones(1.0); // { dg-error "here" }
+  ::stdc_trailing_zeros(1.0); // { dg-error "here" }
+  ::stdc_trailing_ones(1.0); // { dg-error "here" }
+  ::stdc_first_leading_zero(1.0); // { dg-error "here" }
+  ::stdc_first_leading_one(1.0); // { dg-error "here" }
+  ::stdc_first_trailing_zero(1.0); // { dg-error "here" }
+  ::stdc_first_trailing_one(1.0); // { dg-error "here" }
+  ::stdc_count_zeros(1.0); // { dg-error "here" }
+  ::stdc_count_ones(1.0); // { dg-error "here" }
+  ::stdc_has_single_bit(1.0); // { dg-error "here" }
+  ::stdc_bit_width(1.0); // { dg-error "here" }
+  ::stdc_bit_floor(1.0); // { dg-error "here" }
+  ::stdc_bit_ceil(1.0); // { dg-error "here" }
+}
+
+// { dg-prune-output "static assertion failed" }
+// { dg-prune-output "no matching function" }
+// { dg-prune-output "wrong type" }
+// { dg-prune-output "invalid operands" }
+// { dg-prune-output "non-integral type" }
new file mode 100644
--- /dev/null
+++ b/src/libstdc++-v3/testsuite/20_util/synchronized_pool_resource/118681.cc
@@ -0,0 +1,6 @@
+// { dg-do run { target c++17 } }
+// { dg-require-gthreads "" }
+// Bug 118681 - unsynchronized_pool_resource may fail to respect alignment
+
+#define RESOURCE std::pmr::synchronized_pool_resource
+#include "../unsynchronized_pool_resource/118681.cc"
new file mode 100644
--- /dev/null
+++ b/src/libstdc++-v3/testsuite/20_util/system_clock/99832.cc
@@ -0,0 +1,14 @@
+// { dg-options "-O0 -g0" }
+// { dg-do compile { target c++20 } }
+// { dg-final { scan-assembler-not "system_clock9to_time_t" } }
+
+// Bug libstdc++/99832
+// std::chrono::system_clock::to_time_t needs ABI tag for 32-bit time_t
+
+#include <chrono>
+
+std::time_t
+test_pr99832(std::chrono::system_clock::time_point t)
+{
+  return std::chrono::system_clock::to_time_t(t);
+}
new file mode 100644
--- /dev/null
+++ b/src/libstdc++-v3/testsuite/20_util/unsynchronized_pool_resource/118681.cc
@@ -0,0 +1,58 @@
+// { dg-do run { target c++17 } }
+// Bug 118681 - unsynchronized_pool_resource may fail to respect alignment
+
+#include <memory_resource>
+#include <cstdio>
+#include <testsuite_hooks.h>
+
+#ifndef RESOURCE
+# define RESOURCE std::pmr::unsynchronized_pool_resource
+#endif
+
+bool any_misaligned = false;
+
+bool
+is_aligned(void* p, [[maybe_unused]] std::size_t size, std::size_t alignment)
+{
+  const bool misaligned = reinterpret_cast<std::uintptr_t>(p) % alignment;
+#ifdef DEBUG
+  std::printf("allocate(%2zu, %2zu): %p is aligned %scorrectly\n",
+	      size, alignment, p, misaligned ? "in" : "");
+  any_misaligned |= misaligned;
+  return true;
+#endif
+  return ! misaligned;
+}
+
+void
+test_alignment(std::pmr::memory_resource& res, bool dealloc)
+{
+  for (std::size_t alignment : { 8, 16, 32, 64 })
+  {
+    for (std::size_t size : { 9, 12, 24, 40, 48, 56, 72 })
+    {
+      void* p1 = res.allocate(size, alignment);
+      void* p2 = res.allocate(size, alignment);
+
+      VERIFY( is_aligned(p1, size, alignment) );
+      VERIFY( is_aligned(p2, size, alignment) );
+
+      if (dealloc)
+      {
+	res.deallocate(p1, size, alignment);
+	res.deallocate(p2, size, alignment);
+      }
+    }
+  }
+}
+
+int main()
+{
+  RESOURCE res;
+  test_alignment(res, true);
+  res.release();
+  test_alignment(res, false);
+  res.release();
+
+  VERIFY( ! any_misaligned );
+}
new file mode 100644
--- /dev/null
+++ b/src/libstdc++-v3/testsuite/20_util/weak_ptr/requirements/1.cc
@@ -0,0 +1,33 @@
+// { dg-do compile { target c++11 } }
+// { dg-require-effective-target hosted }
+
+#include <memory>
+#include <testsuite_tr1.h>
+
+using namespace __gnu_test;
+
+void
+test01()
+{
+  std::weak_ptr<ClassType> ptr;
+  std::weak_ptr<const ClassType> ptr2 = ptr;
+
+#if __cpp_lib_shared_ptr_arrays >= 201611L
+  std::weak_ptr<ClassType[10]> ptr_array;
+  std::weak_ptr<ClassType[]> ptr_array2 = ptr_array;
+  std::weak_ptr<ClassType const []> ptr_array3 = ptr_array;
+#endif
+}
+
+void
+test02()
+{
+  std::weak_ptr<IncompleteClass> ptr;
+  std::weak_ptr<const IncompleteClass> ptr2 = ptr;
+
+#if __cpp_lib_shared_ptr_arrays >= 201611L
+  std::weak_ptr<IncompleteClass[10]> ptr_array;
+  std::weak_ptr<IncompleteClass[]> ptr_array2 = ptr_array;
+  std::weak_ptr<IncompleteClass const []> ptr_array3 = ptr_array;
+#endif
+}
--- a/src/libstdc++-v3/testsuite/20_util/weak_ptr/requirements/explicit_instantiation/1.cc
+++ b/src/libstdc++-v3/testsuite/20_util/weak_ptr/requirements/explicit_instantiation/1.cc
@@ -28,3 +28,15 @@ template class std::weak_ptr<int>;
 template class std::weak_ptr<void>;
 template class std::weak_ptr<ClassType>;
 template class std::weak_ptr<IncompleteClass>;
+
+#if __cpp_lib_shared_ptr_arrays >= 201611L
+template class std::weak_ptr<ClassType []>;
+template class std::weak_ptr<ClassType [42]>;
+template class std::weak_ptr<ClassType const []>;
+template class std::weak_ptr<ClassType const [42]>;
+
+template class std::weak_ptr<IncompleteClass []>;
+template class std::weak_ptr<IncompleteClass [42]>;
+template class std::weak_ptr<IncompleteClass const []>;
+template class std::weak_ptr<IncompleteClass const [42]>;
+#endif
new file mode 100644
--- /dev/null
+++ b/src/libstdc++-v3/testsuite/21_strings/basic_string/operations/compare/char/123991.cc
@@ -0,0 +1,56 @@
+// { dg-do run { target c++17 } }
+
+// Bug 123991 - std::string::compare crashes instead of throwing
+
+#include <string>
+#include <string_view>
+#include <stdexcept>
+#include <testsuite_hooks.h>
+
+void
+test_compare_3arg()
+{
+  std::string_view sv;
+  std::string s;
+  static_assert( ! noexcept(s.compare(0, 0, sv)) );
+#ifdef __cpp_exceptions
+  try
+  {
+    (void) s.compare(1, 0, sv);
+    VERIFY(false);
+  }
+  catch (const std::out_of_range&)
+  { }
+#endif
+}
+
+void
+test_compare_5arg()
+{
+  std::string_view sv;
+  std::string s;
+  static_assert( ! noexcept(s.compare(0, 0, sv, 0, 0)) );
+#ifdef __cpp_exceptions
+  try
+  {
+    (void) s.compare(1, 0, sv, 0, 0);
+    VERIFY(false);
+  }
+  catch (const std::out_of_range&)
+  { }
+
+  try
+  {
+    (void) s.compare(0, 0, sv, 1, 0);
+    VERIFY(false);
+  }
+  catch (const std::out_of_range&)
+  { }
+#endif
+}
+
+int main()
+{
+  test_compare_3arg();
+  test_compare_5arg();
+}
new file mode 100644
--- /dev/null
+++ b/src/libstdc++-v3/testsuite/21_strings/basic_string/operations/compare/wchar_t/123991.cc
@@ -0,0 +1,56 @@
+// { dg-do run { target c++17 } }
+
+// Bug 123991 - std::string::compare crashes instead of throwing
+
+#include <string>
+#include <string_view>
+#include <stdexcept>
+#include <testsuite_hooks.h>
+
+void
+test_compare_3arg()
+{
+  std::wstring_view sv;
+  std::wstring s;
+  static_assert( ! noexcept(s.compare(0, 0, sv)) );
+#ifdef __cpp_exceptions
+  try
+  {
+    (void) s.compare(1, 0, sv);
+    VERIFY(false);
+  }
+  catch (const std::out_of_range&)
+  { }
+#endif
+}
+
+void
+test_compare_5arg()
+{
+  std::wstring_view sv;
+  std::wstring s;
+  static_assert( ! noexcept(s.compare(0, 0, sv, 0, 0)) );
+#ifdef __cpp_exceptions
+  try
+  {
+    (void) s.compare(1, 0, sv, 0, 0);
+    VERIFY(false);
+  }
+  catch (const std::out_of_range&)
+  { }
+
+  try
+  {
+    (void) s.compare(0, 0, sv, 1, 0);
+    VERIFY(false);
+  }
+  catch (const std::out_of_range&)
+  { }
+#endif
+}
+
+int main()
+{
+  test_compare_3arg();
+  test_compare_5arg();
+}
new file mode 100644
--- /dev/null
+++ b/src/libstdc++-v3/testsuite/22_locale/codecvt/length/wchar_t/105857.cc
@@ -0,0 +1,21 @@
+// { dg-do run }
+
+// Bug libstdc++/105857 codecvt::do_length causes unexpected buffer overflow
+
+#include <locale>
+#include <testsuite_hooks.h>
+
+int main()
+{
+  std::string s(1050, 'a');
+  typedef std::codecvt<wchar_t, char, std::mbstate_t> Cvt;
+  const Cvt& cvt = std::use_facet<Cvt>(std::locale());
+  const char* from = s.c_str();
+  const char* from_end = s.c_str() + s.size();
+  std::size_t max = std::size_t(-1) / 4 + 2;
+  std::mbstate_t state = std::mbstate_t();
+  int n = cvt.length(state, from, from_end, max);
+  VERIFY( n == s.size() );
+  n = cvt.length(state, from, from_end, 2);
+  VERIFY( n == 2 );
+}
new file mode 100644
--- /dev/null
+++ b/src/libstdc++-v3/testsuite/23_containers/forward_list/modifiers/122661.cc
@@ -0,0 +1,20 @@
+// { dg-do compile { target c++11 } }
+
+// Bug 122661 - Incorrect value category handling in forward_list::assign
+
+#include <forward_list>
+
+struct S
+{
+  S();
+  S& operator=(S const&) & = delete;
+  S& operator=(S const&) &&;
+};
+
+void
+test_pr122661()
+{
+  std::forward_list<S> fl;
+  S* iter = nullptr;
+  fl.assign(iter, iter);
+}
--- a/src/libstdc++-v3/testsuite/23_containers/unordered_set/pr115285.cc
+++ b/src/libstdc++-v3/testsuite/23_containers/unordered_set/pr115285.cc
@@ -2,8 +2,9 @@
 
 // libstdc++/115285
 
-#include <string>
 #include <unordered_set>
+#include <string>
+#include <vector>
 
 #include <testsuite_hooks.h>
 
--- a/src/libstdc++-v3/testsuite/23_containers/vector/modifiers/moveable.cc
+++ b/src/libstdc++-v3/testsuite/23_containers/vector/modifiers/moveable.cc
@@ -109,9 +109,11 @@ test05()
   // when it doesn't reallocate the buffer.
   VERIFY(copycounter::copycount == 20 + 1);
   a.insert(a.end(), 50, c);
-  VERIFY(copycounter::copycount == 70 + 2);
+  // expect when inserting at the end (appending), where existing
+  // elements are not modified
+  VERIFY(copycounter::copycount == 70 + 1);
   a.insert(a.begin() + 50, 100, c);
-  VERIFY(copycounter::copycount == 170 + 3);
+  VERIFY(copycounter::copycount == 170 + 2);
 }
 
 
new file mode 100644
--- /dev/null
+++ b/src/libstdc++-v3/testsuite/23_containers/vector/modifiers/resize.cc
@@ -0,0 +1,69 @@
+// { dg-do run }
+
+#include <vector>
+#include <testsuite_hooks.h>
+
+struct NoAssign
+{
+  NoAssign(int p) : val(p) {}
+  const int val;
+};
+
+struct PrivateAssign
+{
+  PrivateAssign(int p) : val(p) {}
+  PrivateAssign(const PrivateAssign& rhs) : val(rhs.val) {}
+
+  int val;
+
+private:
+  PrivateAssign& operator=(const PrivateAssign&);
+};
+
+#if __cplusplus >= 201102L
+struct DeletedAssign
+{
+  DeletedAssign(int p) : val(p) {}
+  DeletedAssign(const DeletedAssign& rhs) : val(rhs.val) {}
+
+  DeletedAssign& operator=(const DeletedAssign&) = delete;
+
+  int val;
+};
+#endif
+
+template<typename T>
+void
+testPR90129()
+{
+  std::vector<T> v;
+  v.resize(5, T(5));
+  VERIFY( v.size() == 5 );
+  VERIFY( v.front().val == 5 );
+  VERIFY( v.back().val == 5 );
+
+  v.resize(10, T(10));
+  VERIFY( v.size() == 10 );
+  VERIFY( v.front().val == 5 );
+  VERIFY( v.back().val == 10 );
+
+  v.resize(7, T(7));
+  VERIFY( v.size() == 7 );
+  VERIFY( v.front().val == 5 );
+  VERIFY( v.back().val == 10 );
+
+  v.resize(3, T(3));
+  VERIFY( v.size() == 3 );
+  VERIFY( v.front().val == 5 );
+  VERIFY( v.back().val == 5 );
+}
+
+int main()
+{
+  testPR90129<NoAssign>();
+  testPR90129<PrivateAssign>();
+#if __cplusplus >= 201102L
+  testPR90129<DeletedAssign>();
+#endif
+  return 0;
+}
new file mode 100644
--- /dev/null
+++ b/src/libstdc++-v3/testsuite/26_numerics/stdckdint/1.cc
@@ -0,0 +1,63 @@
+// { dg-do run { target c++26 } }
+
+#include <stdckdint.h>
+
+#if __STDC_VERSION_STDCKDINT_H__ != 202311L
+# error "__STDC_VERSION_STDCKDINT_H__ not defined correctly in <stdckdint.h>"
+#endif
+
+#include <limits.h>
+#include <testsuite_hooks.h>
+
+void
+test_add()
+{
+  int result;
+  bool overflow;
+
+  overflow = ::ckd_add(&result, (unsigned)INT_MAX, 1LL);
+  VERIFY( overflow );
+  VERIFY( result == INT_MIN );
+
+  overflow = ::ckd_add(&result, (long long)INT_MIN, -1);
+  VERIFY( overflow );
+  VERIFY( result == INT_MAX );
+
+  overflow = ::ckd_add(&result, 99u, 100ll);
+  VERIFY( ! overflow );
+  VERIFY( result == 199 );
+}
+
+void
+test_sub()
+{
+  int result;
+  bool overflow;
+
+  overflow = ::ckd_sub(&result, -1, -5);
+  VERIFY( ! overflow );
+  VERIFY( result == 4 );
+}
+
+void
+test_mul()
+{
+  long long result;
+  bool overflow;
+
+  overflow = ::ckd_mul(&result, INT_MIN, -1);
+  VERIFY( ! overflow );
+  VERIFY( result == -(long long)INT_MIN );
+
+  unsigned uresult;
+  overflow = ::ckd_mul(&uresult, INT_MIN, -1);
+  VERIFY( ! overflow );
+  VERIFY( result == (unsigned)INT_MAX + 1u );
+}
+
+int main()
+{
+  test_add();
+  test_sub();
+  test_mul();
+}
new file mode 100644
--- /dev/null
+++ b/src/libstdc++-v3/testsuite/26_numerics/stdckdint/2_neg.cc
@@ -0,0 +1,39 @@
+// { dg-do compile { target c++26 } }
+
+#include <stdckdint.h>
+
+void
+test_add(int i, char c, bool b)
+{
+  ::ckd_add(&i, c, 1); // { dg-error "here" }
+  ::ckd_add(&i, 1, c); // { dg-error "here" }
+  ::ckd_add(&i, b, 2); // { dg-error "here" }
+  ::ckd_add(&i, 2, b); // { dg-error "here" }
+  ::ckd_add(&c, 3, 3); // { dg-error "here" }
+  ::ckd_add((const int*)&i, 4, 4); // { dg-error "here" }
+}
+
+void
+test_sub(int i, char c, bool b)
+{
+  ::ckd_sub(&i, c, 1); // { dg-error "here" }
+  ::ckd_sub(&i, 1, c); // { dg-error "here" }
+  ::ckd_sub(&i, b, 2); // { dg-error "here" }
+  ::ckd_sub(&i, 2, b); // { dg-error "here" }
+  ::ckd_sub(&c, 3, 3); // { dg-error "here" }
+  ::ckd_sub((const int*)&i, 4, 4); // { dg-error "here" }
+}
+
+void
+test_mul(int i, char c, bool b)
+{
+  ::ckd_mul(&i, c, 1); // { dg-error "here" }
+  ::ckd_mul(&i, 1, c); // { dg-error "here" }
+  ::ckd_mul(&i, b, 2); // { dg-error "here" }
+  ::ckd_mul(&i, 2, b); // { dg-error "here" }
+  ::ckd_mul(&c, 3, 3); // { dg-error "here" }
+  ::ckd_mul((const int*)&i, 4, 4); // { dg-error "here" }
+}
+
+// { dg-prune-output "static assertion failed" }
+// { dg-prune-output "pointer to 'const'" }
--- a/src/libstdc++-v3/testsuite/27_io/filesystem/operations/rename.cc
+++ b/src/libstdc++-v3/testsuite/27_io/filesystem/operations/rename.cc
@@ -170,10 +170,20 @@ test_directories()
   fs::remove_all(dir, ec);
 }
 
+void
+test_pr122726()
+{
+  std::error_code ec;
+  const auto nonesuch = __gnu_test::nonexistent_path();
+  fs::rename(nonesuch, "new-name", ec);
+  VERIFY( ec == std::make_error_code(std::errc::no_such_file_or_directory) );
+}
+
 int
 main()
 {
   test01();
   test_symlinks();
   test_directories();
+  test_pr122726();
 }
--- a/src/libstdc++-v3/testsuite/29_atomics/atomic/compare_exchange_padding.cc
+++ b/src/libstdc++-v3/testsuite/29_atomics/atomic/compare_exchange_padding.cc
@@ -1,4 +1,4 @@
-// { dg-do run { target c++20 } }
+// { dg-do run { target c++11 } }
 // { dg-require-atomic-cmpxchg-word "" }
 // { dg-add-options libatomic }
 // { dg-additional-options "-fno-tree-sra" }
new file mode 100644
--- /dev/null
+++ b/src/libstdc++-v3/testsuite/29_atomics/atomic/cons/zero_padding.cc
@@ -0,0 +1,75 @@
+// { dg-do run { target c++11 } }
+// { dg-require-atomic-cmpxchg-word "" }
+// { dg-add-options libatomic }
+
+#include <atomic>
+#include <cstring>
+#include <testsuite_hooks.h>
+
+struct TailPadding { int i; char c; };
+TailPadding ztail{1, 2}; // zeroed-padding
+constexpr std::atomic<TailPadding> ctail(TailPadding{1,2});
+std::atomic<TailPadding> gtail(TailPadding{1,2});
+
+struct MidPadding { char c; int x; };
+MidPadding zmid{1, 2}; // zeroed-padding
+constexpr std::atomic<MidPadding> cmid(MidPadding{1,2});
+std::atomic<MidPadding> gmid(MidPadding{1,2});
+
+struct BitPadding { int : 4; int i : 5; int : 4; int j : 5; int : 4;  };
+BitPadding zbit{1, 2}; // zeroed-padding
+constexpr std::atomic<BitPadding> cbit(BitPadding{1,2});
+std::atomic<BitPadding> gbit(BitPadding{1,2});
+
+struct Ctor
+{
+  Ctor() = default;
+
+  constexpr Ctor(char pc, char pi)
+    : c(pc), i(pi)
+  {}
+
+  char c;
+  int i;
+};
+
+Ctor zctor{1, 2}; // zeroed-padding
+constexpr std::atomic<Ctor> cctor(Ctor{1,2});
+std::atomic<Ctor> gctor(Ctor{1,2});
+
+template<typename T>
+void test_struct(std::atomic<T>& g, const T& zp)
+{
+  T const d{3, 4};
+  T t;
+
+  std::memcpy(&t, &zp, sizeof(T));
+  VERIFY( g.compare_exchange_strong(t, d) );
+
+  static std::atomic<T> st(T{1, 2});
+  std::memcpy(&t, &zp, sizeof(T));
+  VERIFY( st.compare_exchange_strong(t, d) );
+
+  thread_local std::atomic<T> tl(T{1, 2});
+  std::memcpy(&t, &zp, sizeof(T));
+  VERIFY( tl.compare_exchange_strong(t, d) );
+
+  std::atomic<T> l(T{1, 2});
+  std::memcpy(&t, &zp, sizeof(T));
+  VERIFY( l.compare_exchange_strong(t, d) );
+
+  std::atomic<T>* h = new std::atomic<T>(T{1, 2});
+  std::memcpy(&t, &zp, sizeof(T));
+  VERIFY( h->compare_exchange_strong(t, d) );
+  delete h;
+
+  constexpr std::atomic<T> cl(T{1, 2});
+}
+
+int main()
+{
+  test_struct(gtail, ztail);
+  test_struct(gmid, zmid);
+  test_struct(gbit, zbit);
+  test_struct(gctor, zctor);
+}
--- a/src/libstdc++-v3/testsuite/29_atomics/atomic/operators/pointer_partial_void.cc
+++ b/src/libstdc++-v3/testsuite/29_atomics/atomic/operators/pointer_partial_void.cc
@@ -1,6 +1,7 @@
 // { dg-do run { target { c++11_only || c++14_only } } }
 // { dg-require-atomic-builtins "" }
 // { dg-require-effective-target hosted }
+// { dg-additional-options "-Wsystem-headers" }
 
 // Copyright (C) 2012-2024 Free Software Foundation, Inc.
 //
@@ -68,3 +69,4 @@ int main(void)
 
   return 0;
 }
+// { dg-warning "invalid application of 'sizeof' to a void type" "" { target *-*-* } 0 }
new file mode 100644
--- /dev/null
+++ b/src/libstdc++-v3/testsuite/29_atomics/atomic_float/zero_padding.cc
@@ -0,0 +1,45 @@
+// { dg-do run { target c++20 } }
+// { dg-require-effective-target libatomic_available }
+// { dg-additional-options "[atomic_link_flags [get_multilibs]] -latomic" }
+
+#include <atomic>
+#include <cstring>
+#include <testsuite_hooks.h>
+
+long double zld(10.5);
+constexpr std::atomic<long double> cld(10.5);
+std::atomic<long double> gld(10.5);
+
+template<typename T>
+void test_floating(std::atomic<T>& g, const T& zp)
+{
+  T const d = T(7.5);
+  T t;
+
+  std::memcpy(&t, &zp, sizeof(T));
+  VERIFY( g.compare_exchange_strong(t, d) );
+
+  static std::atomic<T> st(T(10.5));
+  std::memcpy(&t, &zp, sizeof(T));
+  VERIFY( st.compare_exchange_strong(t, d) );
+
+  thread_local std::atomic<T> tl(T(10.5));
+  std::memcpy(&t, &zp, sizeof(T));
+  VERIFY( tl.compare_exchange_strong(t, d) );
+
+  std::atomic<T> l(T(10.5));
+  std::memcpy(&t, &zp, sizeof(T));
+  VERIFY( l.compare_exchange_strong(t, d) );
+
+  std::atomic<T>* h = new std::atomic<T>(T(10.5));
+  std::memcpy(&t, &zp, sizeof(T));
+  VERIFY( h->compare_exchange_strong(t, d) );
+  delete h;
+
+  constexpr std::atomic<T> cl(T(10.5));
+}
+
+int main()
+{
+  test_floating(gld, zld);
+}
--- a/src/libstdc++-v3/testsuite/30_threads/packaged_task/cons/dangling_ref.cc
+++ b/src/libstdc++-v3/testsuite/30_threads/packaged_task/cons/dangling_ref.cc
@@ -1,4 +1,5 @@
 // { dg-do compile { target c++11 } }
+// { dg-additional-options "-Wsystem-headers" }
 #include <future>
 
 // C++20 [futures.task.members]
@@ -7,6 +8,7 @@
 int f();
 std::packaged_task<const int&()> task(f);
 // { dg-error "dangling reference" "" { target { c++14_down } } 0 }
+// { dg-error "reference to temporary" "" { target { c++14_down } } 0 }
 // { dg-error "no matching function" "" { target c++17 } 0 }
 // { dg-error "enable_if" "" { target c++17 } 0 }
 // { dg-error "static assertion failed" "" { target c++17 } 0 }
new file mode 100644
--- /dev/null
+++ b/src/libstdc++-v3/testsuite/30_threads/timed_mutex/121496.cc
@@ -0,0 +1,14 @@
+// { dg-do compile { target { { i?86-*-linux* x86_64-*-linux* } && lp64 } } }
+// { dg-require-effective-target c++11 }
+// { dg-options "-fsanitize=thread" }
+
+// PR libstdc++/121496 no member named '_M_clocklock' with -fsanitize=thread
+
+#include <mutex>
+#include <chrono>
+
+void
+test_pr121496(std::timed_mutex& m)
+{
+  (void) m.try_lock_until(std::chrono::steady_clock::time_point{});
+}
--- a/src/libstdc++-v3/testsuite/backward/hash_set/check_construct_destroy.cc
+++ b/src/libstdc++-v3/testsuite/backward/hash_set/check_construct_destroy.cc
@@ -39,50 +39,45 @@ int main()
 
   int buckets;
 
-  // For C++11 and later add 1 to all counts, because the std::vector used
-  // internally by the hashtable creates and destroys a temporary object
-  // using its allocator.
-  const int extra = __cplusplus >= 201102L ? 1 : 0;
-
   tracker_allocator_counter::reset();
   {
     Container c;
     buckets = c.bucket_count();
-    ok = check_construct_destroy("empty container", buckets+extra, extra) && ok;
+    ok = check_construct_destroy("empty container", buckets, 0) && ok;
   }
-  ok = check_construct_destroy("empty container", buckets+extra, buckets+extra) && ok;
+  ok = check_construct_destroy("empty container", buckets, buckets) && ok;
 
 
   tracker_allocator_counter::reset();
   {
     Container c(arr10, arr10 + 10);
-    ok = check_construct_destroy("Construct from range", buckets+10+extra, extra) && ok;
+    ok = check_construct_destroy("Construct from range", buckets+10, 0) && ok;
   }
-  ok = check_construct_destroy("Construct from range", buckets+10+extra, buckets+10+extra) && ok;
+  ok = check_construct_destroy("Construct from range", buckets+10, buckets+10) && ok;
 
   tracker_allocator_counter::reset();
   {
     Container c(arr10, arr10 + 10);
     c.insert(arr10a[0]);
-    ok = check_construct_destroy("Insert element", buckets+11+extra, extra) && ok;
+    ok = check_construct_destroy("Insert element", buckets+11, 0) && ok;
   }
-  ok = check_construct_destroy("Insert element", buckets+11+extra, buckets+11+extra) && ok;
+  ok = check_construct_destroy("Insert element", buckets+11, buckets+11) && ok;
 
   tracker_allocator_counter::reset();
   {
     Container c(arr10, arr10 + 10);
     c.insert(arr10a, arr10a+3);
-    ok = check_construct_destroy("Insert short range", buckets+13+extra, extra) && ok;
+    ok = check_construct_destroy("Insert short range", buckets+13, 0) && ok;
   }
-  ok = check_construct_destroy("Insert short range", buckets+13+extra, buckets+13+extra) && ok;
+  ok = check_construct_destroy("Insert short range", buckets+13, buckets+13) && ok;
 
   tracker_allocator_counter::reset();
   {
     Container c(arr10, arr10 + 10);
     c.insert(arr10a, arr10a+10);
-    ok = check_construct_destroy("Insert long range", buckets+20+extra, extra) && ok;
+    ok = check_construct_destroy("Insert long range", buckets+20, 0) && ok;
   }
-  ok = check_construct_destroy("Insert long range", buckets+20+extra, buckets+20+extra) && ok;
+  ok = check_construct_destroy("Insert long range", buckets+20, buckets+20) && ok;
 
   return ok ? 0 : 1;
 }
--- a/src/libstdc++-v3/testsuite/std/format/functions/format.cc
+++ b/src/libstdc++-v3/testsuite/std/format/functions/format.cc
@@ -256,6 +256,16 @@ test_locale()
   s = std::format(eloc, "{0:Le} {0:Lf} {0:Lg}", -nan);
   VERIFY( s == "-nan -nan -nan" );
 
+  // PR libstdc++/120548 format confuses a negative sign for a thousands digit
+  s = std::format(bloc, "{:L}", -123.45);
+  VERIFY( s == "-123.45" );
+  s = std::format(bloc, "{:-L}", -876543.21);
+  VERIFY( s == "-876,543.21" );
+  s = std::format(bloc, "{:+L}", 333.22);
+  VERIFY( s == "+333.22" );
+  s = std::format(bloc, "{: L}", 999.44);
+  VERIFY( s == " 999.44" );
+
   // Restore
   std::locale::global(cloc);
 }
--- a/src/libstdc++-v3/testsuite/std/time/parse/parse.cc
+++ b/src/libstdc++-v3/testsuite/std/time/parse/parse.cc
@@ -317,6 +317,19 @@ test_modifiers()
   VERIFY( s == 12s );
 }
 
+void
+test_wchar()
+{
+  std::wistringstream is;
+  std::chrono::duration<double, std::milli> ms;
+
+  is.clear();
+  is.str(L"0.125");
+  is >> parse(L"%S", ms);
+  VERIFY( is.good() );
+  VERIFY( ms.count() == 125 );
+}
+
 int main()
 {
   test_recommended_practice();
@@ -324,4 +337,5 @@ int main()
   test_whitespace();
   test_errors();
   test_modifiers();
+  test_wchar();
 }
