/*******************************************************************************
 * Copyright 2019-2022 Microchip FPGA Embedded Systems Solutions.
 *
 * SPDX-License-Identifier: MIT
 *
 * Microchip PolarFire SoC MSS USB Driver Stack
 *      USB Core Interface Layer (USB-CIFL)
 *          USB-CIF.
 *
 * MSS USB register map
 *
 * SVN $Revision$
 * SVN $Date$
 */

#ifndef __MSS_USB_REGS_H_
#define __MSS_USB_REGS_H_


#ifdef __cplusplus
extern "C" {
#endif


#ifdef __cplusplus
}
#endif

#endif  /* __MSS_USB_COMMON_REG_IO_H_ */
